FAIRCHILD NC7NP34 handbook
Contents
1. NC7NP34K8X ere FAIRCHILD ie SEMICONDUCTOR NC7NP34 TinyLogic ULP Triple Buffer General Description The NC7NP34 is a triple buffer from Fairchild s Ultra Low Power ULP Series of TinyLogic Ideal for applications where battery life is critical this product is designed for ultra low power consumption within the Voc operating range of 0 9V to 3 6V Voc The internal circuit is composed of a minimum of inverter stages including the output buffer to enable ultra low static and dynamic power The NC7NP34 is designed for optimized power and speed and is fabricated with an advanced CMOS technology to achieve high speed low noise operation while maintaining extremely low CMOS power dissipation June 2003 Revised March 2004 Features W Space saving US8 package W Ultra small MicroPak Pb free package E 0 9V to 3 6V Voc supply operation E 3 6V overvoltage tolerant 5 at Voc from 0 9V to 3 6V B tpp 4 0 ns typ for 3 0V to 3 6V Voc 5 0 ns typ for 2 3V to 2 7V Voc 6 0 ns typ for 1 65V to 1 95V Voc 7 0 ns typ for 1 40V to 1 60V Voc 11 0 ns typ for 1 10V to 1 30V Voc 27 0 ns typ for 0 90V Voc W Power Off high impedance inputs and outputs E Static Drive lop loL 2 6 mA 3 00V Voc 2 1 mA Q 2 30V Voc 1 5 mA 1 65V Voc 1 0 mA 1 40V Voc 30 5 mA 1 10V Voc 20 pA 0 9V Voc W Low noise switching using design techniques of Quiet Series noise EMI reduction circuitry W Ultra low dynamic pow2. 125 typ Empty Sealed K8X Carrier 3000 Filled Sealed Trailer Hub End 75 typ Empty Sealed TAPE DIMENSIONS inches millimeters 400 z 400 1 2 00 REEL DIMENSIONS inches millimeters 1 00 0 25 TYP TAPE SLOT 4 o 1 75 3 50 0 05 d DETAIL X DETAIL X fe w SCALE 3X te Wo Tape A B C D N W1 w2 w3 Size Bm 7 0 0 059 0 512 0 795 2 165 0 331 0 059 0 000 0 567 W1 0 078 0 039 177 8 1 50 13 00 20 20 55 00 8 40 1 50 0 00 14 40 W1 2 00 1 00 www fairchildsemi com Physical Dimensions inches millimeters unless otherwise noted x 2 340 1 1 4 cs ez c B A ALL LEAD TIPS PIN 1 IDENT ALL LEAD TIPS 0 90 MAX 0 7040 10 S ii 0 10 0 00 0 17 0 27 cere eeraa NOTES A CONFORMS TO JEDEC REGISTRATION MO 187 B DIMENSIONS ARE IN MILLIMETERS C DIMENSIONS ARE EXCLUSIVE OF BURRS MOLD FLASH AND TIE BAR EXTRUSIONS D DIMENSIONS AND TOLERANCES PER ANSI Y14 5M 1982 MABO8AREVC 8 Lead US8 JEDEC MO 187 Variation CA 3 1mm Wide Package Number MAB08A 1 80 i 0 70 4 1 00 0 5 TYP LAND PATTERN RECOMMENDATION D
3. A 4050 to 85 C 10 ns V Note 1 Absolute Maximum Ratings are those values beyond which the safety of the device cannot be guaranteed The device should not be oper ated at these limits The parametric values defined in the Electrical Charac teristics tables are not guaranteed at the absolute maximum ratings The Recommended Operating Conditions table will define the conditions for actual device operation Note 2 l5 Absolute Maximum Rating must be observed Note 3 Unused inputs must be held HIGH or LOW They may not float Vec Ta 25 C 40 C to 85 C Symbol Parameter Units Conditions V Min Max Min Max Vin HIGH Level 0 90 0 65 x Voc 0 65 x Voc Input Voltage 1 10 lt Vcc lt 1 30 0 65 x Voc 0 65 x Vcc 1 40 lt Voc 1 60 0 65 x Voc 0 65 x Voc 1 65 lt Voc 1 95 0 65 x Voc 0 65 x Vcc 2 30 Voc lt 2 70 1 6 1 6 3 00 Vcc lt 3 60 2 1 2 1 Vit LOW Level 0 90 0 35 x Voc 0 35 x Voc Input Voltage 1 10 lt Vcc lt 1 30 0 35 x Vcc 0 35 x Vcc 1 40 lt Vgc lt 1 60 0 35 x Vcc 0 35 x Vcc 1 65 lt Vcc lt 1 95 0 35 x Voc 0 35 x Voc 2 30 Vcc lt 2 70 0 7 0 7 3 00 Vcc lt 3 60 0 9 0 9 Vou HIGH Level 0 90 Voc 0 1 Voc 0 1 Output Voltage 1 10 lt Voc 1 30 Vcg 0 1 Voc 0 1 1 40 lt Voc 1 60 Vcg 0 1 Voc 0 1 lop 7 20 uA 1 65 lt Voc 1 95 0 1 Voc 0 1 2 30 Vcc 2 70 Voc 0 1 Voc 0 1 3 00 lt Vcc 3 60 V
4. ETAIL A ER d 04 TYP GAGE PLANE ai i J Mee PLANE DETAIL A 0 20 0 55 r www fairchildsemi com VEdNZON NC7NP34 TinyLogic ULP Triple Buffer Physical Dimensions inches millimeters unless otherwise noted Continued Fairchild 0 8 B 0 825 0 375 0 125 6 i PIN 1 0 4 8X IDENTIFIE i 0 25 8X 0 55 i H 7 10 10 C Recommended Landpattern 0 15 A B C m 0 83 BOTTOM VIEW Notes 1 PACKAGE REGISTRATION WITH JEDEC IS ANTICIPATED 2 DIMENSIONS ARE IN MILLIMETERS 3 DRAWING CONFORMS TO ASME Y 14M 1994 MACO8AREVB 8 Lead MicroPak 1 6 mm Wide Package Number does not assume any responsibility for use of any circuitry described no circuit patent licenses are implied and Fairchild reserves the right at any time without notice to change said circuitry and specifications LIFE SUPPORT POLICY FAIRCHILD S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD SEMICONDUCTOR CORPORATION As used herein 1 Life support devices or systems are devices or systems 2 A critical component in any component of a life support which a
5. are intended for surgical implant into the device or system whose failure to perform can be rea body or b support or sustain life and c whose failure sonably expected to cause the failure of the life support to perform when properly used in accordance with device or system or to affect its safety or effectiveness instructions for use provided in the labeling can be rea sonably expected to result in a significant injury to the www fairchildsemi com user www fairchildsemi com 8
6. er Ordering Code Product Order Number Package Code Number Top Mark Package Description Supplied As NC7NP34K8X MABO8A NP34 8 Lead US8 JEDEC MO 187 Variation CA 3 1mm Wide 3k Units on Tape and Reel NC7NP34L8X MACO8A X7 8 Lead MicroPak 1 6 mm Wide 5k Units on Tape and Reel Battery Life vs Vcc Supply Voltage UP SP H Battery Life days UHS 52 09 12 15 18 25 33 5 Vec Supply Voltage TinyLogic is a registered trademark of Fairchild Semiconductor Corporation TinyLogic ULP and ULP A with up to 50 less power consumption can extend your battery life significantly Battery Life Vpattery Ieattery 9 Pudevice 24nrs day Where Paevice lcc Voc Cpo CU Voc f Assumes ideal 3 6V Lithium lon battery with current rating of 900mAH and derated 90 and device frequency at 10MHz with C 15 pF load Quiet Series and MicroPak are trademarks of Fairchild Semiconductor Corporation 2004 Fairchild Semiconductor Corporation DS500809 www fairchildsemi com 19 8 ejduj d1N 21607AuIL PEdNZON NC7NP34 Logic Symbol IEEE IEC 7 Connection Diagrams Pin Assignments for US8 1A 1Y 3 5 2A 3 5 2 3A e 3Y Pin Descriptions Top View Pin Names Description Ay Ag Input Pin One Orientation Diagram Yi Yo Y3 Output Function Table Top View Y A Input Outp
7. oc 0 1 Voc 0 1 V 1 10 lt Voc 1 30 0 75 x Voc 0 70 x Voc lop 0 5 mA 1 40 lt Voc lt 1 60 1 07 0 99 log 7 1 0 mA 1 65 lt Vcc lt 1 95 1 24 1 22 log 1 5 mA 2 30 Voc 2 70 1 95 1 87 lou 7 2 1 mA 3 00 Vcc lt 3 60 2 61 2 55 lop 2 6 mA www fairchildsemi com VEdNZON NC7NP34 DC Electrical Characteristics Continued Vec Ta 25 C Ta 40 C to 85 C Symbol Parameter Units Conditions V Min Max Min Max VoL LOW Level 0 90 0 1 0 1 Output Voltage 1 10 lt Voc lt 1 30 0 1 0 1 1 40 Voc lt 1 60 0 1 0 1 lo 20 pA 1 65 lt Vcc 1 95 0 1 0 1 2 30 lt Voc lt 2 70 0 1 0 1 3 00 lt Vcc lt 3 60 0 1 0 1 1 10 Vec lt 1 30 0 30 x Vcc 0 30 x Vcc lo 0 5 mA 1 40 lt Voc lt 1 60 0 31 0 37 lo 1 0 mA 1 65 lt Veg 1 95 0 31 0 35 lol 1 5 mA 2 30 lt Voc 2 70 0 31 0 33 lol 2 1 mA 3 00 x Voc x 3 60 0 31 0 33 lo 2 6 mA lin Input Leakage Current 0 90 to 3 60 0 1 0 5 HA O0 lt V lt 3 6V lorr Power Off Leakage Current 0 0 5 0 5 uA 0 lt Vj Vo x 3 6V loc Quiescent Supply Current 0 90 to 3 60 0 9 0 9 uA Vi 7 Vcc or GND AC Electrical Characteristics Symbol Parameter Vcc Tace Tae oW eI Re Units Conditions one V Min Typ Max Min Max umber Propagation Delay 0 90 27 0 tPLH 110 lt Vog lt 1 30 3 5 11 0 21 8 3 0 34 3 1 40 l
8. t Vcc lt 1 60 25 7 0 14 8 2 0 15 0 has 10 pF Figures 1 65 lt Vcc lt 1 95 2 0 6 0 12 0 1 5 12 2 RL 1 MQ 1 2 2 30 lt Voc lt 2 70 1 5 5 0 9 4 1 0 9 9 3 00 lt 3 60 1 0 4 0 8 3 1 0 9 0 tPHL Propagation Delay 0 90 30 0 tpiH 1 10 lt Vcc lt 1 30 4 0 11 0 22 8 3 5 37 3 1 40 lt Vcc lt 1 60 3 0 8 0 15 5 2 5 16 5 M 215 pF Figures 1 65 lt Vcc lt 1 95 25 6 0 12 6 2 0 13 6 RL 1 MQ 1 2 2 30 lt Vcc lt 2 70 2 0 5 0 9 9 1 5 10 8 3 00 Voc lt 3 60 1 5 4 0 8 7 1 0 9 5 Propagation Delay 0 90 32 0 tpiH 1 10 lt Vcc lt 1 30 5 0 13 0 25 9 4 0 46 3 1 40 lt Vog lt 1 60 4 0 9 0 17 8 3 5 18 2 E 30 pF Figures 1 65 lt Vcc lt 1 95 30 7 0 14 4 2 0 15 9 RL 1 MQ 1 2 2 30 lt Voc lt 2 70 2 0 6 0 11 3 1 5 12 8 3 00 lt Vec 3 60 1 5 5 0 9 2 1 0 10 7 Cin Input Capacitance 0 2 0 pF Cout Output Capacitance 0 4 0 pF Cpp OS TU3 Gi Su pF Vi OV or Voc Capacitance 10 MHz www fairchildsemi com 4 AC Loading and Waveforms 3ns INPUT OUTPUT FIGURE 2 AC Waveforms Vcc Symbol 3 3V 0 3V 2 5V 0 2V 1 8V 0 15V 1 5V 0 10V 1 2V 0 10V 0 9V Vni 1 5V Vcc 2 Vcc 2 Vcc 2 Vcc 2 Vcco 2 Vimo 1 5V Vcc 2 Vcc 2 Vcc 2 Vcc 2 Vcco 2 www fairchildsemi com VEdNZON NC7NP34 Tape and Reel Specification TAPE FORMAT for US8 Package Tape Number Cavity Cover Tape Designator Section Cavities Status Status Leader Start End
9. ut A Y L L Pin One H H H HIGH Logic Level L LOW Logic Level AAA represents Product Code Top Mark see ordering code Note Orientation of Top Mark determines Pin One location Read the Top Product Code Mark left to right Pin One is the lower left pin see diagram Pad Assignments for MicroPak 1A 3Y 2A 7 6 5 ves frao 1 2 3 1Y 3A 2Y Top Thru View www fairchildsemi com Absolute Maximum Ratings note 1 Supply Voltage Vcc DC Input Voltage Vin DC Output Voltage Vout HIGH or LOW State Note 2 Voc OV DC Input Diode Current lik Vin lt OV DC Output Diode Current lox Vout lt OV Vout gt Vcc DC Output Source Sink Current lop loL DC Vec or Ground Current per Supply Pin loc or Ground Storage Temperature Range o5Vios4ev Conditions Note 3 0 5V to 4 6V 0 5V to Voc 0 5V 0 5V to 4 6V 50 mA 50 mA 50 mA 50 mA 50 mA 65 C to 150 C Recommended Operating Supply Voltage Input Voltage Vin Output Voltage Vout HIGH or LOW State Voc OV Output Current in Voc 3 0V to 3 6V Voc 2 3V to 2 7V Voc 1 65V to 1 95V Voc 1 40V to 1 60V Voc 1 10V to 1 30V Voc 0 9V DC Electrical Characteristics Free Air Operating Temperature TA Minimum Input Edge Rate At AV Vin 0 8V to 2 0V Voc 3 0V 0 9V to 3 6V OV to 3 6V OV to Voc OV to 3 6V 12 6 mA 12 1 mA 1 5 mA 1 0 mA 40 5 mA 20 u
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FAIRCHILD NC7NP34 handbook