philips SAA5288 TV microcontroller with full screen On Screen Display (OSD) handbook
Contents
1. UIPIM esind UIPIM Z UIPIM 8SINd 103 UIDIM eSInd 0 eSInd e OINMd NOLLONN4A LHOd 3ALLVNH3LLTV 1O8MWAS 55 Lig XaH ssauaav TOEINAS 13 1997 Jun 24 Preliminary specification Philips Semiconductors SAA5288 TV microcontroller with full screen On Screen Display OSD NI NO LNO NO LNO 100 100 1 51 20 AYNLO d AYNLO d NI LXa L NI HOO 99 1 e GLXL 1 1S3M y 00 MOQVHS SNVuL HS3WO HSAW 9 dI8VSIG 1SV4 Ixeiejern o v ALIWV10d ALIHV lOd ALIV10d qai 4e1siDoH 1xeiejo JWYH4 J18vsia 51715 AV IdSId 0 1xejejer 0 Jejunoo 18uut MOT 0 0 MOT INMd L u amp iH INMd L 86 xoelS 957 e z 5 83 as LHOd 3ALLVNH3LITV2. SSA i SS SPN CIL 34 001 An Ly AE En i T euni 69 Hd jor 43 1997 Jun 24 Philips Semiconductors TV microcontroller with full screen On Screen Display OSD 14 EMC GUIDELINES If possible a ground plane under the whole IC should be present i e no signal tracks running underneath the IC as shown in Fig 22 The ground plane under the IC should be connected by the widest possible connection back to the ground connection of the PCB and electrolytic decoupling capacitor It should preferably not connect to other grounds on the way and no wire links should be present in this connection The use of wire links increases ground bounce by introducing inductance into the ground thereby reducing the electrolytic capacitor s decoupling efficiency The supply pins should be decoupled at the pin to the ground plane under the IC This is easily accomplished when using SM capacitors which are also most effective at high frequencies Preliminary specification SAA5288 Each supply pin should be connected separately to the power connection of the PCB preferably via at least one wire link which 1 May be replaced by a ferrite or inductor at a later point if necessary 2 Will introduce a small amount of inductance Signals connected to the 5 V supply e g via pull up resistors should be connected to the 5 V supply before the wire link to the IC i e not the I
3. 525 DISPLAY set to logic 1 when 525 line syncs are driving the display OSD I F Busy OSD interface busy logic 1 indicates that TXT Registers 0 to 16 can not currently be accessed Teletext Register 16 TXT16 WRITE only Y2 to YO sets vertical position of display area X1 to XO sets horizontal position of display area Teletext Register 17 TXT17 Write only FORCE 625 force display to 625 line mode FORCE 525 force display to 525 line mode SCREEN COL 2 to 0 defines colour displayed instead of TV picture and black background 1997 Jun 24 20 Philips Semiconductors TV microcontroller with full screen On Screen Display OSD 7 5 The display 7 5 1 INTRODUCTION The capabilities of the display are based on the requirements of level 1 teletext with some enhancements for use with locally generated on screen displays The display consists of 25 rows each of 40 characters with the characters displayed being those from rows 0 to 24 of the basic page memory If the TXT 7 STATUS ROW TOP bit is set row 24 is displayed at the top of the screen followed by row 0 but normally memory rows are displayed in numerical order The display memory stores 8 bit character codes which correspond to a number of displayable characters and control characters which are normally displayed as spaces The character set of the device is described in more detail in Section 8 7 5 2 CHARACTER MATRIX Each character is
4. LOW level output voltage HIGH level output voltage lot 2mA loH 2 MA 0 0 3 VRGBREF 0 4 output impedance 150 load capacitance DC output current output rise time between 10 and 90 C 50 pF output fall time LOW level output voltage between 90 and 10 C 50 pF lol 1 6 mA HIGH level output voltage lou 1 6 mA load capacitance between 10 and 9096 C 50 pF between 90 and 1096 C 50 pF tskew skew delay between any two HIGH level pull up output voltage LOW level output voltage lol 2 mA LOW level output current load capacitance FRAME HIGH level output voltage lo 8 mA LOW level output voltage LOW level output current lot 8 mA load capacitance 1997 Jun 24 38 Philips Semiconductors Preliminary specification TV microcontroller with full screen 52 On Screen Display OSD 5288 SYMBOL PARAMETER CONDITIONS Digital input outputs P0 0 7 P1 0 TO P1 5 P2 0 P2 7 AND P3 0 P3 4 LOW level input voltage 0 3 0 2Vpp 0 1 HIGH level input voltage 0 2Vpp 0 9 Vit VoL LOW level output voltage lol 3 2 mA 0 V load capacitance 50 P0 5 AND P0 6 ViL LOW level input voltage 0 3 0 2Vpp 0 1 3 V HIGH level input voltage 0 2Vpp 0 9 Vin Ci inp
5. 4 3 g I e 2 H PRH 2 g RM 5 HA gt ri amp aso aso AM x we 0 001 ar uM aym amp 4 4 10 euo we p Ely 6 uefa ue o ueo aso aso H soueunu 9 0 Lt wz eg A 8 1 I d xX A aso aso 5 p soueuinu 9 M F c E yoeq SoludeJb eudje aniq nig ido an q E punoiB aso aso P so geunu 0 0 1 H L eur udje 4 5 aso aso gt ido ke 5 EN 4 LI aso aso 4 C ral soueunu Z 0 ir 52006 pas T p aso aso n L SEI E 1 0 0 0 Ly peq m eudje xoelq y1q s aso aso d eg sum tmi amr x r eed E d 6 8 ez 2 9 9 S v L 0 d 4 4 4 4 q Zg q L 0 L L 0 L 0 L 0 t 0 0 L 0 L 0 t 0 lg L L 0 L L 0 0 L L 0 0 L L 0 0 L L 0 0 4 Sq S L L L L L L L 0 0 0 0 L L L L 0 0 0 0 q 1 1 0 0 0 0 0 0 0 0o
6. 1O8MWAS 55 Lig ssauaav TOEINAS 14 1997 Jun 24 Preliminary specification Philips Semiconductors SAA5288 TV microcontroller with full screen On Screen Display OSD 0 LOATAS 1 81 1 SNG Ozl ig 40 pesn si 1 15 5141 L LOATAS Ozl 81XL 519 021 perejueuo 40 pesn si 5141 SHAS 19008 0 peppe Jo 5845 yq 5845 Aui qneduioo euninj 10 0 9160 01 uejuM eq pue 95299 sojeorpur 3sueise eu o6 x 10 0109 5 OX L100 5 2100 2 5 LA cA Z 2 451 1 91 1xejejer Asnq aso AW1d SIC 929 ONIHUV3IO 8g H3A NOH WOH 1xeieje 9d AHOWNWAIM 349994 YOSHYNO LL 1 LLLXL 01 xejejer gOLLXL 3Hnioid NI LX3 L uosuno 109138 Oel dol MOU SNLVLS 99 6 1 99 elxL g 1xeie o e e lxL Z xeje e 29411 9 LHOd
7. Table 16 Display horizontal position xi x HSYNC DISPLAY us 0 0 17 2 0 1 1 0 1 The line on which the display area starts depends on whether the display is 625 line or 525 line and on the setting of the YO to Y2 bits in SFR TXT16 Table 17 gives the first display line for each setting of YO to Y2 for both 625 and 525 line display On the other field the display starts on the equivalent line Table 17 Display vertical position FIRST LINE FOR DISPLAY 625 LINE 525 LINE 42 28 30 34 22 26 lt N Oojojo ojo i 44 46 48 34 36 8 ur 3 40 i Philips Semiconductors Preliminary specification TV microcontroller with full screen On Screen Display OSD SAA5288 64 us 1 29 52 us 40 us TEXT DISPLAY AREA Ines 40 characters TV PICTURE AREA FIELD SCANNING AREA MGL122 Fig 8 625 line display format 63 55 us gt 52 us 243 263 lines lines TEXT DISPLAY AREA 40 characters TV PICTURE AREA FIELD SCANNING AREA MGL123 Fig 9 525 line display format 1997 Jun 24 29 Philips Semiconductors Preliminary specification TV microcontroller with full screen On Screen Display OSD SAA5288 7 15 Clock generator The oscillato
8. Table 2 Interrupts and vector address INTERRUPT SOURCE ipd Reset 000 External INTO 003 Timer 0 00B External INT1 013 Timer 1 01B Byte 1 C bus 02B Bit IAC bus 053 7 2 2 OFF CHIP MEMORY The SAA5288 does not support the use of off chip program memory or off chip data memory 7 2 3 IDLE AND POWER DOWN MODES Idle and Power down modes are not supported Consequently the respective bits in PCON are not available 7 2 4 UART FUNCTION The 80C51 UART is not available As a consequence the SCON and SBUF SFRs are removed and the ES bit in the IE SFR is unavailable 1997 Jun 24 Preliminary specification SAA5288 7 3 Additional features The following features are provided in addition to the standard 80C51 features 7 3 1 INTERRUPTS The external INT1 interrupt is modified to generate an interrupt on both the rising and falling edges of the INT1 pin when EX1 bit is set This facility allows for software pulse width measurement for handling of a remote control 7 3 2 BIT LEVEL I2C BUS INTERFACE For reasons of compatibility with the SAA5290 SAA5291 SAA5291A and SAA5491 all contain a bit level serial I O which supports the I2C bus P1 6 SCL and P1 7 SDA the serial I O pins These two pins meet the I2C bus specification concerning the input levels and output drive capability see The 2 and how to use it including specifications Consequently these two pins have an open drain output configura
9. q g 1997 24 Philips Semiconductors Preliminary specification TV microcontroller with full screen On Screen Display OSD SAA5288 CHARACTER LANGUAGE E W C12 C13 C14 23 24 40 5B 5C 5D 5E 5F 60 7B 7 7D 7E esee lololo ID eme Ell ITALIAN s 2 EE FRENCH of SPANISH oft fo sie eli ont TURKISH olm its fof POLISH S 6 11 gt sme 11001 8855 nmnmBOJU gt MUI IS GBI 28812 _ 9 1 9 Su senso oroan 11 1 ee zd s CZECH Qi We ARE RT AS A 1 MGL125 1 This language conforms to the EBU document SP492 or where superseded ETSI document pr ETS 300 706 with respect to C12 C13 C14 definition 2 This language is included for backward compatibility with previous generation of Philips
10. ASSA ZWMd v d nc 4394994 gt poy gt aq 3122 LINO1WLx 19599 Wad LLNI O Ld OL F Id OLNI C Ld Ld 9S 9 Ld vdas Z ld 91 22898494 INOHd33 1 88a 22 3aul 21 21 21 SS QSSA 14 L 20d 14 9 0d SSA S Od M oF M o M oF M v 0d o4 b ots pH Od 5 o 5 o 0 o 1 gt H M 5 0 4 gt H 4 4 g oF gt i t gt 88257 5 0 0d SSA QSSA OQV E d E gt zoaweed gt E gt gt 09dv 0 Ed SS 9INMd Z ed al JE um D 1 vYINMd S zd I enu INMd v E len gt uoneunjes cINMd Zd Ta gt sejjuoo LWMd eed T gt sseuiuDu 1
11. 24 SAA5288 Cursor Other display features Display timing Horizontal timing Vertical timing Display position Clock generator CHARACTER SETS Pan European Russian Greek Turkish Arabic English French Thai Arabic Hebrew LIMITING VALUES CHARACTERISTICS CHARACTERISTICS FOR THE I C BUS INTERFACE QUALITY SPECIFICATIONS APPLICATION INFORMATION EMC GUIDELINES PACKAGE OUTLINE SOLDERING Introduction Soldering by dipping or by wave Repairing soldered joints DEFINITIONS LIFE SUPPORT APPLICATIONS PURCHASE OF PHILIPS 22 COMPONENTS BUS Philips Semiconductors Preliminary specification TV microcontroller with full screen On Screen Display OSD SAA5288 FEATURES 260 characters in mask programmed ROM Display clock derived internally to reduce peripheral components to a minimum 1 1 General On chip TV control tuning Automatic FRAME output control with manual override e Hardware and software compatible with SAA5290 SAA5291 and SAA5296 Single 5 V power supply Standby mode for display hardware 525 line and 625 line display 12 x 10 character matrix RGBinterface to standard decoder ICs push pull output drive e SDIP52 package Single crystal oscillator for display and microcontroller Stable Display via slave synchronization to Horizontal Sync and Vertical Sync 2 GENERAL DESCRIPTION 1 2 Microcontroller The SAA5288 is a micr
12. DK 2300 COPENHAGEN 5 Tel 45 32 88 2636 Fax 45 31 57 0044 Finland Sinikalliontie 3 FIN 02630 ESPOO Tel 358 9 615800 Fax 358 9 61580920 France 4 Rue du Port aux Vins BP317 92156 SURESNES Cedex Tel 33 1 40 99 6161 Fax 33 1 40 99 6427 Germany HammerbrookstraBe 69 D 20097 HAMBURG Tel 49 40 23 53 60 Fax 49 40 23 536 300 Greece No 15 25th March Street GR 17778 TAVROS ATHENS Tel 30 1 4894 339 239 Fax 30 1 4814 240 Hungary see Austria India Philips INDIA Ltd Shivsagar Estate A Block Dr Annie Besant Rd Worli MUMBAI 400 018 Tel 91 22 4938 541 Fax 91 22 4938 722 Indonesia see Singapore Ireland Newstead Clonskeagh DUBLIN 14 Tel 353 1 7640 000 Fax 353 1 7640 200 Israel RAPAC Electronics 7 Kehilat Saloniki St PO Box 18053 TEL AVIV 61180 Tel 972 3 645 0444 Fax 972 3 649 1007 Italy PHILIPS SEMICONDUCTORS Piazza IV Novembre 3 20124 MILANO Tel 39 2 6752 2531 Fax 39 2 6752 2557 Japan Philips Bldg 13 37 Kohnan 2 chome Minato ku TOKYO 108 Tel 81 3 3740 5130 Fax 81 3 3740 5077 Korea Philips House 260 199 Itaewon dong Yongsan ku SEOUL Tel 82 2 709 1412 Fax 82 2 709 1415 Malaysia No 76 Jalan Universiti 46200 PETALING JAYA SELANGOR Tel 60 3 750 5214 Fax 60 3 757 4880 Mexico 5900 Gateway East Suite 200 EL PASO TEXAS 79905 Tel 9 5 800 234 7381 Middle East see Italy For all other countries apply to Philips Semiconductors
13. Fig 5 Control characters encountered between a hold graphics control character and a release graphics 1 FH control character are displayed as the last character displayed in graphics mode rather than as spaces From the hold graphics character until the first character displayed in graphics mode the held character is a space The start box OBH and end box OAH characters are used to define teletext boxes Two start box characters are required to begin a teletext box with the box starting between the 2 characters The box ends after an end box character has been encountered Preliminary specification SAA5288 The display can be set up so that different display modes are invoked inside and outside teletext boxes e g text inside boxes but TV outside This is described in Section 7 6 5 The normal size OCH double height ODH double width OEH and double size OFH control characters are used to change the size of the characters displayed If any double height or double size characters are displayed on a row the whole of the next row is displayed as spaces Double height display is not possible on either row 23 or row 24 The character in the position occupied by the right hand half of a double width or double size character is ignored unless it is a control character in which case it takes effect on the next character displayed This allows double width to b
14. bit will add a south east shadow to the text significantly enhancing its readability in mix mode Shadowing is shown in Fig 6 The readability of text can also be enhanced using meshing Meshing causes the VDS signal to switch so that when the text background colour should be displayed every other pixel is displayed from the video picture Text foreground pixels are always displayed The TXT4 BMESH bit enables meshing on areas of the screen within the text display area with black as the background colour The TXT4 CMESH bit has the same effect on areas with other background colours Meshing can only be invoked in areas displayed in text mode i e where the TXT5 TEXT IN and TXT5 BKGND IN bits are both set to logic 1 and in OSD boxes Meshed text can also be shadowed Meshing is illustrated in Fig 6 The TXT4 TRANS bit causes areas of black background colour to become transparent i e video is displayed instead of black background Black background transparency can also only be invoked in areas displayed in text mode i e where the TXT5 TEXT IN and TXT5 BKGND IN bits are both set to logic 1 and in OSD boxes PICTURE ON TEXT ON BACKGROUND ON EFFECT text mode black screen text mode background always black text mode TV mode mixed text and TV mode text mode TV picture outside text area 1997 Jun 24 Philips Semiconductors Preliminary specification TV microcontroller with full scre
15. pulse width between 0 and 42 33 us in much the same way as in the 6 bit PWMs The 7 least significant bits TDACL TD6 to TDACL TDO LSB extend certain pulses by a further 0 33 us e g if the 7 least significant bits are given the value 01H then 1 in 128 cycles is extended If the 7 least significant bits are given the value 02H then 2 in 128 cycles is extended and so forth The TPWM will not start to output a new value until after writing a value to TDACH Therefore if the value is to be changed TDACL should be written to before TDACH 7 3 6 1 TPWM High Byte Register TDACH Table 5 TPWM High Byte Register SFR address 7 6 5 4 3 2 1 0 PWE TD13 TD12 TD11 TD10 TD9 TD8 Table 6 Description of TDACH bits BIT SYMBOL DESCRIPTION If PWE is set to a logic 1 the TPWM is active and controls port line P2 0 If PWE is set to a logic 0 the port pin is controlled by the corresponding bit in the port SFR not used These 6 bits along with bit TD7 in the TDACL register control the pulse width period TD13 is the most significant bit 7 3 6 2 TPWM Low Byte Register Table 7 TPWM Low Byte Register SFR address D2H 7 6 5 4 3 2 1 0 TD7 TD6 TD5 TD4 TD3 TD2 TD1 TDO Table 8 Description of TDACL bits BIT SYMBOL DESCRIPTION TD7 This bit is used with bits TD13 to TD8 in the TDACH register to control the pulse width period TD6 to TDO These 7 bi
16. than 300 C it may remain in contact for up to 10 seconds If the bit temperature is between 300 and 400 C contact may be up to 5 seconds 1997 Jun 24 46 Preliminary specification SAA5288 Philips Semiconductors Preliminary specification TV microcontroller with full screen SAA5288 On Screen Display OSD 17 DEFINITIONS Data sheet status Objective specification This data sheet contains target or goal specifications for product development Preliminary specification This data sheet contains preliminary data supplementary data may be published later Product specification This data sheet contains final product specifications Limiting values Limiting values given are in accordance with the Absolute Maximum Rating System IEC 134 Stress above one or more of the limiting values may cause permanent damage to the device These are stress ratings only and operation of the device at these or at any other conditions above those given in the Characteristics sections of the specification is not implied Exposure to limiting values for extended periods may affect device reliability Application information Where application information is given it is advisory and does not form part of the specification 18 LIFE SUPPORT APPLICATIONS These products are not designed for use in life support appliances devices or systems where malfunction of these products can reasonably be expected to result in personal injur
17. 1O8MWAS 55 Lid 55 9 2991 1 3INVN 7O8NWAS 15 1997 Jun 24 Philips Semiconductors Preliminary specification TV microcontroller with full screen On Screen Display OSD SAA5288 7 4 2 SPECIAL FUNCTION REGISTERS BIT DESCRIPTION Table 11 SFR bit descriptions REGISTER FUNCTION Interrupt Enable Register IE disable all interrupts logic 0 or use individual interrupt enable bits logic 1 bit I2C bus interrupt enable logic 1 byte 1 C bus interrupt enable logic 1 enable Timer 1 overflow interrupt logic 1 enable external interrupt 1 logic 1 enable Timer 0 overflow interrupt logic 1 enable external interrupt O logic 1 Power Control Register PCON general purpose flag 1 i e flag 0 overflow flag 6 bit Pulse Width Modulator Control Registers PWMO to PWMT PWE activate this PWM and take control of respective port pin logic 1 PV5 to PVO binary value sets high time of PWM output Serial Interface Slave Address Register S1ADR ADR6 to ADRO I C bus slave address to which the device will respond Serial Interface Control Register S1CON CR2 to CRO clock rate bits start condition flag eooo interrupt flag 1997 Jun 24 16 Philips Semiconductors Preliminary specification TV microcontroller with full screen On Screen Display OS
18. 4 7 us tBuF bus free time 24 7 us tip SDA fall time lt 0 3 us lt 0 3 us note 4 lt 0 3 us Notes 1 This parameter is determined by the user software It must comply with the I C bus specification 2 This value gives the auto clock pulse length which meets the I C bus specification for the special crystal frequency Alternatively the SCL pulse must be timed by software 3 The rise time is determined by the external bus line capacitance and pull up resistor It must be less than 1 us 4 The maximum capacitance on bus lines SDA and SCL is 400 pF 1997 Jun 24 40 Preliminary specification Philips Semiconductors TV microcontroller with full screen On Screen Display OSD SAA5288 Buruy sng 52 02 04 010A e1varns uonipuoo LHW LS uonipuoo LHYLS pareado LLVG NS MON VLS GH au uonipuoo 5 10 LYYLS 105 1ndur vas 41 1997 24 Philips Semiconductors Preliminary specification TV microcontroller with full screen On Screen Display OSD SAA5288 12 QUALITY SPECIFICATIONS This device will meet Philips Semiconductors General Quality Specification for Business group Consumer Integrated Circuits SNW FQ 61 1 Part E Quality Reference Handbook order number 9398 510 63011 The principal requirements are s
19. ATUS ROW display row 24 below logic 0 or above logic 1 teletext page CURSOR ON display cursor at location pointed to by TXT9 and TXT10 logic 1 display characters in areas with the conceal attribute set logic 1 TOP BOTTOM display rows 0 to 11 logic 0 or 12 to 23 logic 1 when the double height bit is set DOUBLE HEIGHT display each character as twice normal height logic 1 BOX ON 24 enable teletext boxes in memory row 24 logic 1 BOX ON 1 23 enable teletext boxes in memory rows 1 to 23 logic 1 BOX ON 0 enable teletext boxes in memory row 0 logic 1 1997 Jun 24 19 Philips Semiconductors Preliminary specification TV microcontroller with full screen On Screen Display OSD SAA5288 REGISTER FUNCTION Teletext Register 8 TXT8 select bit I2C bus logic 0 or byte I C bus logic 1 Teletext Register 9 TXT9 WRITE only CURSOR FREEZE locks current cursor position logic 1 CLEAR MEMORY write 20H into every location in display memory logic 1 memory row to be accessed by TXT11 C5 to CO memory column to be accessed by TXT11 Teletext Register 11 TXT11 D7 to DO data byte written to or read from display memory Teletext Register 12 TXT12 READ only ROM VER R4 to RO mask programmable identification for character set DISPLAY ON power has been applied to the display hardware logic 1 Teletext Register 13 TXT13 PAGE CLEARING Set when software requested page clear in progress
20. BLE FRAME bit forces the FRAME output to a logic 0 Setting the TXTO AUTO FRAME bit causes the FRAME output to be active when just text is being displayed but to be forced to 0 when any video is being displayed This allows the de interlacing function to take place with virtually no software intervention Some TV architectures do not use the FRAME output but accomplish the de interlacing function in the vertical deflection IC under software control by delaying the start of the scan for one field by half a line so that lines in this field are moved up by one TV line In such TVs VSync may occur in the first half of the line at the start of an odd field and in the second half of the line at the start of an even field In order to obtain correct de interlacing in these circumstances theTXT1 FIELD POLARITY must be set to reverse the assumptions made by the vertical timing circuits on the timing of VSync in each field The start of the display may be delayed by a line The Field Polarity bit does not affect the FRAME output 1997 Jun 24 28 Preliminary specification SAA5288 7 14 Display position The position of the display relative to the HSync and VSync inputs can be varied over a limited range to allow for optimum TV set up The horizontal position is controlled by the XO and X1 bits in SFR TXT16 Table 16 gives the time from the active edge of the HSync signal to the start of the display area for each setting of X0 and X1
21. C side This will prevent if from being polluted and conduct or radiate noise onto signal lines which may then radiate themselves OSCGND should connect only to the crystal load capacitors and not GND GND 5V electrolytic decoupling capacitor 2 uF other GND connections wire links Voou Yooo SM decoupling capacitors 10 to 100 nF VDDA LLLLLLLLLLI under IC GND plane GND connection note no wire links under IC GND plane ETT P Ss Vssp VSSA MGL127 Fig 22 Power supply and GND connections for SOT247 1 1997 Jun 24 44 Philips Semiconductors Preliminary specification TV microcontroller with full screen SAA5288 On Screen Display OSD 15 PACKAGE OUTLINE SDIP52 plastic shrink dual in line package 52 leads 600 mil SOT247 1 lt seating plane a Ph 1 index DIMENSIONS mm are the original dimensions A A2 UNIT max min max b bi mm 5 08 0 51 4 0 1 3 0 8 Note 1 Plastic or metal protrusions of 0 25 mm maximum per side are not included OUTLINE REFERENCES EUROPEAN VERSION JEDEC EIAJ PROJECTION 95 03 11 ISSUE DATE 1997 Jun 24 45 Philips Semiconductors
22. D SAA5288 REGISTER FUNCTION Serial Interface Data Register S1DAT Serial Interface Status Register S1STA READ only STAT4 to STATO I2C bus interface status Serial Interface Data Register STBIT READ I C bus data bit input Serial Interface Data Register 5181 WRITE 2 data bit output Serial Interface Interrupt Register S1INT SI I C bus interrupt flag Serial Interface Control Register STSCS READ serial data input at SDA clock LOW to HIGH transition flag E read bit finished flag write bit finished flag clock stretching enable logic 1 enable serial I O logic 1 Serial Interface Control Register S1SCS WRITE serial data output at SDA serial clock output at SCL E clock LOW to HIGH transition flag clock stretching enable logic 1 enable serial I O logic 1 Software ADC Control Register SAD comparator output indicating that analogue input voltage greater than DAC voltage logic 1 CH1 and CHO ADC input channel selection bits see Table 11 initiate voltage comparison logic 1 this bit is automatically reset to logic 0 SAD7 to SAD4 4 MSB s of DAC input value Software ADC Control Register SADB SAD3 to SADO 4 LSB s of DAC input value 1997 Jun 24 17 Philips Semiconductors Preliminary specification TV microcontroller with full screen On Screen Display OSD SAA5288 REGISTER FUNCTION
23. D 0 SAAS288 0 O INTEGRATED CIRCUITS DATA SHEET SAA5288 TV microcontroller with full screen On Screen Display OSD Preliminary specification 1997 Jun 24 File under Integrated Circuits 1002 Philips PHILIPS Semiconductors DH LI p Philips Semiconductors Preliminary specification TV microcontroller with full screen On Screen Display OSD CONTENTS 1 FEATURES 1 1 General 1 2 Microcontroller 1 3 Display 2 GENERAL DESCRIPTION 3 QUICK REFERENCE DATA 4 ORDERING INFORMATION 5 BLOCK DIAGRAM 6 PINNING INFORMATION 6 1 Pinning 6 2 Pin description 7 FUNCTIONAL DESCRIPTION 7 1 Microcontroller 7 2 80C51 features not supported 7 2 1 Interrupt priority 7 2 2 Off chip memory 7 2 3 Idle and Power down modes 7 2 4 UART function 7 3 Additional features 7 3 1 Interrupts 7 3 2 Bit Level I2C bus Interface 7 3 3 Byte Level I2C bus Interface 7 3 4 LED support 7 3 5 6 bit PWM DACs 7 3 6 14 bit PWM DAC 7 3 7 Software ADC 7 4 Microcontroller Interfacing 7 4 1 Special Function Register map 7 4 2 Special Function Registers bit description 7 5 The display 7 5 1 Introduction 7 5 2 Character matrix 7 5 3 Page attributes 7 5 4 East west selection 7 5 5 National option characters 7 6 The twist attribute 7 6 1 On screen display symbols 7 6 2 Language group identification 7 6 3 525 line operation 7 6 4 Control characters 7 6 5 Display modes 7 7 On Screen Display boxes 7 8 Screen colour 1997 Jun
24. HSYNC VSYNC CRT DISPLAY RGB VDS M MGL120 Fig 7 Timing configuration Philips Semiconductors TV microcontroller with full screen On Screen Display OSD 7 13 Vertical timing The vertical display timing also resynchronizes to every sync pulse received This means that the device can produce a stable display on both 625 and 525 line screens Display starts on the 41st line of each field and continues for 250 lines or until the end of the field Normally television displays are interlaced i e only every other TV line is displayed on each field It is normal to de interlace teletext displays to prevent the displayed characters flickering up and down In many TV designs this is achieved by modulating the vertical deflection current slightly in such a way that odd fields are shifted up and even fields are shifted down on the screen so that lines 1 and 314 2 and 315 etc are overlaid The FRAME output is provided to facilitate this If the active edge of Vsync occurs in the first half of a TV line this is an even field and the FRAME output should be a logic 0 for this field Similarly if VSync is in the second half of the line this is an odd field and FRAME should be a logic 1 The algorithm used to derive FRAME is such that a consistent output will be obtained no matter where the VSync signal is relative to the HSync signal even if VSync occurs at the start and mid points of a line Setting the TXTO DISA
25. Marketing amp Sales Communications a worldwide company Netherlands Postbus 90050 5600 PB EINDHOVEN Bldg VB Tel 31 40 27 82785 Fax 31 40 27 88399 New Zealand 2 Wagener Place C P O Box 1041 AUCKLAND Tel 64 9 849 4160 Fax 64 9 849 7811 Norway Box 1 Manglerud 0612 OSLO Tel 47 22 74 8000 Fax 47 22 74 8341 Philippines Philips Semiconductors Philippines Inc 106 Valero St Salcedo Village Box 2108 MCC MAKATI Metro MANILA Tel 63 2 816 6380 Fax 63 2 817 3474 Poland UI Lukiska 10 PL 04 123 WARSZAWA Tel 48 22 612 2831 Fax 48 22 612 2327 Portugal see Spain Romania see Italy Russia Philips Russia Ul Usatcheva 35A 119048 MOSCOW Tel 7 095 755 6918 Fax 7 095 755 6919 Singapore Lorong 1 Toa Payoh SINGAPORE 1231 Tel 65 350 2538 Fax 65 251 6500 Slovakia see Austria Slovenia see Italy South Africa S A PHILIPS Pty Ltd 195 215 Main Road Martindale 2092 JOHANNESBURG P O Box 7430 Johannesburg 2000 Tel 27 11 470 5911 Fax 27 11 470 5494 South America Rua do Rocio 220 5th floor Suite 51 04552 903 Sao Paulo SAO PAULO SP Brazil Tel 55 11 821 2333 Fax 55 11 829 1849 Spain Balmes 22 08007 BARCELONA Tel 34 3 301 6312 Fax 34 3 301 4107 Sweden Kottbygatan 7 Akalla S 16485 STOCKHOLM Tel 46 8 632 2000 Fax 46 8 632 2745 Switzerland Allmendstrasse 140 CH 8027 Z RICH Tel 41 1 488 2686 Fax 41 1 481 7730 Taiwan Philips
26. SYNC P0 4 VDS P0 5 R P0 6 G P0 7 B 5 RGBREF i c P3 4 PWM7 i c COR Vssp IREF FRAME MGL114 Fig 2 Pin configuration 1997 Jun 24 5 Philips Semiconductors Preliminary specification TV microcontroller with full screen On Screen Display OSD 6 2 Pin description Table 1 SDIP52 package SAA5288 SYMBOL DESCRIPTION P2 0 TPWM P2 1 PWMO P2 2 PWM1 P2 3 PWM2 P2 4 PWM3 P2 5 PWM4 P2 6 PWM5 P2 7 PWM6 P3 0 ADCO P3 1 ADC1 3 2 4002 P3 3 ADC3 P3 4 PWM7 Port 2 8 bit open drain bidirectional port with alternative functions P2 0 TPWM is the output for the 14 bit high precision PWM P2 1 PWMO to P2 7 PWM6 are the outputs for the 6 bit PWMs 0 to 6 Port 3 8 bit open drain bidirectional port with alternative functions P3 0 ADCO to P3 3 ADC3 are the inputs for the software ADC facility P3 4 PWM7 is the output for the 6 bit PWM7 Vssp PO 1 2 P0 3 4 P0 5 P0 6 Digital ground Port 0 8 bit open drain bidirectional port P0 5 and P0 6 have 10 mA current sinking capability for direct drive of LEDs P0 7 Vssp Digital ground Internally connected this pin should be connected to digital ground C C C Internally connected this pin should be connected to digital ground Internally connected this pin should be connected to digital ground i IREF 1997 Jun 24 Reference current input for an
27. Semiconductors 6F No 96 Chien Kuo N Rd Sec 1 TAIPEI Taiwan Tel 886 2 2134 2865 Fax 886 2 2134 2874 Thailand PHILIPS ELECTRONICS THAILAND Ltd 209 2 Sanpavuth Bangna Road Prakanong BANGKOK 10260 Tel 66 2 745 4090 Fax 66 2 398 0793 Turkey Talatpasa Cad No 5 80640 G LTEPE ISTANBUL Tel 90 212 279 2770 Fax 90 212 282 6707 Ukraine PHILIPS UKRAINE 4 Patrice Lumumba str Building B Floor 7 252042 KIEV Tel 380 44 264 2776 Fax 380 44 268 0461 United Kingdom Philips Semiconductors Ltd 276 Bath Road Hayes MIDDLESEX UB3 5BX Tel 44 181 730 5000 Fax 44 181 754 8421 United States 811 East Arques Avenue SUNNYVALE CA 94088 3409 Tel 1 800 234 7381 Uruguay see South America Vietnam see Singapore Yugoslavia PHILIPS Trg N Pasica 5 v 11000 BEOGRAD Tel 381 11 625 344 Fax 381 11 635 777 Internet http www semiconductors philips com Building BE p P O Box 218 5600 MD EINDHOVEN The Netherlands Fax 31 40 27 24825 Philips Electronics N V 1997 SCA54 All rights are reserved Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner The information presented in this document does not form part of any quotation or contract is believed to be accurate and reliable and may be changed without notice No liability will be accepted by the publisher for any consequence of its use Publication thereof does not convey nor imply any li
28. Setting the TXT9 CURSOR FREEZE bit causes the cursor to stay in its current position no matter what happens to the active row and column positions This means that the software can read data from the memory e g TOP table information without affecting the position of the cursor Cursor Philips Semiconductors TV microcontroller with full screen On Screen Display OSD 7 10 Other display features Setting the TXT7 DOUBLE HEIGHT bit causes the normal height of all display characters to be doubled and the whole of the display area to be occupied by half of the display rows Characters normally displayed double height will be displayed quadruple height when this bit is set Rows 12 to 24 can be enlarged rather than rows 0 to 11 by setting the TXT7 TOP BOTTOM bit This feature can be used for either a user controlled enlarge facility or to provide very large characters for the OSD The display of rows 0 to 23 can be disabled by setting the TXTO DISPLAY STATUS ROW ONLY bit The Fastext prompt row packet 24 can be displayed from the extension packet memory by setting the TXTO DISPLAY X 24 bit When this bit is set the data displayed on display row 24 is taken from row 0 in the extension packet memory When the display from extension packet block option is enabled the display will revert to row 24 of the basic page memory if bit 3 of the link control byte in packet 27 is set 7 11 Display timing The display synchroni
29. TV microcontroller with full screen On Screen Display OSD 16 SOLDERING 16 1 Introduction There is no soldering method that is ideal for all IC packages Wave soldering is often preferred when through hole and surface mounted components are mixed on one printed circuit board However wave soldering is not always suitable for surface mounted ICs or for printed circuits with high population densities In these situations reflow soldering is often used This text gives a very brief insight to a complex technology A more in depth account of soldering ICs can be found in our IC Package Databook order code 9398 652 90011 16 2 Soldering by dipping or by wave The maximum permissible temperature of the solder is 260 C solder at this temperature must not be in contact with the joint for more than 5 seconds The total contact time of successive solder waves must not exceed 5 seconds The device may be mounted up to the seating plane but the temperature of the plastic body must not exceed the specified maximum storage temperature max If the printed circuit board has been pre heated forced cooling may be necessary immediately after soldering to keep the temperature within the permissible limit 16 3 Repairing soldered joints Apply a low voltage soldering iron less than 24 V to the lead s of the package below the seating plane or not more than 2 mm above it If the temperature of the soldering iron bit is less
30. Timer Counter Control Register TCON Timer 1 overflow flag TR1 Timer 1 run control bit TRO Timer 0 run control bit IT1 ITO Interrupt 1 type control bit Interrupt O edge flag Interrupt O type control bit 14 bit PWM MSB Register TDACH activate this 14 bit PWM and take over port pin logic 1 TD13 to TD8 6 MSBs of 14 bit number to be output by the 14 bit PWM 14 bit PWM LSB Register TDACL 8 LSBs of 14 bit number to be output by the 14 bit PWM Timer 0 High byte THO THO7 to THOO 8 MSBs of Timer 0 16 bit counter TH17 to TH10 8 MSBs of Timer 1 16 bit counter Timer 0 Low byte TLO TLO7 to TLOO 8 LSBs of Timer 0 16 bit counter Timer 1 Low byte TL1 TL17 to 8 LSBs of Timer 1 16 bit counter Timer Counter Mode Control Register TMOD GATE gating control C T counter or timer selector M1 MO mode control bits Teletext Register 0 TXTO WRITE only AUTO FRAME FRAME output switched off automatically if any video displayed logic 1 DISPLAY STATUS display row 24 only logic 1 ROW ONLY DISABLE FRAME FRAME output always low logic 1 1997 Jun 24 18 Philips Semiconductors Preliminary specification TV microcontroller with full screen On Screen Display OSD SAA5288 REGISTER FUNCTION Teletext Register 1 TXT1 WRITE only VSYNC in first half of the line logic 0 or second half of the line logic 1 at start of even field H POLARITY HSYNC input positiv
31. alog current generator connected to Vssa via a 27 resistor Philips Semiconductors Preliminary specification TV microcontroller with full screen On Screen Display OSD SAA5288 DESCRIPTION SYMBOL FRAME Vssp 28 De interlace output synchronised with the VSYNC pulse to produce non interlaced display by adjustment of the vertical deflection circuits Internally connected this pin should be connected to digital ground COR 29 Open drain active LOW output which allows selective contrast reduction of the TV picture to enhance a mixed mode display RGBREF 3 DC input voltage to define the output HIGH level on the RGB pins 3 Pixel rate output of the BLUE colour information 3 S 1 2 3 Pixel rate output of the GREEN colour information Video data switch push pull output for dot rate fast blanking HSYNC VSYNC G R Schmitt trigger input for a TTL level version of the horizontal sync pulse the polarity of this pulse is programmable by register bit TXT1 H POLARITY Schmitt trigger input for a TTL level version of the vertical sync pulse the polarity of this pulse is programmable by register bit TXT1 V POLARITY VDDA 3 5 V display power supply 4 4 8 9 1 2 XTALIN 12 MHz crystal oscillator input XTALOUT 4 12 MHz crystal oscillator output RESET If the reset input is HIGH for at least 3 machine cycles 36 oscillator periods while the oscillator i
32. ame as teletext boxes created using the teletext boxing control characters OAH and When one of these characters occurs the display size changes appropriately to normal size for BCH double height for BDH double width for BEH and double size for BFH and an OSD box starts from the next character position set after The OSD box ends either at the end of the row of text or at the next size implying OSD character When an OSD box is ended using another size implying OSD character the box ends at the position of the control character set at This arrangement allows displays to be created without blank spaces at the ends of the OSD boxes To prevent teletext control characters from affecting the display of the OSD message the flash teletext box conceal separated graphics twist and hold graphics functions are all reset at the start of an OSD box as they are at the start of the row In order to allow the most commonly used display attributes to be set up before the box starts the foreground colour background colour and mosaics on off attributes are not reset The text within an OSD box is always displayed in text mode i e as if the Text On and Bkgnd On bits are both set to a logic 1 The type of display produced inside an OSD box is therefore dependant on the states of the TXT4 SHADOW ENABLE TXT4 TRANS ENABLE TXT4 BMESH ENABLE and TXT4 CMESH ENABLE register bits as described previously OSD boxes can only be
33. ashing etc or displayable characters When the control characters are excluded this gives an addressable set of 212 characters at any given time More characters than this were required to give the language coverage required from the first version of the device The TXT4 East West bit was introduced to allow the meanings of character codes DOH to FFH to be changed depending on where in Europe the device was to be used This bit is still used with the other language variants although the name East West may not make much sense 7 5 5 NATIONAL OPTION CHARACTERS The interpretation of some character codes between 20H and 7FH depends on the C12 to C14 language control bits stored in row 25 of the display page The interpretation of the C12 to C14 language control bits is dependant on the East West bit 7 6 The twist attribute In many of the character sets the twist serial attribute code 1BH can be used to switch to an alternative basic character code table e g to change from the Hebrew alphabet to the Arabic alphabet on an Arabic Hebrew device For some national option languages the alternative code table is the default and a twist control character will switch to the first code table The display hardware on the devices allows one language to invoke the alternative code table by default when the East West register bit is a logic 0 and another when the bit is a logic 1 In all of the character sets defined so far the
34. cense under patent or other industrial or intellectual property rights Printed in The Netherlands 547047 00 01 pp48 Philips Semiconductors Date of release 1997 Jun 24 Document order number 9397 750 01856 make things better S PHILIPS
35. creen On Screen Display OSD PJONM sniels HOd 0 9 qeu3 111940 2 Jojuiog g oa OOV 55 3ALLIVNH3LLTV HO 108WAS 55 dew jeroeds AQEL YSLSIDAY 5 171 ZL uonoeg UAAIB si uonduosep 4q Y4S eui pue uonoes si dew Y4S 991 sng jenas eujejur ue dew SHAS ewou se jeedde jepooep 1xejeJel ui 51015 89 eu NYH S yoiym uonoun jeroeds eyeudued eui 6209 941 12 1997 24 Preliminary specification Philips Semiconductors SAA5288 TV microcontroller with full screen On Screen Display OSD 185 005 ejep snq zl 18095 sniels snq zl 18095 jdnueju SNQ Dzl Jeues ejep SNQ ODal Jeues SNQ Oal Jeues JO4 U09 SNQ Dazl BYES 5 SNQ Dal Jeues 2 1 UIPIM eSInd 9
36. defined by a matrix 12 pixels wide and 10 pixels high When displayed each pixel is 142 ms wide and 1 TV line in each field high Preliminary specification SAA5288 7 5 3 PAGE ATTRIBUTES Columns 0 to 9 of row 25 of the memory are treated by the display as if they contain display control information from teletext page headers The bits which affect the display are shown in Table 12 Columns 0 to 4 are not used If C5 newsflash or C6 subtitle is set the display uses the display mode defined in register TXT6 C7 suppress header causes the header row row 0 to be displayed as if every character was a space C10 inhibit display displays every character on all rows as if it was a space C12 to C14 language control bits cause certain character codes to be interpreted differently see Section 7 5 5 Table 12 Page attributes PAGE ATTRIBUTE FIELD 0 DISPLAY PAGE MEMORY 39 ROW 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 page attributes 0 z 23 MGL116 Fig 4 Display page organisation 1997 Jun 24 Philips Semiconductors TV microcontroller with full screen On Screen Display OSD 7 5 4 EAST WEST SELECTION In common with their predecessors these devices store teletext pages as a series of 8 bit character codes which are interpreted as either control codes to change colour invoke fl
37. displayed in TV mode i e when the Picture On SFR bit is alogic 1 and the Text On SFR bit is a logic 0 both inside and outside text boxes and for both normal and newsflash subtitle pages The display of OSD boxes is not affected by the C7 suppress header and C10 inhibit display control bits stored in row 25 of the page memory 1997 Jun 24 26 Preliminary specification SAA5288 7 8 The register bits TXT17 SCREEN COL2 0 can be used to define a colour to be displayed in place of the TV picture and the black background colour If the bits are all set to 0 the screen colour is defined as transparent and the TV picture and background colour are displayed as normal Screen colour Screen colour is displayed from 10 5 to 62 5 us after the active edge of the HSync input and on TV lines 23 to 310 inclusive for a 625 line display and lines 17 to 260 inclusive for a 525 line display When the screen colour has been redefined no TV picture is displayed so the Frame de interlace output can be activated if the SFR bits controlling FRAME are set up to allow this Table 15 Screen colours SCREEN COL 2 SCREEN COL 1 0 SCREEN COL 0 SCREEN COLOUR transparent 7 9 If the TXT7 CURSOR ON bit is set a cursor is displayed The cursor operates by reversing the background and foreground colours in the character position pointed to by the active row and column bits in the TXT9 and TXT10 SFRs
38. e going logic 0 or negative going logic 1 VSYNC input positive going logic 0 or negative going logic 1 PRD4 to PRDO page request data Teletext Register 4 TXT4 WRITE only EAST WEST western languages selected logic 0 or Eastern languages selected logic 1 DISABLE DBL HGHT disable display of double height teletext control codes logic 1 in OSD boxes B MESH ENABLE enable meshing of area with black background logic 1 C MESH ENABLE enable meshing of area with other background colours logic 1 TRANS ENABLE set black background to transparent i e video is displayed logic 1 SHADOW ENABLE enable south east shadowing logic 1 Teletext Register 5 TXT5 WRITE only BKGND OUT background colour displayed outside teletext boxes logic 1 BKGND IN background colour displayed inside teletext boxes logic 1 COR OUT COR output active outside teletext boxes logic 1 COR IN COR output active inside teletext boxes logic 1 text displayed outside teletext boxes logic 1 TEXT IN text displayed inside teletext boxes logic 1 video picture displayed outside teletext boxes logic 1 PICTURE ON IN video picture displayed inside teletext boxes logic 1 Teletext Register 6 TXT6 WRITE only See TXT5 this register has the same meaning as TXT5 but is only invoked if either newsflash C5 or subtitle C6 bit in row 25 of the basic page memory is set Teletext Register 7 TXT7 WRITE only ST
39. e used to produce a display in which blank spaces do not appear when character attributes are changed The size implying OSD BCH to BFH control characters have been included in this device to allow OSD messages to be generated easily These characters are described in full later in this document mosaics character 7FH contiguous 1997 Jun 24 23 mosaics character 7FH separated MGL117 Fig 5 Contiguous and separated mosaics Philips Semiconductors TV microcontroller with full screen On Screen Display OSD 7 6 5 DISPLAY MODES The device signals the TV s display circuits to display the R G and B outputs of the device rather than the video picture by outputting a logic 1 on the VDS output The way in which this signal is switched is controlled by the bits in the TXT5 and TXT6 SFRs There are 3 control functions text on background on and picture on Separate sets of bits are used inside and outside teletext boxes so that different display modes can be invoked Also different SFRs are used depending on whether the newsflash C5 or subtitle C6 bits in row 25 of the basic page memory are set SFR TXT6 or not SFR TXT5 This allows the software to set up the type of display required on newsflash and subtitle pages e g text inside boxes TV picture outside this will be i
40. en On Screen Display OSD SAA5288 normal mix mode SE shadowing 22 1 A meshing meshing and shadowing EY AG TV picture black text foreground colour 3 text background colour MGL118 Fig 6 Meshing and shadowing Table 14 Enhanced display mode selection SHADOW TRANS BMESH CMESH DISPLAY 0 normal unshadowed unmeshed text 0 text with coloured backgrounds solid black background meshed text with coloured backgrounds solid black background transparent text with coloured backgrounds meshed black background transparent shadowed text with coloured backgrounds meshed black background solid shadowed text with coloured backgrounds solid black background meshed shadowed text with all backgrounds meshed shadowed text with coloured backgrounds solid black background transparent shadowed text with coloured backgrounds meshed black background transparent 1997 Jun 24 25 Philips Semiconductors TV microcontroller with full screen On Screen Display OSD 7 7 Screen Display boxes The size implying OSD control characters BCH to BFH are intended to allow OSD messages to be displayed OSD boxes are not the s
41. hown in Tables 18 to 20 Table 18 Acceptance tests per lot note 1 TEST REQUIREMENTS Mechanical cumulative target 80 ppm Electrical cumulative target 80 ppm Table 19 Processability tests by package family note 2 TEST REQUIREMENTS solderability 796 LTPD mechanical 1596 LTPD solder heat resistance lt 15 Table 20 Reliability tests by process family note 3 TEST CONDITIONS REQUIREMENTS operational life 168 hours at T 150 C 1000 FPM at T 70 C humidity life temperature humidity bias 1000 hours 85 C 85 RH 2000 FPM or equivalent test temperature cycling tO Tstgimax 2000 FPM performance Table 21 Reliability tests by device type TEST CONDITIONS REQUIREMENTS ESD and latch up ESD Human body model 100 pF 1 5 2000 V ESD Machine model 200 pF 0 Q 200 V 100 mA 1 5 x absolute maximum Notes to Table 16 to 18 1 ppm fraction of defective devices in parts per million 2 LTPD Lot Tolerance Percent Defective 3 fraction of devices failing at test condition in Failures Per Million 1997 Jun 24 42 Preliminary specification Philips Semiconductors SAA5288 TV microcontroller with full screen On Screen Display OSD 13 APPLICATION INFORMATION Aejdsip SALO sjeubis 1 AL 921 TOW uoneoddy 2 614 SSA
42. language which invokes the alternative code table is the same for either setting of the East West bit 7 6 1 ON SCREEN DISPLAY SYMBOLS In the character sets character codes 80H to 9FH are OSD symbols An editor is available to allow these characters to be redefined by the customer 1997 Jun 24 22 Preliminary specification SAA5288 7 6 2 LANGUAGE GROUP IDENTIFICATION The devices have a readable register TXT12 which contains a 5 bit identification code TXT12 ROM VER R4 to TXT12 ROM VER RO which is intended for use in identifying which character set the device is using 7 6 3 525 LINE OPERATION When used with 525 line display syncs the devices modify their displays such that the bottom line is omitted from each character cell The character sets have been designed to be readable under these circumstances and anyone designing OSD symbols is advised to consider this mode of operation 7 6 4 CONTROL CHARACTERS Character codes 00H to 1FH BOH to B7H and BCH to BFH are interpreted as control characters which can be used to change the colour of the characters the background colour the size of characters and various other features All control characters are normally displayed as spaces The alphanumerics colour control characters 00H to 07H are used to change colour of the characters displayed The graphics control characters 10H to 17H change the colour of the characters and switch the display into a mode whe
43. nvoked without any further software intervention when such a page is acquired When teletext box control characters are present in the page memory whichever is relevant of the Boxes On Row 0 Boxes On Row 1 23 and Boxes On Row 24 SFR bits in TXT17 must be set if the display mode is to change in the box These bits are present to allow boxes in certain areas of the screen to be disabled so that teletext boxes can be used for the display of OSD messages without the danger of subtitles in boxes which may also be in the page memory being displayed The use of teletext boxes for OSD messages has been superseded in this device by the OSD box concept described later but these bits remain to allow teletext boxes to be used if required The COR bits in the TXT5 and TXT6 SFRs control when the COR output of the device is activated pulled down This output is intended to act on the TV s display circuits to reduce the contrast of the video display when it is active Table 13 Display control bits Preliminary specification SAA5288 The result of contrast reduction is to improve the readability of the text in a mixed text and video display The bits in the TXT5 and TXT6 SFRs allow the display to be set up so that for example the areas inside teletext boxes will be contrast reduced when a subtitle is being displayed but that the rest of the screen will be displayed as normal video Setting the shadow TXT4 SHADOW ENABLE
44. ocontroller for use in televisions with an OSD generator compatible with the Economy Teletext TV microcontroller family SAA5290 SAA5291 SAA5296 etc TV control facilities are provided by an e 80C51 microcontroller core e 16 kbyte mask programmed ROM e 256 bytes of microcontroller RAM on chip industry standard 80C51 microcontroller and a e Eight 6 bit Pulse Width Modulator PWM outputs for 1 kbyte DRAM is included for OSD memory control of TV analog signals Hardware and software compatibility with the Economy One 14 bit PWM for Voltage Synthesis tuner control Teletext TV microcontroller family minimizes the changes Four 8 bit Analog to Digital Converters ADCs required to develop a TV control function for areas where s teletext is not broadcast 2 high current open drain outputs for directly driving LED s etc The device cannot acquire Teletext but is based on a Teletext device Therefore throughout this document references are made to Teletext especially when describing the Display OSD section The Display OSD Switchable bit or byte oriented 2C bus interface 1 3 Displa section is fully compatible with a Teletext display and has Single page 1024 x 8 on board On Screen Display all the features associated with Teletext i e double OSD memory height width flash teletext boxes graphics etc Double size width and height capability for OSD The Display section is described with reference to Tele
45. p 1euojsno GSO uodo jeuoreN 13431 abed jo ay uo juepuedep a 271 980 ido soiudeJ6 ezis aso aso 7 d EE Oh ok aignop yeu i eseojol aso 1do 00 soudes6 1 aso aso ei Li 4 piou ep 3 0 OF ajqnop aso 6 uisu aso aso ul yq af ror aso puno46 1do ido 1uBieu 9215 aso aso yoeq Uu 0 0 L jeuuou Jeu jeu Sues jeuuou xoqueis L L peos 6 L E joie xogpua I 32 2 FO Uum ESHUN Pa BR MN at t atte mum PI TEE uam nisu numm mu uuu a Ea ih ss cp mc cu lb E lal
46. pecial Function Register PWMO to PWM7 The PWM outputs are alternative functions of Port 2 and P3 4 The PWE bit in the SFR for the port corresponding to the PWM should be set to logic 1 for correct operation of the PWM e g if PWMO is to be used P2 1 should be set to logic 1 setting the port pin to high impedance 7 3 5 1 Pulse Width Modulator Registers to PWM7 Table 3 Pulse Width Modulator Registers see Table 10 for addresses 7 6 5 4 3 2 1 0 PWE PV5 PV4 PV3 PV2 PV1 PVO Table 4 Description of PWMn bits n 0 to 7 SYMBOL DESCRIPTION If PWE is set to a logic 1 the corresponding PWM is active and controls its assigned port pin If PWE is set to la logic 0 the port pin is controlled by the corresponding bit in the port SFR not used The output of the PWM is a pulse of period 21 33 us with a pulse HIGH time determined by the binary value of these 6 bits multiplied by 0 33 us PV5 is the most significant bit 1997 Jun 24 9 Philips Semiconductors Preliminary specification TV microcontroller with full screen On Screen Display OSD SAA5288 7 3 6 14 BIT PWM DAC One 14 bit DAC is available to allow direct control of analogue sections of the television The 14 bit PWM is controlled using Special Function Registers TDACL and TDACH The output of the TPWM is a pulse of period 42 66 us The 7 most significant bits TDACH TD13 MSB to TDACH TD8 and TDACL TD7 alter the
47. r circuit is a single stage inverting amplifier in a Pierce oscillator configuration The circuitry between OSCIN and OSCOUT is basically an inverter biased to the transfer point A crystal must be used as the feedback element to complete the oscillator circuitry It is operated in parallel resonance OSCIN is the high gain amplifier input and OSCOUT is the output To drive the device externally OSCIN is driven from an external source and OSCOUT is left open circuit MLC110 1 The values of C1 and C2 depend on the crystal specification C1 C2 2C Fig 10 Oscillator circuit external clock not connected MLC111 Fig 11 Oscillator circuit driven from external source 1997 Jun 24 30 Philips Semiconductors Preliminary specification TV microcontroller with full screen On Screen Display OSD SAA5288 8 CHARACTER SETS The two Pan European character sets are shown in Figs 13 and 14 The character sets for Russian Greek Turkish Arabic English French Thai and Arabic Hebrew are available on request 8 1 Pan European Knee e Q EY L lt gt MGL133 Fig 12 Pan European geographical coverage 1997 Jun 24 31 SAA5288 Preliminary specification TV microcontroller with full screen On Screen Display OSD Philips Semiconductors jes ueedoun3 ueg 21 04 e dsiq ajqeuya
48. re the codes in columns 2 3 6 and 7 of the character table see the character table above are displayed as the block mosaic characters in columns 2a 3a 6a and 7a The display of mosaics is switched off using one of the alphanumerics colour control characters The new background character 1DH the background colour of the display sets the background colour equal to the current foreground colour The black background character 1CH changes the background colour to black independently of the current foreground colour The background colour control characters in the upper half of the code table BOH to B7H are additions to the normal display control characters which allow the background colour to be changed to any colour with a single control character and independently of the foreground colour The background colour is changed from the position of the background colour control character Philips Semiconductors TV microcontroller with full screen On Screen Display OSD Displayable characters between a flash 08H and a steady 09H control character will flash on and off Displayable characters between a conceal display 18H character and an alphanumerics or graphics control character are displayed as spaces unless the TXT7 REVEAL bit is set The contiguous graphics 19H and separated graphics 1AH characters control the way in which mosaic shapes are displayed The difference between the two is shown in
49. s running the device is reset this pin should be connected to via a 2 2 uF capacitor 5 V microcontroller power supply P1 0 INT1 P1 1 TO P1 2 INTO P1 3 INT1 P1 6 SCL P1 7 SDA Port 1 8 bit open drain bidirectional port with alternative functions P1 0 INT1 is external interrupt 1 can be triggered on the rising falling edge of pulse P1 1 TO is the counter timer 0 P1 2 INTO is the external interrupt 0 P1 3 T1 is the counter timer 1 P1 7 SDA is the serial data port for the 2 P1 6 SCL is the serial clock input for the I2C bus 1997 Jun 24 Philips Semiconductors TV microcontroller with full screen On Screen Display OSD 7 FUNCTIONAL DESCRIPTION 7 1 Microcontroller The functionality of the microcontroller used with this family is described with reference to the industry standard 80C51 microcontroller A full description of its functionality can be found in 80C51 Based 8 bit Microcontrollers Data Handbook IC20 Using the 80C51 as a reference the changes made to this family fall into two categories Features not supported by the SAA5288 Features found on the SAA5288 but not supported by the 80C51 7 2 80651 features not supported 7 2 1 INTERRUPT PRIORITY The IP SFR is not implemented and all interrupts are treated with the same priority level The normal priority of interrupts is maintained within the level
50. ses to the device s HSync and VSync inputs A typical configuration is shown in Fig 7 Preliminary specification SAA5288 The HSync and VSync signals are derived from the signals driving the deflection coils of the TV Locking the display to the signals from the scan circuits allows the device to give a stable display under almost all signal conditions The polarity of the input signals which the device is expecting can be set using the TXT1 H polarity and TXT1 V polarity bits If the polarity bit is a logic 0 a positive going signal is expected if it is a logic 1 a negative going signal is expected 7 12 Horizontal timing Every time an HSync pulse is received the display resynchronizes to its leading edge To get maximum display stability the HSync input must have fast edges free of noise to ensure that there is no uncertainty in the timing of the signal to which the display synchronisation circuits must lock The display area starts 17 2 us into the line and lasts for 40 us The display area will be in the centre of the screen if the HSync pulse is aligned with line flyback signal Therefore it is better to derive HSync directly from the line flyback or from an output of the line output transformer than from say slicing the sandcastle signal as this would introduce delays which would shift the display to the right CVBS TUNER IF 1997 Jun 24 VIDEO DECODING SYNC CIRCUITS SAA5288 27
51. t lt gt lt gt COM IIIS MGL130 5 K S Zs 0606 Fig 19 Arabic Hebrew geographical coverage 36 1997 Jun 24 Philips Semiconductors Preliminary specification TV microcontroller with full screen On Screen Display OSD SAA5288 9 LIMITING VALUES In accordance with the Absolute Maximum Rating System IEC 134 SYMBOL PARAMETER CONDITIONS MIN MAX UNIT supply voltage all supplies V input voltage any input V Note 1 This value has an absolute maximum of 6 5 V independent of Vpp 10 CHARACTERISTICS Vpp 5 V 1096 Vss 0 V Tamb 20 to 70 C unless otherwise specified SYMBOL PARAMETER CONDITIONS TYP Supplies Vpp supply voltage 5 0 microcontroller supply current 15 IDDA analog supply current 8 mA display supply current 15 30 RESET LOW level input voltage 0 3 0 2Vpp 0 1 V Vit Vin HIGH level input voltage 0 7Vpp Vpp 0 3 V li input leakage current 10 10 HSYNC AND VSYNC Vin switching threshold falling Vince switching threshold rising Vhys hysteresis voltage 1997 24 37 Philips Sem iconductors TV microcontroller with full screen On Sc reen Display OSD PARAMETER CONDITIONS Preliminary specification SAA5288 Digital out puts R G AND B note 1
52. teletext decoders Fig 14 National option characters 1997 Jun 24 33 Philips Semiconductors TV microcontroller with full screen On Screen Display OSD Preliminary specification SAA5288 8 2 Russian 8 3 Greek Turkish RY 05 5 595 050005050000 RRR RK 1 lt gt SL 0 5555595 E SS 006 RRS x zl pS 247 MGL128 Fig 15 Russian geographical coverage MGL129 Fig 16 Greek Turkish geographical coverage 1997 Jun 24 34 Philips Semiconductors Preliminary specification TV microcontroller with full screen On Screen Display OSD SAA5288 84 Arabic English French PBS 5 990090 506065 XQ lt gt 1 57 5 Nd 5 2 Son 0 coe 0909 ERS 09 ed RSS 0 5 oe RENO OK 00 229 005 co MGL131 Fig 17 Arabic English French geographical coverage 8 5 Thai P lt x lt gt lt gt 009900 XQ LIRRAS MGL132 Fig 18 Thai geographical coverage 1997 Jun 24 35 ion t iminary specifica Prel Philips Semiconductors SAA5288 TV microcontroller with full screen On Screen Display OSD Arabic Hebrew 8 6 ORY SON Io SRG SRA x g
53. text to allow software compatibility with the Economy Teletext TV microcontroller family Enhanced display features including meshing shadowing and additional display attributes 3 QUICK REFERENCE DATA SYMBOL PARAMETER Vpp supply voltage all supplies IDDM microcontroller supply current display supply current Tamb operating ambient temperature 20 70 1997 24 3 Philips Semiconductors Preliminary specification TV microcontroller with full screen On Screen Display OSD SAA5288 4 ORDERING INFORMATION PACKAGE TYPE NUMBER NAME DESCRIPTION VERSION SAA5288PS nnn SDIP52 plastic shrink dual in line package 52 leads 600 mil SOT247 1 5 BLOCK DIAGRAM Yppp XTALIN XTALOUT OSCGND TEXT INTERFACE RESET address 1 interrupt TIMER COUNTER p P1 0 to P1 7 P0 0 to 7 P3 0 to P3 7 P2 0 to P2 7 Fig 1 Block diagram 1997 Jun 24 4 Philips Semiconductors Preliminary specification TV microcontroller with full screen On Screen Display OSD SAA5288 6 PINNING INFORMATION 6 1 Pinning P2 0 TPWM P1 5 P2 1 PWMO 1 4 P2 2 PWM1 P1 7 SDA P2 3 PWM2 P1 6 SCL P2 4 PWM3 P1 3 T1 P2 5 PWM4 P1 2 INTO P2 6 PWM5 1 1 0 P2 7 PWM6 P1 0 INT P3 0 ADCO VDDM P3 1 ADC1 RESET P3 2 ADC2 XTALOUT P3 3 ADC3 XTALIN 5 OSCGND SAA5288 P0 0 VDDD P0 1 VDDA P0 2 VSYNC P0 3 H
54. tion All the four following modes of the I C bus are supported Master transmitter Master receiver Slave transmitter Slave receiver Three SFRs support the function of the bit level I2C bus hardware S1INT S1BIT and 51505 are enabled by setting register bit TXT8 I2C SELECT to logic 0 7 3 8 BYTE LEVEL I2C BUS INTERFACE The byte level serial I O supports the I2C bus protocol P1 6 SCL and P1 7 SDA are the serial I O pins These two pins meet 2 specification concerning the input levels and output drive capability Consequently these two pins have an open drain output configuration The byte level I2C bus serial port is identical to the 1 C bus serial port on the 8xC552 The operation of the subsystem is described in detail the 8xC552 data sheet described in 80C51 Based 8 bit Microcontrollers Data Handbook 1020 Four SFRs support the byte level 1 C bus hardware S1CON S1STA S1DAT and S1ADR They are enabled by setting register bit TXT8 12 SELECT to logic 1 7 3 4 LED SUPPORT Port pins P0 5 and 6 have a 10 mA current sinking capability to enable LEDs to be driven directly Philips Semiconductors Preliminary specification TV microcontroller with full screen On Screen Display OSD SAA5288 7 39 5 6 BITPWM DACs Eight 6 bit DACs are available to allow direct control of analogue sections of the television Each low resolution 6 bit DAC is controlled by its associated S
55. ts extend certain pulses by a further 0 33 us 1997 Jun 24 10 Philips Semiconductors TV microcontroller with full screen On Screen Display OSD 7 3 7 SOFTWARE ADC Up to 4 successive approximation ADCs can be implemented in software by making use of the on chip 8 bit DAC and multiplexed voltage comparator The software ADC uses 4 analog inputs which are multiplexed with P3 0 to P3 3 Table 9 ADC input channel selection CH1 CHO INPUT PIN 0 0 P3 3 ADC3 0 1 P3 0 ADCO 1 0 P3 1 ADC1 1 1 3 2 4002 P3 0 P3 1 MULTIPLEXER P3 2 P3 3 CH1 CHO REF 1997 Jun 24 11 Preliminary specification SAA5288 The control of the ADC is achieved using the Special Function Registers SAD and SADB SAD CH1 and SAD CHO select one of the four inputs to pass to the comparator The other comparator input comes from the DAC whose value is set by SAD SAD7 MSB to SAD SAD4 and SADB SAD3 to SADB SADO LSB The setting of the value SAD SAD7 to SAD SAD4 must be performed at least 1 instruction cycle before the setting of SAD ST to ensure comparison is made using the correct SAD SAD7 to SAD SADA value The output of the comparator is SAD VHI andis valid after 1 instruction cycle following the setting of SAD ST to logic 1 VH1 8 BIT DAC REF SAD7 to SADO MGL115 Fig 3 SAD block diagram Preliminary specification Philips Semiconductors SAA5288 TV microcontroller with full s
56. ut capacitance LOW level output voltage lo 10 mA 0 CL load capacitance HIGH level input voltage input capacitance LOW level output voltage lo 3 mA load capacitance between 3 and 1 V Analog inputs IREF DC input current ADCO ADC1 and ADC2 Crystal oscillator OSCIN LOW level input voltage HIGH level input voltage Ci input capacitance 10 pF 1997 Jun 24 39 Philips Semiconductors Preliminary specification TV microcontroller with full screen On Screen Display OSD SAA5288 PARAMETER CONDITIONS output capacitance CRYSTAL SPECIFICATION note 2 nominal frequency load capacitance series capacitance Tamb 25 C parallel capacitance Tamb 25 C resonance resistance Tamb 25 C temperature range adjustment tolerance Tamb 25 C 50 x 1076 drift 30 x 10 6 Notes 1 All RGB current is sourced from the RGBREF pin The maximum effective series resistance between RGBREF and the and B pins is 150 2 Crystal order number 4322 143 05561 11 CHARACTERISTICS FOR THE I C BUS INTERFACE SYMBOL SPECIFICATION 2C PARAMETER INPUT OUTPUT EGE SCL timing tiow SCL LOW time 24 7 us note 1 24 7 us tic SCL rise time 1 0 us note 3 1 0 us SDA timing data set up time 2250 ns data hold time 20 ns lSU STA repeated START set up time 2
57. y Philips customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify Philips for any damages resulting from such improper use or sale 19 PURCHASE OF PHILIPS 12 COMPONENTS Purchase of Philips 22 components conveys a license under the Philips IC patent to use the components in the 12C system provided the system conforms to the I C specification defined by Philips This specification can be ordered using the code 9398 393 40011 1997 Jun 24 47 Philips Semiconductors Argentina see South America Australia 34 Waterloo Road NORTH RYDE NSW 2113 Tel 61 2 9805 4455 Fax 61 2 9805 4466 Austria Computerstr 6 A 1101 WIEN P O Box 213 Tel 43 1 60 101 Fax 43 1 60 101 1210 Belarus Hotel Minsk Business Center Bld 3 r 1211 Volodarski Str 6 220050 MINSK Tel 375 172 200 733 Fax 375 172 200 773 Belgium see The Netherlands Brazil see South America Bulgaria Philips Bulgaria Ltd Energoproject 15th floor 51 James Bourchier Blvd 1407 SOFIA Tel 359 2 689 211 Fax 359 2 689 102 Canada PHILIPS SEMICONDUCTORS COMPONENTS Tel 1 800 234 7381 China Hong Kong 501 Hong Kong Industrial Technology Centre 72 Tat Chee Avenue Kowloon Tong HONG KONG Tel 852 2319 7888 Fax 852 2319 7700 Colombia see South America Czech Republic see Austria Denmark Prags Boulevard 80 PB 1919
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