LINEAR TECHNOLOGY - 1 LTC3808 handbook
Contents
1. 0 3V to Vin 0 3V Storage Ambient Temperature Range 65 C to 125 C Vpg Erg 0 3V to 2 4V Junction Temperature Note 3 125 C SW SENSE Voltages 2V to Vin 1V 10V Max Lead Temperature Soldering 10 sec PODUD on eeu use 0 3V to 10V GN16 300 C PACKAGE ORDER INFORMATION TOP VIEW ORDER PART TOP VIEW ORDER PART Puer Fr ai NUMBER GND sw NUMBER 27 ria LTC3808EDE PLLLPF SENSE LTC3808EGN TRACK SS 31 112 SYNC MODE Vin PGOOD 41 m TRACK SS SENSE h PGOOD TG E E DE PART VFB BG TS MARKING mi 14 LEAD an PASTE DFN 3808 ig i 125 C Oja 37 C W GN PACKAGE EXPOSED PAD PIN 15 IS GND 16 LEAD PLASTIC SSOP MUST BE SOLDERED TO PCB Tumax 125 C 130 C W Consult LTC Marketing for parts specified with wider operating temperature ranges ELECTRICAL CHARACTERISTICS The indicates specifications which apply over the full operating temperature range otherwise specifications are at T 25 C Viy 4 2V unless otherwise noted PARAMETER CONDITIONS MIN TYP MAX UNITS Main Control Loops Input DC Supply Current Note 4 Normal Operation 350 500 uA Sleep Mode 105 150 uA Shutdown RUN 0V 9 20 uA UVLO Vin UVLO Threshold 200mV 9 20 uA Undervoltage Lockou2. TYPICAL APPLICATIONS VIN 2 75V TO 8V SYNC MODE PLLLPF MP IPRG Si7540DP 1 PGOOD SENSE Vout 2 5V ITH LTC3808EDE SW AT 5Vjn MN TOV Si7540DP To 1 Cour L VISHAY IHLD 2525CZ 01 Cour SANYO 4TPB150MC 3808 F11 Figure 11 550kHz Synchronous DC DC Converter with Internal Soft Start VIN 2 75V TO 8V VIN SENSE MP TG Si3447BDV Vout _ LTC3808EDE i 2A MN 3 TROVES Si3460DV VEB L VISHAY IHLD 2525CZ 01 D ON SEMI MBRM120L OPTIONAL 3808 F12 Figure 12 750kHz Synchronous DC DC Converter with External Soft Start Ceramic Output Capacitor 24 une LTC3808 TYPICAL APPLICATIONS Synchronizable Synchronous DC DC Converter with Output Tracking VIN 2 75V TO 8V 10uF SYNC MODE VIN __ 1G Si7540DP L 1 SENSE Your 1 8V ITH LTC3808EDE SW AT 5Vjn MN 5175400 L VISHAY IHLP 2525CZ 01 Cour SANYO 4TPB150MC Vout Vx 3808 TA02 Resistor Sensing Synchronous DC DC Converter with Spread Spectrum Modulation VIN 2 75V TO 8V SYNC MODE 1000pF PLLLPF 2200pF IPRG PGOOD Vout 1 3808 1 2A TRACK SS L VISHAY IHLP 2525CZ 01 Cour SANYO 4TPB150MC Rsense DALE 0 25W 3808 3808f LI MER 29 LTC3808 PACKAGE DESCRIPTION DE Package 14 Lead Plastic DFN 4mm x 3mm Reference LTC DWG 05 08 1708 POOOQOOD ees
3. gt MN Vout Vout fosc lRippLE Burst Mode Operation Considerations The choice of Rps oyy and inductor value also determines the load current at which the LTC3808 enters Burst Mode operation When bursting the controller clamps the peak inductor current to approximately 1 AVSENSE MAX BURST PEAK 4 Roson 3808f 15 LTC3808 APPLICATIONS INFORMATION The corresponding average current depends onthe amount of ripple current Lower inductor values higher Inippi E will reduce the load current at which Burst Mode operation begins The ripple current is normally set so that the inductor current is continuous during the burst periods Therefore IRIPPLE lt IBURST PEAK This implies a minimum inductance of Vin Vout Vout fosc Luin A smaller value than could be used in the circuit although the inductor current will not be continuous during burst periods which will result in slightly lower efficiency In general though it is a good idea to keep IRIPPLE comparable to IguasT PEAK Inductor Core Selection Once the value of L is known the type of inductor must be selected High efficiency converters generally cannot afford the core loss found in low cost powdered iron cores forc ing the use of more expensive ferrite molypermalloy or Kool Mu cores Actual core loss is independent of core size for a fixed inductor value but is very depen
4. i D LTC3808 TECHNOLOGY No Low synchronous DC DC Controller with Output Tracking FEATURES DESCRIPTION Programmable Output Voltage Tracking The LTC 3808 is a synchronous step down switching Sense Resistor Optional regulator controller that drives external complementary Spread Spectrum Modulation for Low Noise power MOSFETs using few external components The Constant Frequency Current Mode Operation for constant frequency current mode architecture with MOSFET Excellent Line and Load Transient Response Vps sensing eliminates the need for a current sense m Wide Range 2 75V to 9 8V resistor and improves efficiency Miedo Ud to Vin Burst Mode operation provides high efficiency operation Low Dto auto oratione 100 Duy Cici at light loads 100 duty cycle provides low dropout operation extending operating time in battery powered True for Frequency Locking or Adjustment systems Frequency Range 250kHz to 750kHz Selectable Burst Mode Pulse Skipping Forced The switching frequency can be programmed up to 750kHz Continuous Operation allowing the use of small surface mount inductors and Auxiliary Winding Regulation capacitors For noise sensitive applications the LTC3808 m Internal Soft Start Circuitry can be externally synchronized from 250kHz to 750kHz Power G
5. 14 13 12 11 109 REF 1 254 MIN 150 165 229 244 150 1577 5 817 6 198 3 810 3 988 i 0165 0015 lt lt 0250BSC RECOMMENDED SOLDER PAD LAYOUT 12345678 WRITE 45 0532 10688 004 0098 0 38 0 10 1 35 1 75 0 102 0 249 007 0098 0 178 0 249 1 TYE k 016 050 008 012 m 0 406 1 270 0 203 0 305 0 635 NOTE TYP BSC 1 CONTROLLING DIMENSION INCHES INCHES 2 DIMENSIONS ARE IN MILLIMETERS 3 DRAWING NOT TO SCALE DIMENSION DOES NOT INCLUDE MOLD FLASH MOLD FLASH SHALL NOT EXCEED 0 006 0 152mm PER SIDE DIMENSION DOES NOT INCLUDE INTERLEAD FLASH INTERLEAD FLASH SHALL NOT EXCEED 0 010 0 254mm PER SIDE 3808f zi Information furnished by Linear Technology Corporation is believed to be accurate and reliable However no responsibility is assumed for its use Linear Technology Corporation makes no represen tation that the interconnection of its circuits as described herein will not infringe on existing patent rights LI MER LTC3808 TYPICAL APPLICATIONS 550kHz Pulse Skipping Mode Synchronous DC DC Converter with Ceramic Output Capacitor PLLLPF LTC3808EDE IPRG PGOOD TRACK SS ITH 5 SYNC MODE 2 V m G Vout 2 5V 2A L VISHAY IHLP 2525CZ 01 3808 TA04 RELATED PARTS PART NUMBER DESCRIPTIO
6. 36V Very Low Output Tracking Duty Cycle Operation 5mm x 5mm QFN Package LTC3736 2 Phase Rsense Dual Synchronous Controller with 2 75V lt Vin lt 9 8V 0 6V lt Voyt lt Vin 4mm x 4mm QFN Output Tracking LTC3736 1 Low EMI 2 Phase Dual Synchronous Controller with Integrated Spread Spectrum for 20dB Lower EMI Output Tracking 2 75V lt Vy lt 9 8V LTC3737 2 Phase No Rsense Dual DC DC Controller with Output Tracking 2 75V lt lt 9 8V 0 6V lt Voyt lt Vin 4mm x 4mm QFN PolyPhase is a trademark o Linear Technology Corporation Linear Technology Corporation 1630 McCarthy Blvd Milpitas CA 95035 7417 408 432 1900 FAX 408 434 0507 www linear com 3808f LT TP 0305 500 PRINTED IN THE USA TECHNOLOGY TECHNOLOGY CORPORATION 2005
7. A S909 0S 1 70 0 05 _ 2 20 0 05 2 SIDES in lee 0 25 0 05 lt 0 50 BSC 3 30 0 05 2 SIDES 0000000 se RECOMMENDED SOLDER PAD PITCH AND DIMENSIONS 4 00 0 10 2 SIDES 3 00 0 10 2 SIDES PIN 1 TOP MARK SEE NOTE 6 0 200 REF 0 75 0 05 NOTE 1 70 0 10 SIDES mE 0 00 0 05 0 50 BSC 3 30 0 10 gt 2 SIDES BOTTOM VIEW EXPOSED PAD 1 DRAWING PROPOSED TO BE MADE VARIATION OF VERSION WGED 3 IN JEDEC PACKAGE OUTLINE 229 2 DRAWING NOT TO SCALE 3 ALL DIMENSIONS ARE IN MILLIMETERS 4 DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLUDE MOLD FLASH MOLD FLASH IF PRESENT SHALL NOT EXCEED 0 15mm ON ANY SIDE 5 EXPOSED PAD SHALL BE SOLDER PLATED 6 SHADED AREA IS ONLY A REFERENCE FOR PIN 1 LOCATION ON THE TOP AND BOTTOM OF PACKAGE 20 0 38 0 10 4 PIN 1 NOTCH DE14 DFN 1203 0 05 LTC3808 PACKAGE DESCRIPTION GN Package 16 Lead Plastic SSOP Narrow 150 Inch Reference LTC DWG 05 08 1641 189 196 045 005 i 48001 4978 009 gt 0 229 16 15
8. a review of control loop theory referto Application Note 76 A second more severe transient is caused by switching in loads with large 1uF supply bypass capacitors The discharged bypass capacitors are effectively put in parallel With Cour causing a rapid drop in No regulator deliver enough current to prevent this problem if the load switch resistance is low and it is driven quickly The only solution is to limit the rise time of the switch drive so that the load rise time is limited to approximately 25 Ci gap Thus a 10uF capacitor would be require 250us rise time limiting the charging current to about 200mA Design Example As a design example assume will be operating from a maximum of 4 2V down to a minimum of 2 75V powered by a single lithium ion battery Load current requirement is a maximum of 2A but most of the time it will be in a standby mode requiring only 2mA Efficiency at both low and high load currents is important Burst Mode operation at light loads is desired Output voltage is 1 8V The IPRG pin will be left floating so the maximum current sense threshold AVSENSE MAX is approximately 125mV Maximum Duty Cycle VOUT _ 65 59 VIN MIN From Figure 1 SF 82 AVSENSE MAX 0 0320 loUT MAX PT 5 Rps ON MAX g 03 ore A 0 032 P channel MOSFET in Si7540DP is close to this value 22 LTC3808 APPLICATIONS INFORMATION The N channel MOSFET in Si7
9. and the SYNC MODE when using spread spectrum modulation operation SYNC MODE Pin 2 Pin 3 This pin performs four func tions 1 auxiliary winding feedback input 2 external clock synchronization input for phase locked loop 3 Burst Mode pulse skipping or forced continuous mode select and 4 enable spread spectrum modulation opera tion in pulse skipping mode Applying a clock with fre quency between 250kHz to 750kHz causes the internal oscillator to phase lock to the external clock and disables Burst Mode operation but allows pulse skipping at low load currents To select Burst Mode operation at light loads tie this pin to Vin Grounding this pin selects forced continuous operation which allows the inductor current to reverse Tying this pin to Veg selects pulse skipping mode In these cases the frequency of the internal oscillator is set by the voltage on the PLLLPF pin Tying to a voltage between 1 35V to 0 5V enables spread spectrum modulation operation In this case an internal 2 6uA pull down cur rent source helps to set the voltage at this pin by tying a resistor with appropriate value between this pin and Do not leave this pin floating TRACK SS Pin 3 Pin 4 Tracking Input for the Controller or Optional External Soft Start Input This pin allows the start up of Voyy to track the external voltage at this pin using an external resistor divider Tying this pin to Viy allows Voyr start up with the intern
10. is typically about 210ns However as the peak sense voltage peak Rps ow decreases the minimum on time gradually increases up to about 260ns This is of particular concern in forced continuous applications with low ripple current at light loads If forced continuous mode is selected and the duty cycle falls below the minimum on time requirement the output will be regulated by overvoltage protection loN MIN lt Efficiency Considerations The efficiency of a switching regulator is equal to the output power divided by the input power times 100 It is often useful to analyze individual losses to determine what is limiting efficiency and which change would produce the most improvement Efficiency can be expressed as Efficiency 10096 L1 L2 L3 where L1 L2 etc arethe individual losses as a percentage of input power Although all dissipative elements in the circuit produce losses four main sources usually account for most of the losses in LTC3808 circuits 1 LTC3808 DC bias current 2 MOSFET gate charge current 3 IR losses and 4 transition losses 1 The Viy pin current is the DC supply current given in the Electrical Characteristics which excludes MOSFET driver currents Viy current results in a small loss that increases with Viy 2 MOSFET gate charge current results from switching the gate capacitance of the power MOSFET Each time a MOSFET gate is switched from low to high to low again a
11. the same time To function properly the control scheme requires that the MOSFETs used are intended for DC DC switching applications Many power MOSFETs particularly P chan nel MOSFETs are intended to be used as static switches and therefore are slow to turn on or off Reasonable starting criteria for selecting the P channel MOSFET are that it must typically have a gate charge Qc less than 25nC to 30nC at 4 5Vgs and a turn off delay to orr of less than approximately 140ns However due to differences in test and specification methods of various MOSFET manufacturers and in the variations in Qc and tp orr With gate drive Viy voltage the P channel MOSFET ultimately should be evaluated in the actual LTC3808 application circuit to ensure proper operation Shoot through between the P channel and N channel MOSFETs can most easily be spotted by monitoring the input supply current As the input supply voltage in creases if the input supply current increases dramatically then the likely cause is shoot through Note that some MOSFETs that do not work well at high input voltages e g 3808f 14 LTC3808 APPLICATIONS INFORMATION Vin gt OV may work fine at lower voltages e g 3 3V Selecting the N channel MOSFET is typically easier since fora given Rps on the gate charge and turn on and turn off delays are ich smaller than for a P channel MOSFET Using a Sense Resistor Asense resistor Roense can connec
12. 0mV DIV 3808 G11 10ms DIV Vin 4 2V Rta 5902 1 69k FIGURE 11 CIRCUIT Shutdown RUN Threshold vs Temperature vs Temperature Temperature 0 606 2 55 1 20 2 50 0 604 Vin RISING _ 245 1 15 0 602 E 5 S 0 600 235 140 T 5 230 s 0 598 Vin FALLING z ES 225 1 05 0 596 2 20 0 594 2 15 1 00 60 40 20 0 20 40 60 80 100 60 40 20 0 20 40 60 80 100 60 40 20 0 20 40 60 80 100 TEMPERATURE C TEMPERATURE C TEMPERATURE C 3808 G12 3808 G13 3808 G14 Maximum Current Sense TRACK SS Start Up Current vs Threshold vs Temperature Temperature 195 IPRG FLOAT 104 FTRAGKISS OV 3 2 T 10 B 130 cc 8 1 00 G amp 425 s 098 5 2 09 S 0 gt lt lt 2 115 0 94 60 40 20 0 20 40 60 80 100 60 40 20 0 20 40 60 80 100 TEMPERATURE C TEMPERATURE C 3808 G16 3808 G17 3808f LI Ue LTC3808 TYPICAL PERFORMANCE CHARACTERISTICS 25 C untess otherwise noted SYNC MODE Pull D
13. 16 APPLICATIONS INFORMATION satisfied the capacitance is adequate for filtering The output ripple is approximated by 1 AVout ESR _ _ _ OUT RIPPLE where f is the operating frequency Cour is the output capacitance and is the ripple current in the induc tor The output ripple is highest at maximum input voltage since Inippi p increase with input voltage Setting Output Voltage The LTC3808 output voltage is set by an external feedback resistor divider carefully placed across the output as shown in Figure 3 The regulated output voltage is deter mined by Vout 0 61 a RA For most applications a 59k resistor is suggested for Ra In applications where minimizing the quiescent current is critical Ra should be made bigger to limit the feedback divider current If Rg then results in very high impedance it may be beneficial to bypass Rg with a 50pF to 100pF capacitor Cpp Vour 3808 F03 Figure 3 Setting Output Voltage Run and Soft Start Tracking Functions The LTC3808 has a low power shutdown mode which is controlled by the RUN pin Pulling the RUN pin below 1 1V puts the LTC3808 into a low quiescent current shutdown mode Ig Releasing the RUN pin an internal 0 7 uA at 4 2V current source will pull the RUN pin up to Vin which enables the controller The RUN pin can be driven directly from logic as showed in Figure 4 LIC
14. 3808 LTC3808 LTC3808 gt RUN RUN E 3808 204 Figure 4 RUN Pin Interfacing Once the controller is enabled the start up of is controlled by the state of the TRACK SS pin If the TRACK SS pin is connected to the start up of is con trolled by internal soft start which slowly ramps the positive reference to the error amplifier from OV to 0 6V allowing to rise smoothly from OV to its final value The default internal soft start time is around 1ms The soft start time can be changed by placing a capacitor between the TRACK SS pin and GND Inthis case the soft start time will be approximately 600mV uA where 1uA is an internal current source which is always on When the voltage on the TRACK SS pin is less than the internal 0 6V reference the LTC3808 regulates the Vrg voltage to the TRACK SS pin voltage instead of 0 6V Therefore the start up of Voyr can ratiometrically track an external voltage Vy according to a ratio set by a resistor divider at TRACK SS pin Figure 5a The ratiometric relation between and Vy is Figure 5c tss 55 Vout _ RrA Ra Vx Ra Vout LTC3808 TRACK SS Figure 5a Using the TRACK SS Pin to Track Vy 3808f AL MUR 1 LTC3808 APPLICATIONS INFORMATION A Vx OUTPUT VOLTAGE TIME 5b Coincident Tracking Vout OUTPUT VOLTAGE 3808 F05b c TIME 5c Ratiometric Tracking F
15. 540DP has 0 0172 The short circuit current is _ 90mV 36 7 00179 Sothe inductor current rating should be higher than 5 3A The PLLLPF pin will be left floating so the LTC3808 will operate at its default frequency of 550kHz For continuous Burst Mode operation with 600mA the required minimum inductor value is 5 3A 1 8V 1 8V LMIN 550kHz 600mA 2 751 A 6A 2 2uH inductor works well for this application 1 88uH will require an RMS current rating of at least 1A at temperature A with 0 1 ESR will cause approxi mately 60mV output ripple In most applications the requirements for these capacitors are fairly similar PC Board Layout Checklist When laying out the printed circuit board use the follow ing checklist to ensure proper operation of the LTC3808 The power loop input capacitor MOSFET inductor output capacitor should be as small as possible and isolated as much as possible from LTC3808 e Put the feedback resistors close to the pins The compensation components should also be very close to the LTC3808 The current sense traces SENSE and SENSE should be Kelvin connections right at the P channel MOSFET source and drain Keeping the switch node SW and the gate driver nodes TG BG away from the small signal components espe cially the feedback resistors and lr compensation components 3808f LI MER 23 LTC3808
16. C MODE pin can be used as an auxiliary feedback to provide a means of regulating a flyback winding output When this pin drops below its ground referenced 0 4V threshold continuous mode operation is forced During continuous mode current flows continuously in the transformer primary side The auxiliary winding draws current only when the bottom synchronous N channel MOSFET is on When primary load currents are low and or the Viy Voyr ratio is close to unity the synchronous MOSFET may not be on for a sufficient amount of time to transfer power from the output capacitor to the auxiliary load Forced continuous operation will support an auxil iary winding as long as there is a sufficient synchronous MOSFET duty factor The SYNC MODE input pin removes the requirement that power must be drawn from the transformer primary side in order to extract power from the auxiliary winding With the loop in continuous mode the auxiliary output may nominally be loaded without regard to the primary output load The auxiliary output voltage Vayy is normally set as shown in Figure 8 by the turns ratio N of the transformer Vaux N 1 Vout LTC3808 1uF TG SYNC MODE Cour 3808 Figure 8 Auxiliary Output Loop Connection 3808f 19 LTC3808 APPLICATIONS INFORMATION However if the controller goes into pulse skipping opera tionand halts switching due to alight primary load current then Vaux will droo
17. DE 0V x 20 PULSE SKIPPING 0 SYNC MODE 0 6V Lun D p Hl 20 1 10 100 1k 10k 0 5 1 1 5 2 LOAD CURRENT mA VOLTAGE V 3808 G02 3808 G03 Load Step Forced Continuous Mode Load Step Pulse Skipping Mode 100us DIV 100us DIV 100us DIV 3808 606 Vin 3 3V Vin 3 3V Vin 3 3V Vout 1 8V Vout 1 8V Vout 1 8V ILoan 300mA ILoap 300mA TO ILoap 300mA TO SYNC MODE Vin SYNC MODE OV SYNC MODE Vrg FIGURE 11 CIRCUIT FIGURE 11 CIRCUIT FIGURE 11 CIRCUIT Start Up with Internal Soft Start Start Up with External Soft Start TRACK SS Viy Css 10nF VOUT Vout pe 1 8V 1 8V 500mV DIV 500mV DIV EN 200us DIV 1ms DIV Viy 4 2V Vin 4 2V Rioap 12 RLoap 12 FIGURE 11 CIRCUIT FIGURE 11 CIRCUIT LTC3808 TYPICAL PERFORMANCE CHARACTERISTICS 25 c otherwise noted Start Up with Coincident Tracking Vout OV at Os 500mV DIV 3808 609 10ms DIV Vin 4 2V Rta 5902 1 18k FIGURE 11 CIRCUIT Regulated Feedback Voltage vs Start Up with Coincident Tracking Vout 0 8V at 05 500mV DIV 3808 G10 10ms DIV Vin 4 2V Rta 5900 1 18k FIGURE 11 CIRCUIT Undervoltage Lockout Threshold Start Up with Ratiometric Tracking OV at 05 50
18. N COMMENTS LTC1628 LTC3728 Dual High Efficiency 2 Phase Synchronous Constant Frequency Standby 5V and 3 3V LDOs Viy to 36V Step Down Controllers 28 Lead SSOP LTC1735 High Efficiency Synchronous Step Down Controller Burst Mode Operation 16 Pin Narrow SSOP Fault Protection 3 5V lt Vin lt 36V LTC1772 Constant Frequency Current Mode Step Down 2 5V lt Vin lt 9 8V lour Up to 4A SOT 23 Package 550kHz DC DC Controller LTC1773 Synchronous Step Down Controller 2 65V lt 8 5V lour Up to 4A 10 Lead MSOP LTC1778 No Rsense Synchronous Step Down Controller Current Mode Operation Without Sense Resistor Fast Transient Response 4V lt Viy 36V LTC1872 Constant Frequency Current Mode Step Up Controller 2 5V lt Vin lt 9 8V SOT 23 Package 550kHz LTC3411 1 25A lout 4MHz Synchronous Step Down DC DC Converter 95 Efficiency 2 5V to 5 5V Voyr 0 8V Ig 60mA Isp 1mA MS Package LTC3412 2 5A lour 4MHz Synchronous Step Down DC DC Converter 95 Efficiency 2 5V to 5 5V 0 8V 10 60mA Isp 1mA TSSOP 16E Package LTC3416 AMHz Monolithic Synchronous Step Down Regulator Tracking Input to Provide Easy Supply Sequencing 2 25V lt lt 5 5V 20 Lead TSSOP Package LTC3701 2 Phase Low Input Voltage Dual Step Down DC DC Controller 2 5V lt Vin lt 9 8V 550kHz PGOOD PLL 16 Lead SSOP LTC3708 2 Phase No Dual Synchronous Controller with Constant On Time Dual Controller Viy Up to
19. PF Floating 480 550 600 kHz PLLLPF 260 300 340 kHz PLLLPF Vin 650 750 825 kHz Phase Locked Loop Lock Range SYNC MODE Clocked Minimum Synchronizable Frequency 200 250 kHz Maximum Synchronizible Frequency 750 1000 kHz Phase Detector Output Current Sinking fosc gt fsync mone 3 uA Sourcing fosc lt SYNC MODE 3 uA Spread Spectrum Frequency Range Minimum Switching Frequency 460 kHz Maximum Switching Frequency 635 kHz SYNC MODE Pull Down Current SYNC MODE 2 2V 2 6 uA PGOOD Output PGOOD Voltage Low Ipgoop Sinking 1mA 50 mV PGOOD Trip Level Vep with Respect to Set Output Voltage lt 0 6V Ramping Positive 13 10 0 7 Vep lt 0 6V Ramping Negative 16 13 3 10 gt 0 6V Ramping Negative 7 10 0 13 Vrg gt 0 6V Ramping Positive 10 13 3 16 Note 1 Absolute Maximum Ratings are those values beyond which the life Note 4 Dynamic supply current is higher due to gate charge being of a device may be impaired delivered at the switching frequency Note 2 The LTC3808E is guaranteed to meet specified performance from Note 5 The LTC3808 is tested in a feedback loop that servos ly to a 0 C to 70 C Specifications over the 40 C to 85 C operating range are specified voltage and measures the resultant Vpg voltage assured by design characterization and correlation with statistical process Note 6 Peak current sense voltage is reduced dependent on duty cycle to controls a percentage of value as shown in Figure 1 Not
20. al circuits the gate drivers and the negative input to the reverse current comparator The exposed pad Pin 15 in DFN package must be soldered to the PCB ground FUNCTIONAL DIAGRAM VIN C VOLTAGE VREF SLOPE REFERENCE 0 6V CLK UNDERVOLTAGE LOCKOUT SENSE VIN A gt TG O Q SWITCHING LOGIC AND ANTI SHOOT BLANKING CIRCUIT Vout BURSTDIS Re Ra 3808 FD IREV GND LTC3808 OPERATION Refer to Functional Diagram Main Control Loop The LTC3808 uses a constant frequency current mode architecture During normal operation the top external P channel power MOSFET is turned on when the clock sets the RS latch and is turned off when the current comparator ICMP resets the latch The peak inductor current at which ICMP resets the RS latch is determined by the voltage on the ltp pin which is driven by the output of the error amplifier EAMP The Veg pin receives the output voltage feedback signal from an external resistor divider This feedback signal is compared to the internal 0 6V reference voltage by the EAMP When the load current increases it causes a slight decrease relative to the 0 6V reference which in turn causes the voltage to increase until the average inductor current matches the new load current While the top P channel MOSFET is off the bottom N channel MOSFET is turned on until eitherthe inductor current starts to reverse as
21. al 1ms soft start clamp An external soft start can be programmed by connecting a capacitor between this pin and ground Do not leave this pin floating PGOOD Pin 4 Pin 5 Power Good Output Voltage Moni tor Open Drain Logic Output This pin is pulled to ground when the voltage on the feedback pin Vep is not within 13 3 of its nominal set point Pin 5 Pin Feedback Pin This pin receives the remotely sensed feedback voltage for the controller from an external resistor divider across the output Pin 6 Pin 7 Current Threshold and Error Amplifier Compensation Point Nominal operating range on this pin is from 0 7V to 2V The voltage on this pin determines the threshold of the main current comparator RUN Pin 7 Pin 8 Run Control Input Forcing this pin below 1 1V shuts down the chip Driving this pin to Viy or releasing this pin enables the chip to start up either by tracking the external voltage at the TRACK SS pin or with theinternal external soft start all based onthe connection at the TRACK SS pin IPRG Pin 8 Pin 10 Three State Pin to Select Maximum Peak Sense Voltage Threshold This pin selects the maxi mum allowed voltage drop between the SENSE and SENSE or SW pins i e the maximum allowed drop across the sense resistor or the external P channel MOSFET Tie to GND or float to select 204mV 85mV or 125mV respectively BG Pin 9 Pin 11 Bottom NMOS Gate Drive Output This pin drives the g
22. argin to avoid interfering with the peak current sensing loop On the other hand in order to prevent the MOSFETs from excessive heating and the inductor from saturation Isc pgAk should be smaller than the minimum value of their current ratings A reason able range is lout max lsc PEAK lt IRATING MIN Therefore the on resistance of N channel MOSFET should be chosen within the following range AM AM SC eR ow lt SC RATING MIN OUT MAX where AVsc is 90mV 60 or 150mV with IPRG being floated tied to GND or Vy respectively The power dissipated in the MOSFET strongly depends on its respective duty cycles and load current When the LTC3808 is operating in continuous mode the duty cycles for the MOSFETs are Top P Channel Duty Cycle our IN Mn IN Bottom N Channel Duty Cycle The MOSFET power dissipations at maximum output current are Vour Prop Vin lout max C rss f MN Vout MN e IOUT MAX e pT Rps oN 2 louT maxy e pT Rps oN Both MOSFETs have 128 losses and the Prop equation includes an additional term for transition losses which are largest at high input voltages The bottom MOSFET losses are greatest at high input voltage or during a short circuit when the bottom duty cycle is 100 The LTC3808 utilizes a non overlapping anti shoot through gate drive control scheme to ensure that the P and N channel MOSFETs are not turned on at
23. ate of the external N channel MOSFET This pin has an output swing from GND to SENSE TG Pin 10 Pin 12 Top PMOS Gate Drive Output This pin drives the gate of the external P channel MOSFET This pin has an output swing from GND to SENSE SENSE Pin 11 Pin 13 Positive Input to Differential Current Comparator Also powers the gate drivers Nor mally connected to the source of the external P channel MOSFET when the sense resistor is not used Otherwise it is connected to the sense resistor Vin Pin 12 Pin 14 Chip Signal Power Supply This pin powers the entire chip except for the gate drivers Exter nally filtering this pin with a lowpass RC network e g R 1090 1uF is suggested to minimize noise pickup especially in high load current applications 3808f LI MER 7 LTC3808 PIN FUNCTIONS oFwssop Pin 13 Pin 15 Negative Input to Differential Current Comparator Normally is connected to the SW pin when the sense resistor is not used When using a current sense resistor connect the resistor between SENSE and SENSE and connect source of the P channel MOSFET to the SENSE pin SW Pin 14 Pin 16 Switch Node Connection to Inductor This pin is also an input to the reverse current comparator Normally this pin is connected to the drain of the external P channel MOSFET the drain of the external N channel MOSFET and the inductor GND Pin 15 Pins 1 9 Ground connection for intern
24. between the PLLLPF pin and GND and another 1000pF cap should be connected between PLLLPF and the SYNC MODE pin The controller operates in PWM pulse skipping mode at light loads when spread spectrum modulation is selected See more discussions in the Spread Spectrum Modulation with SYNC MODE and PLLLPF Pins in the Applications Information section Dropout Operation When the input supply voltage approaches the output voltage the rate of change of the inductor current while the external P channel MOSFET is on ON cycle decreases This reduction means that the P channel MOSFET will remain on for more than one oscillator cycle if the inductor current has not ramped up to the threshold set by the EAMP on the pin Further reduction in the input supply voltage will eventually cause the P channel MOSFET to be turned on 100 i e DC The output voltage will then be determined by the input voltage minus the voltage drop across the P channel MOSFET and the inductor Undervoltage Lockout To prevent operation of the P channel MOSFET below Safe input voltage levels an undervoltage lockout is incorporated in the LTC3808 When the input supply voltage Vin drops below 2 25V the external P and N channel MOSFETs and all internal circuits are turned off except for the undervoltage block which draws only a few microamperes Peak Current Sense Voltage Selection and Slope Compensation IPRG Pin When the LTC3808 controlleris operatin
25. by the regulator to return Voyr to its steady state value During this recovery time can be monitored for overshoot or ringing that would indicate a stability prob lem OPTI LOOP compensation allows the transient re sponse to be optimized over a wide range of output capacitance and ESR values The series Ro Cg filter see Functional Diagram sets the dominant pole zero loop compensation The external components showed in the figure on the first page of this data sheet will provide adequate compen sation for most applications The values can be modified slightly from 0 2 to 5 times their suggested values to optimize transient response once the final PC layout is done and the particular output capacitor type and value have been determined The output capacitor needs to be decided upon because the various types and values deter mine the loop feedback factor gain and phase An output current pulse of 20 to 100 of full load current having arise time of 1us to 10us will produce output voltage and pin waveforms that will give a sense of the overall loop stability The gain of the loop will be increased by increas ing Rc and the bandwidth of the loop will be increased by decreasing Cc The output voltage settling behavior is related to the stability of the closed loop system and will demonstrate the actual overall supply performance For a detailed explanation of optimizing the compensation com ponents including
26. ction When the LTC3808 is in Burst Mode operation the peak current in the inductor is set to approximate one fourth of the maximum sense voltage even though the voltage on the lr pin indicates a lower value If the average inductor current is higher than the load current the EAMP will decrease the voltage on the pin When the voltage drops below 0 85V the internal SLEEP signal goes high and the external MOSFET is turned off 3808f 9 LTC3808 OPERATION Refer to Functional Diagram In sleep mode much of the internal circuitry is turned off reducing the quiescent current that the LTC3808 draws The load current is supplied by the output capacitor As the output voltage decreases the EAMP increases the ly voltage When the 1 voltage reaches 0 925V the SLEEP signal goes low and the controller resumes normal opera tion by turning on the external P channel MOSFET on the next cycle of the internal oscillator When the controller is enabled for Burst Mode or pulse skipping operation the inductor current is not allowed to reverse Hence the controller operates discontinuously The reverse current comparator RICMP senses the drain to source voltage of the bottom external N channel MOSFET This MOSFET is turned off just before the inductor current reaches zero preventing it from going negative In forced continuous operation the inductor current is allowed to reverse at light loads or under larg
27. dent on the induc tance selected As inductance increases core losses go down Unfortunately increased inductance requires more turns of wire and therefore copper losses will increase Ferrite designs have very low core losses and are preferred at high switching frequencies so design goals can con centrate on copper loss and preventing saturation Ferrite core material saturates hard which means that induc tance collapses abruptly when the peak design current is exceeded Core saturation results in an abrupt increase in inductor ripple current and consequent output voltage ripple Do not allow the core to saturate Molypermalloy from Magnetics Inc is a very good low loss core material for toroids but is more expensive than ferrite A reasonable compromise from the same manu facturer is Kool Mu Toroids are very space efficient especially when several layers of wire can be used while inductors wound on bobbins are generally easier to sur face mount However designs for surface mount that do not increase the height significantly are available from Coiltronics Coilcraft Dale and Sumida Schottky Diode Selection Optional The schottky diode D in Figure 12 conducts current during the dead time between the conduction of the power MOSFETs This prevents the body diode of the bottom N channel MOSFET from turning on and storing charge during the dead time which could cost as much as 1 in efficiency A 1A Schottky diode
28. e 3 T is calculated from the ambient temperature and power dissipation Pp according to the following formula Tj Ta Oja C W 3808f LI WIR 808 TYPICAL PERFORMANCE CHARACTERISTICS 7 25 C otherwise noted Efficiency vs Load Current 100 11 CIRCUIT Vour 2 5V 95 lo 99 Your 33 5 85 gt Vout 1 2V 8 T 75 Vout 1 8V 70 65 SYNC MODE Vin Vin 5V 60 1 10 100 1k 10k LOAD CURRENT mA 3808 601 Load Step Burst Mode Operation Vout 200MV DIV kun AC COUPLED IL 2A DIV 100 95 90 85 80 75 70 65 60 55 50 EFFICIENCY Vout Vout 200MV DIV 200mV DIV AC COUPLED AC COUPLED T BN Maximum Current Sense Voltage Efficiency vs Load Current vs Pin Voltage FIGURE 11 CIRCUIT 100 C Burst Mode OPERATION Vin 5V Vout 2 5V ITH RISING 80 Burst Mode OPERATION FALLING FORCED CONTINUOUS BURST MODE 60 MODE SYNC MODE femen PULSE SKIPPING Vin di MODE FORCED 5 CONTINUOUS SYNC MO
29. e LTC3808 is enabled by setting SYNC MODE pin to a DC voltage between 1 35V and several hundred mV below Viy by tying a resistor between SYNC MODE and Viy Table 3 summarizes the different states in which the SYNC MODE Pin can be used Table 3 The States of the SYNC MODE Pin SYNC MODE PIN CONDITION GND OV to 0 35V Forced Continuous Mode Current Reversal Allowed Veg 0 45V to 1 2V Pulse Skipping Mode No Current Reversal Allowed Resistor to 1 35V to Viy 0 5 Spread Spectrum Modulation Pulse Skipping at Light Loads No Current Reversal Allowed Vin Burst Mode Operation No Current Reversal Allowed Feedback Resistors Regulate an Auxiliary Winding External Clock Signal Enable Phase Locked Loop Synchronize to External Clock Pulse Skipping at Light Load No Current Reversal Allowed Fault Condition Short Circuit and Current Limit Ifthe LTC3808 s load current exceeds the short circuit cur rentlimit lsc which is set by the short circuit sense thresh old AVsc and the on resistance Rps on of bottom N channel MOSFET the top P channel MOSFET is turned off and will not be turned on at the next clock cycle unless the load current decreases below lec In this case the controller s switching frequency is decreased and the output is regulated by short circuit current limit protection In a hard short OV the top P channel MOSFET is turned off and kept off until the
30. e transient conditions The peakinductor currentis determined by the voltage on the pin The P channel MOSFET is turned every cycle constant frequency regardless of the pin voltage In this mode the efficiency at light loads is lower than in Burst Mode operation However continuous mode has the advantages of lower output ripple and no noise at audio frequencies When the SYNC MODE pin is clocked by an external clock source to use the phase locked loop see Frequency Selection and Phase Locked Loop or is set to a DC voltage between 0 4V and several hundred mV below Viy the LTC3808 operates in PWM pulse skipping mode at light loads In this mode the current comparator ICMP may remain tripped for several cycles and force the external P channel MOSFET to stay off for the same number of cycles The inductor current is not allowed to reverse discontinuous operation This mode like forced continuous operation exhibits low output ripple as well as low audio noise and reduced RF interference as compared to Burst Mode operation However it provides low current efficiency higher than forced continuous mode but not nearly as high as Burst Mode operation During start up or an undervoltage condition Veg 0 54V the LTC3808 operates in pulse skipping mode no current reversal allowed regardless of the state of the SYNC MODE pin Short Circuit and Current Limit Protection The LTC3808 monitors the voltage drop AVsc betwe
31. en the GND and SW pins across the external N channel MOSFET with the short circuit current limit comparator The allowed voltage is determined by AVsc MAX 90mV where A is a constant determined by the state of the IPRG pin Floating the IPRG pin selects A 1 tying IPRG to Viy selects A 5 3 tying IPRG to GND selects A 2 3 The inductor current limit for short circuit protection is determined by AVgccmax and the on resistance of the external N channel MOSFET T AVSC MAX RpS ON Once the inductor current exceeds lec the short current comparator will shut off the external P channel MOSFET until the inductor current drops below Isc Output Overvoltage Protection As further protection the overvoltage comparator OVP guards againsttransient overshoots as well as other more serious conditions that may overvoltage the output When the feedback voltage on the Vrg pin has risen 13 33 above the reference voltage of 0 6V the external P chan nel MOSFET is turned off and the N channel MOSFET is turned on until the overvoltage is cleared Frequency Selection and Phase Locked Loop PLLLPF and SYNC MODE Pins The selection of switching frequency is a tradeoff between efficiency and component size Low frequency operation increases efficiency by reducing MOSFET switching losses but requires larger inductance and or capacitance to main tain low output ripple voltage The switching frequency of the LTC3808 s controller
32. g below 2096 duty cycle the peak current sense voltage between the SENSE and SENSE SW pins allowed across the external P channel MOSFET is determined by 0 7V 10 where A is a constant determined by the state of the IPRG pin Floating the IPRG pin selects A 1 tying IPRG to Viy selects A 5 3 tying IPRG to GND selects A 2 3 The AVsENsE MAX 3808f LI WIR 11 LTC3808 OPERATION Refer to Functional Diagram maximum value of is typically about 1 98V so the maximum sense voltage allowed across the external P channel MOSFET is 125mV 85mV or 204mV for the three respective states of the IPRG pin However once the controller s duty cycle exceeds 2096 slope compensation begins and effectively reduces the peak sense voltage by a scale factor SF given by the curve in Figure 1 The peak inductor current is determined by the peak sense voltage and the on resistance of the external P channel MOSFET AVSENSE MAX ZEE DS ON If sense resistor is used AVsENsE MAx IS the peak current sense voltage between the SENSE and SENSE pins across the sense resistor The peak inductor is determined by the peak sense voltage and the resistance of the sense resistor AVSENSE MAX PK 6 RSENSE Power Good PGOOD Pin A window comparator monitors the feedback voltage and the open drain PGOOD output pin is pulled low when the feedback voltage is not within 10 of the 0 6V
33. igure 5b and 5c Two Different Modes of Output Voltage Tracking For coincident tracking Voyt Vy during start up Rta Ra Vx should always be greater than when using the tracking function of TRACK SS pin The internal current source 10 which is for external soft start will cause a tracking error at For example if a 59k resistor is chosen for Ra the Rya current will be about 10 600mV 59k In this case the 1uA internal current source will cause about 10 1uA 10uA 100 tracking error which is about 60mV 600mV 10 referred to Vrg This is acceptable for most applications If a better tracking accuracy is required the value of Rt should be reduced Table 1 summarizes the different states in which the TRACK SS can be used Table 1 The States of the TRACK SS Pin TRACK SS Pin FREQUENCY Capacitor Css External Soft Start ViN Internal Soft Start Resistor Divider Vour Tracking an External Voltage Vy Phase Locked Loop and Frequency Synchronization The LTC3808 has a phase locked loop PLL comprised of an internal voltage controlled oscillator VCO and a phase detector This allows the turn on of the external P channel MOSFET to be locked to the rising edge of an external clock signal applied to the SYNC MODE pin The phase detector is an edge sensitive digital type that provides zero degrees phase shift between the external and internal oscillators Thi
34. indicated by the current reversal comparator IRCMP or the beginning of the next cycle Shutdown Soft Start and Tracking Start Up RUN and TRACK SS Pins The LTC3808 is shut down by pulling the RUN pin low In shutdown all controller functions are disabled and the chip draws only 9uA The TG output is held high off and the BG output low off in shutdown Releasing the RUN pin allows an internal 0 7uA current source to pull up the RUN pinto The controller is enabled when the RUN pin reaches 1 1V The start up of Voyr is based on the three different connections on the TRACK SS pin The start up of Vout is controlled by the LTC3808 s internal soft start when TRACK SS is connected to During soft start the error amplifier EAMP compares the feedback signal to the internal soft start ramp instead of the 0 6V reference which rises linearly from OV to 0 6V in about 1ms This allows the output voltage to rise smoothly from OV to its final value while maintaining control of the inductor current The 1ms soft start time can be changed by connecting the optional external soft start capacitor Css between the TRACK SS and GND pins When the controller is enabled by releasing the RUN pin the TRACK SS pin is charged up by an internal 1uA current source and rises linearly from OV to above 0 6V The error amplifier EAMP compares the feedback signal Vrg to this ramp instead and regulates Veg linearly from OV to 0 6V When
35. is generally a good size for most LTC3808 applications since it conducts a relatively small average current Larger diode results in additional transition losses due to its larger junction capacitance This diode may be omitted if the efficiency loss can be tolerated Cin and Cour Selection In continuous mode the source current of the P channel MOSFET is a square wave of duty cycle Voyr Viy To prevent large voltage transients a low ESR input capacitor sized for the maximum RMS current must be used The maximum RMS capacitor current is given by Vout Vin Vour ViN Cin Required IRMS IMAX This formula has a maximum value at Viy 2Vgyt where loyr 2 This simple worst case condition is com monly used for design because even significant deviations donot offer much relief Note that capacitor manufacturer s ripple current ratings are often based on 2000 hours of life This makes it advisable to further derate the capacitor or to choose a capacitor rated at a higher temperature than required Several capacitors may be paralleled to meet the size or height requirements in the design Due to the high operating frequency of the LTC3808 ceramic capacitors can also be used for Always consult the manufacturer if there is any question The selection of Cour is driven by the effective series resistance ESR Typically once the ESR requirement is Kool Mu is a registered trademark of Magnetics Inc
36. mperature The following equation is a good guide for determining the required Rosconymax at 25 C manufacturer s specifica tion allowing some margin for variations in the LTC3808 and external component values AVSENSE MAX Rps ON MAX 3 09 SF 6 loUT MAX PT The pr is a normalizing term accounting for the tempera ture variation in on resistance which is typically about 0 4 C as shown in Figure 2 Junction to case tempera ture is about 10 C in most applications For a maxi mum ambient temperature of 70 C using 1 3 in the above equation is a reasonable choice The N channel MOSFET s on resistance is chosen based on the short circuit current limit Isc The LTC3808 s short circuit current limit comparator monitors the drain to source voltage Vps of the bottom N channel MOSFET 3808f LI Ue 13 LTC3808 APPLICATIONS INFORMATION 2 0 NORMALIZED ON RESISTANCE 50 0 50 100 150 JUNCTION TEMPERATURE C 3808 F02 Figure 2 Vs Temperature which is sensed between the GND and SW pins The short circuit current sense threshold AVsc is set approximately 90mV when IPRG is floating 60mV when IPRG is tied low 150mV when IPRG is tied high The on resistance of N channel MOSFET is determined by AVsc ISC PEAK Rps ON MAX The short circuit current limit lsc pgak should be larger than the With some m
37. ood Output Voltage Monitor Burst Mode is inhibited during synchronization or when Output Overvoltage Protection the SYNC MODE pin is pulled low to reduce noise and RF Micropower Shutdown Ig 9uA interference To further reduce EMI the LTC3808 incorpo Tiny Thermally Enhanced Leadless 4mm x 3mm rates a novel spread spectrum frequency modulation DFN or 16 lead SSOP Package technique The LTC3808 is available in the tiny footprint thermally APPLICATIONS enhanced DFN package or 16 lead SSOP package One or Two Cell Lithium Ion Powered Devices odie den e Con Ne RSENS oda Notebook and Palmtop Computers PDAs pn a teu m Portable Instruments 5847554 6611131 6498466 Other Patents pending Distributed DC Power Systems TYPICAL APPLICATION Efficiency and Power Loss vs Load Current 100 10k High Efficiency 550kHz Step Down Converter VIN 90 ors 1k 2 75V TO 9 8V Tue eV vind dev 3 80 100 3 TYPICAL POWER 2 Vour E 70 LOSS 4 2V 10 3 2 5V 2A 60 1 FIGURE 11 CIRCUIT so SOU doa 1 10 100 1k 10k 3808 TAO1 LOAD CURRENT mA 3808 TAO1b 3808f AL Une 1 LTC3808 ABSOLUTE MAXIMUM RATINGS note 1 Input Supply Voltage Viw 0 3Vto10V BG Peak Output Current lt 10 5 1A PLLLPF RUN SYNC MODE TRACK SS Operating Temperature Range Note 2 40 C to 85 C SENSE IPRG Voltages
38. own Current Oscillator Frequency vs Oscillator Frequency vs Input vs Temperature Temperature Voltage 2 80 10 5 X 2 75 E i z 6 3 ge 5 5 2 gt 2 65 a 1 S 260 0 ne 0 4 a cc zu Er 5 299 T T MM N 250 E 6 3 245 8 2 4 72 2 40 10 5 60 40 20 0 20 40 60 80 100 60 40 20 100 2 3 4 5 6 8 9 10 TEMPERATURE C A INPUT VOLTAGE V 3808 G18 3808 G19 3808 G20 Shutdown Quiescent Current vs TRACK SS Start Up Current vs Input Voltage Sleep Current vs Input Voltage TRACK SS Voltage 18 130 1 04 16 s 129 3 1 00 14 ity 5 12 110 E oc 5 0 96 x 10 a 3 100 2 8 tc E 0 92 E 6 90 8 5 4 088 80 2 0 05 0 84 2 3 4 5 6 7 8 9 10 10 0 01 02 03 04 05 06 07 INPUT VOLTAGE V wee T mor TRACK SS VOLTAGE V 3808 G21 3808 G22 3808 G24 LTC3808 PIN FUNCTIONS oFwssoP PLLLPF Pin 1 Pin 2 Frequency Set PLL Lowpass Filter When synchronizing to an external clock this pin serves as the low pass filter point for the phase locked loop Normally a series RC is connected between this pin and ground When not synchronizing to an external clock this pin serves as the frequency select input Tying this pinto GND selects 300kHz operation tying this pin to Viy selects 750kHz operation Floating this pin selects 550kHz operation Connect a 2 2nF capacitor between this pin and GND and 1000pF capacitor between this pin
39. p An external resistor divider from Vauxto the SYNC MODE sets a minimum voltage Vaux min R6 V 0 4V 1 AUX MIN s If Vaux drops below this value the SYNC MODE voltage forces temporary continuous switching operation until Vaux is again above its minimum Spread Spectrum Modulation with SYNC MODE and PLLLPF Pins Switching regulators which operate at fixed frequency conductelectromagnetic interference EMI to their down stream load s with high spectral power density at this fundamental and harmonic frequencies The peak energy can be lowered and distributed to other frequencies and their harmonics by modulating the PWM frequency The LTC3808 s switching noise at 550 7 is spread between Vour Spectrum without Spread Spectrum Modulation NOISE dBm 10dBm DIV START FREQ 400kHz RBW 100Hz STOP FREQ 700kHz Vout Spectrum with Spread Spectrum Modulation Cssw 2200pF NOISE dBm 10dBm DIV START FREQ 400kHz RBW 100Hz STOP FREQ 700kHz Figure 9 Spectral Response of Spread Spectrum Modulation 460kHz and 635kHz in spread spectrum modulation op eration Figure 9 shows the spectral plots of the output Voyt noise with without spread spectrum modulation Note the significant reduction in peak output noise gt 20dBm The spread spectrum modulation operation of th
40. packet of charge dQ moves from SENSE to ground The resulting dQ dt is a current out of SENSE which is typically much larger than the DC supply current In continuous mode f 3 2 losses are calculated from the DC resistances of the MOSFETs inductor and or sense resistor In continuous mode the average output current flows through L but is chopped between the top P channel MOSFET and the bottom N channel MOSFET The MOSFET Rps on and or the resistance of the sense resistor multiplied by duty cycle can be summed with the resistance of L to obtain 128 losses 4 Transition losses apply to the external MOSFET and increase with higher operating frequencies and input volt ages Transition losses can be estimated from Transition Loss 2 Vin2 lo MAX e Cnss ef Other losses including and ESR dissipative losses and inductor core losses generally account for less than 296 total additional loss 3808f 21 LTC3808 APPLICATIONS INFORMATION Checking Transient Response The regulator loop response can be checked by looking at the load transient response Switching regulators take several cycles to respond to a step in load current When a load step occurs Vout immediately shifts by an amount equal to gap ESR where ESR is the effective series resistance of Coyr AlLoap also begins to charge or discharge Cour generating a feedback error signal used
41. reference voltage PGOOD is low when the LTC3808 is shut down or in undervoltage lockout l Max 8 SF 5 0 10 20 30 40 50 60 70 80 90 100 DUTY CYCLE 3808 F01 Figure 1 Maximum Peak Current vs Duty Cycle LTC3808 APPLICATIONS INFORMATION The typical LTC3808 application circuit is shown on Figure 11 External component selection for the controller is driven by the load requirement and begins with the selection of the inductor and the power MOSFETs Power MOSFET Selection The LTC3808 s controller requires two external power MOSFETs a P channel MOSFET for the topside main switch and a N channel MOSFET for the bottom synchro nous switch The main selection criteria for the power MOSFETs are the breakdown voltage Vgr pss threshold voltage on resistance Rosin reverse transfer capacitance Cgss turn off delay tp orr and the total gate charge The gate drive voltage is the input supply voltage Since the LTC3808 is designed for operation down to low input voltages a sublogic level MOSFET Rps on guaranteed at Vas 2 5V is required for applications that work close to this voltage When these MOSFETs are used make sure that the input supply to the LTC3808 is less than the absolute maximum MOSFET Vgs rating which is typically 8v The P channel MOSFET s on resistance is chosen based on the required load curren
42. roller runs at a nominal 550kHz frequency when the PLLLPF pin is left floating and the SYNC MODE pin is not configured for Spread spectrum operation Pulling the PLLLPF to selects 750kHz operation pulling the PLLLPF to GND selects 300kHz operation Alternatively the LTC3808 will phase lock to clock signal applied to the SYNC MODE pin with a frequency between 250kHz and 750kHz see Phase Locked Loop and Fre quency Synchronization To further reduce EMI the nominal 550kHz frequency will be spread over a range with frequencies between 460kHz and 635kHz when spread spectrum modulation is enabled see Spread Spectrum Modulation with SYNC MODE and PLLLPF Pins Inductor Value Calculation Given the desired input and output voltages the inductor value and operating frequency fosc directly determine the inductor s peak to peak ripple current Vout VIN Vout Vin 1050 IRIPPLE Lower ripple current reduces core losses in the inductor ESR losses in the output capacitors and output voltage ripple Thus highest efficiency operation is obtained at low frequency with a small ripple current Achieving this however requires a large inductor A reasonable starting point is to choose a ripple current that is about 40 of loytimax Note that the largest ripple current occurs at the highest input voltage To guarantee that ripple current does not exceed a specified maximum the inductor should be chosen according to L
43. s can be selected using the PLLLPF pin If the SYNC MODE is not being driven by an external clock source the PLLLPF can floated tied to Viy or tied to GND to select 550kHz 750kHz or 300kHz respectively 10 LTC3808 OPERATION Refer to Functional Diagram A phase locked loop PLL is available on the LTC3808 to synchronize the internal oscillator to an external clock source that connects to the SYNC MODE pin In this case aseries RC should be connected between the PLLLPF pin and GND to serve as the PLL s loop filter The LTC3808 phase detector adjusts the voltage on the PLLLPF pin to align the turn on of the external P channel MOSFET to the rising edge of the synchronizing signal The typical capture range of the LTC3808 s phase locked loop is from approximately 200kHz to 1MHz Spread Spectrum Modulation SYNC MODE and PLLLPF Pins Connecting the SYNC MODE pin to a DC voltage above 1 35V and several hundred mV below enables spread spectrum modulation SSM operation An internal 2 6uA pull down current source at SYNC MODE helps to set the voltage at the SYNC MODE pin for this operation by tying a resistor with appropriate value between SYNC MODE and This mode of operation spreads the internal oscillator frequency fosc 550kHz over a wider range 460kHz to 635kHz reducing the peaks of the harmonic output on a spectral analysis of the output noise In this case a 2 2nF filter cap should be connected
44. s type of phase detector does not exhibit false lock to harmonics of the external clock The output of the phase detector is a pair of complemen tary current sources that charge or discharge the external filter network connected to the PLLLPF pin The relation ship between the voltage on the PLLLPF pin and operating frequency when there is a clock signal applied to SYNC MODE is shown in Figure 6 and specified in the electrical characteristics table Note that the LTC3808 can only be synchronized to an external clock whose frequency is within range of the LTC3808 s internal VCO which is 1200 1000 Q FREQUENCY kHz S A 0 0 2 0 7 1 2 T7 2 2 PLLLPF PIN VOLTAGE V 3808 F06 Figure 6 Relationship Between Oscillator Frequency and Voltage at the PLLLPF Pin When Synchronizing to an External Clock 18 LTC3808 APPLICATIONS INFORMATION IL PLLLPF SYNC MODE DIGITAL PHASE FREQUENCY DETECTOR EXTERNAL OSCILLATOR OSCILLATOR 3808 F07 Figure 7 Phase Locked Loop Block Diagram nominally 200kHz to 1MHz This is guaranteed over temperature and process variations to be between 250kHz and 750kHz A simplified block diagram is shown in Figure 7 If the external clock frequency is greater than the internal oscillator s frequency fosc then current is sourced con tinuously from the phase detector output pulling up the PLLLPF pin When
45. short circuit condition is cleared In this case there is no current path from input supply to either or GND which prevents excessive MOSFET and inductor heating 20 LTC3808 APPLICATIONS INFORMATION 105 VREF MAXIMUM SENSE VOLTAGE NORMALIZED VOLTAGE OR CURRENT 75 2 0 2 1 22 2 3 24 2 5 26 27 2 8 2 9 3 0 INPUT VOLTAGE V Figure 10 Line Regulation of and Maximum Sense Voltage Low Input Supply Voltage Although the LTC3808 can function down to below 2 4V the maximum allowable output current is reduced as decreases below 3V Figure 10 shows the amount of change as the supply is reduced down to 2 4V Also shown is the effect on VREF Minimum On Time Considerations Minimum on time toy yiy is the smallest amount of time that the LTC3808 is capable of turning the top P channel MOSFET on It is determined by internal timing delays and the gate charge required to turn on the top MOSFET Low duty cycle and high frequency applications may approach the minimum on time limit and care should be taken to ensure that Vour fosc Vin Ifthe duty cycle falls below what can be accommodated by the minimum on time the LTC3808 will begin to skip cycles unless forced continuous mode is selected The output voltage will continue to be regulated but the ripple current and ripple voltage will increase The minimum on time for the LTC3808
46. t The maximum average load current loyr yAx is equal to the peak inductor current minus half the peak to peak ripple current Ipjppye The LTC3808 s current comparator monitors the drain to source voltage Vps of the top P channel MOSFET which is sensed between the SENSE and SW pins The peak inductor current is limited by the current threshold set by the voltage on the lyp pin of the current comparator The voltage on the pin is internally clamped which limits the maximum current sense threshold AVsense max 10 approximately 125mV when IPRG is floating 85mV when IPRG is tied low 204mV when IPRG is tied high The output current that the L T3808 can provide is given by AVsENSEMAX IniPPLE Rps oN 2 loUT MAX where Inipp c is the inductor peak to peak ripple current see Inductor Value Calculation A reasonable starting point is setting ripple current Inipp E to be 40 of Rearranging the above equation yields Rps ON MAX AVSENSE MAX for Duty Cycle lt 20 6 lour MAX However for operation above 20 duty cycle slope compensation has to be taken into consideration to select the appropriate value of Rps oy to provide the required amount of load current 9 AM Rps ON MAX E SFe SUBLIME OUT MAX where SFis ascale factor whose value is obtained from the curve in Figure 1 These must be further derated to take into account the significant variation in on resistance with te
47. t Threshold Falling e 1 95 2 25 2 55 Vin Rising e 215 2 45 2 75 Shutdown Threshold of RUN Pin 0 8 1 1 1 4 V Start Up Current Source TRACK SS 0V 0 65 1 1 35 uA Regulated Feedback Voltage Note 5 e 0 591 0 6 0 609 V Output Voltage Line Regulation 2 75V Vin lt 9 8V Note 5 0 01 0 04 96 N Output Voltage Load Regulation ITy 0 9V Note 5 0 1 0 5 1 7V 0 1 0 5 Vep Input Current Note 5 9 50 nA Overvoltage Protect Threshold Measured at Vrg 0 66 0 68 0 7 2 LTC 3808 ELECTRICAL CHARACTERISTICS The indicates specifications which apply over the full operating temperature range otherwise specifications are at T 25 C Viy 4 2V unless otherwise noted PARAMETER CONDITIONS MIN TYP MAX UNITS Overvoltage Protect Hysteresis 20 mV Auxiliary Feedback Threshold 0 325 0 4 0 475 V Top Gate TG Drive Rise Time C 3000pF 40 ns Top Gate TG Drive Fall Time C 3000pF 40 ns Bottom Gate BG Drive Rise Time CL 3000pF 50 ns Bottom Gate BG Drive Fall Time CL 3000pF 40 ns Maximum Current Sense Voltage AVsENsE MAX IPRG Floating Note 6 e 110 125 140 mV SENSE SW IPRG OV Note 6 e 70 85 100 mV IPRG Note 6 e 185 204 223 mV Soft Start Time Internal Time for Vrg to Ramp from 0 05V to 0 55V 0 5 0 74 0 9 ms Oscillator and Phase Locked Loop Oscillator Frequency Unsynchronized SYNC MODE Not Clocked PLLL
48. ted between SENSE and SENSE to sense the output load current In this case the source of the P channel MOSFET is connected to SENSE pin and the drain is connected to SW pin of LTC3808 Therefore the current comparator monitors the voltage developed across Rs_nse instead of Vps of the P channel MOSFET The output current that the LTC3808 can provide in this case is given by AVSENSE MAX _ RIPPLE RSENSE 2 loUT MAX Setting ripple current as 40 of 1 and using Figure 1 to choose SF the value of Reense is 5 AV Reuse 5 SF AVSENSEIMAX 6 loUT MAX See the P channel Rosin selection in Power MOSFET Selection Variation in the resistance of a sense resistor is much smaller than the variation in on resistance of the external MOSFET Therefore the load current is well controlled with a sense resistor However the sense resistor causes extra I R losses in addition to the I R losses of the MOSFET Therefore using a sense resistor lowers the efficiency of LTC3808 especially for large load current Operating Frequency and Synchronization The choice of operating frequency fosc is a trade off between efficiency and component size Low frequency operation improves efficiency by reducing MOSFET switch ing losses both gate charge loss and transition loss However lower frequency operation requires more induc tance for a given amount of ripple current The internal oscillator for the LTC3808 s cont
49. the external clock frequency is less than fosc current is sunk continuously pulling down the PLLLPF pin Ifthe external and internal frequencies are the same but exhibit a phase difference the current sources turn on for an amount of time corresponding to the phase difference The voltage on the PLLLPF pin is adjusted until the phase and frequency of the internal and external oscillators are identical At the stable operating point the phase detector output is high impedance and the filter capacitor holds the voltage The loop filter components and smooth out the current pulses from the phase detector and provide a Stable input to the voltage controlled oscillator The filter components and determine how fast the loop acquires lock Typically Rip 10k and Cp is 2200pF to 0 01 uF Typically the external clock on SYNC MODE pin input high level is 1 6V while the input low level is 1 2V Table 2 summarizes the different states in which the PLLLPF pin can be used Table 2 The States of the PLLLPF Pin PLLLPF PIN SYNC MODE PIN FREQUENCY OV DC Voltage lt 1 2V or Vin 300kHz Floating DC Voltage lt 1 2V or Vin 550kHz VIN DC Voltage 1 2V or Vin 750kHz RC Loop Filter Clock Signa Phase Locked to External Clock Spread Spectrum 460kHz to 635kHz Filter Caps DC Voltage gt 1 35V and 0 5V Auxiliary Winding Control Using SYNC MODE Pin The SYN
50. the voltage on the TRACK SS pin is less than the 0 6V internal reference the LTC3808 regulates the Vep voltage to the TRACK SS pin instead ofthe 0 6V reference Therefore of the LTC3808 can track an external voltage Vy during start up Typically a resistor divider on Vy is connected to the TRACK SS pin to allow the start up of Voyrto track that of Vy For coincidenttracking during start up the regulated final value of Vy should be larger than that of and the resistor divider on Vy has the same ratio as the divider on Voyz that is connected See detailed discussions in the Run and Soft Start Tracking Functions in the Applications Information Section Light Load Operation Burst Mode Operation Continuous Conduction or Pulse Skipping Mode SYNC MODE Pin The LTC3808 can be programmed for either high effi ciency Burst Mode operation forced continuous conduc tion mode or pulse skipping mode atlow load currents To select Burst Mode operation tie the SYNC MODE pin to Vin To select forced continuous operation tie the SYNC MODE pin to a DC voltage below 0 4V e g GND Tying the SYNC MODE to a DC voltage above 0 4V and below 1 2V e g enables pulse skipping mode The 0 4V threshold between forced continuous operation and pulse skipping mode can be used in secondary winding regula tion as described in the Auxiliary Winding Control Using SYNC MODE Pin discussion in the Applications Informa tion se
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