ANALOG DEVICES ADL5500 English products handbook
Contents
1. 5 1 s Lr 2 a 2 0 1 0 03 E 235 20 15 10 5 0 5 10 15 INPUT dBm Figure 1 Output vs Input Level Supply 3 V Frequency 1 9 GHz The ADL5500 offers excellent temperature stability with near 0 dB measurement error across temperature The high accuracy range centered around 3 dBm at 900 MHz offers 0 1 dB error from 40 C to 85 C over an 8 5 dB range The ADL5500 reduces calibration requirements with low drift across a 30 dB range over temperature and process variations The ADL5500 operates from 40 C to 85 C and is available in a 4 ball 1 0 mm x 1 0 mm wafer level chip scale package It is fabricated on a proprietary high fr silicon bipolar process FUNCTIONAL BLOCK DIAGRAM ADL5500 geal TRANS CONDUCTANCE CELLS Rev A Information furnished by Analog Devices is believed to be accurate and reliable However no responsibility is assumed by Analog Devices for its use nor for any infringements of patents or other rights of third parties that may result from its use Specifications subject to change without notice No license is granted by implication or otherwise under any patent or patent rights of Analog Devices Trademarks and registered trademarks are the property of their respective owners INTERNAL FILTER T CAPACITOR 05546 002 One Technology Way P O Box 9106 Norwood MA 02062 9106 U S A Tel 781 329 4700 www analog com Fax 781 461 3113 2006 Analog Devices In2. 3 2 05546 014 25 20 15 10 5 0 5 10 15 INPUT dBm Figure 14 Temperature Drift Distributions for 55 Devices at 40 C 25 C and 85 C vs 25 C Linear Reference Frequency 2700 MHz Supply 5 0 V ERROR dB 3 1 2 05546 015 25 20 15 10 5 0 5 10 15 INPUT dBm Figure 15 Temperature Drift Distributions for 55 Devices at 40 C 25 C and 85 C vs 25 C Linear Reference Frequency 3900 MHz Supply 5 0 V ERROR dB ERROR dB ERROR dB ADL5500 T B oc o ira tr ui INPUT dBm INPUT dBm Figure 16 Output Delta from 25 C Output Voltage for 55 Devices Figure 19 Output Delta from 25 C Output Voltage for 55 Devices at 40 C and 85 C Frequency 450 MHz Supply 5 0 V at 40 C and 85 C Frequency 2350 MHz Supply 5 0 V 3 2 1 T 2 iv o 0 ira tr
3. Output Voltage Low Power In Pin 21 dBm 20 mV rms 0 11 V Temperature Sensitivity Pn 5 dBm 25 C TA lt 85 C 0 0027 dB C 40 C lt TA 25 C 0 0046 dB C RMS CONVERSION f 2700 MHz Input RFIN to output VRMS Input Impedance 34 0 8 Q pF Input Return Loss 8 5 dB Dynamic Range CW input 40 C lt Ta lt 85 C 0 1 dB Error Delta from 25 C Vs 5V 5 dB 0 25 dB Error Vs 3V 5 dB Vs 5V 8 5 dB 1 dB Error Vs 3V 28 5 dB Vs 5V 32 dB 2 dB Error Vs 3V 33 dB Vs 5V 36 dB Maximum Input Level 0 25 dB error 9 dBm Minimum Input Level 1 dB error 19 5 dBm Conversion Gain VOUT Gain x Vin Intercept 4 2 V V rms Output Intercept 0 02 V Output Voltage High Power In Pin 5 dBm 400 mV rms 1 67 V Output Voltage Low Power In Pin 21 dBm 20 mV rms 0 1 V Temperature Sensitivity Pin 5 dBm 25 C lt Ta lt 85 C 0 0030 dB C 40 C lt TA 25 C 0 0049 dB C Rev A Page 5 of 24 ADL5500 Parameter Condition Min Typ Max Unit RMS CONVERSION f 3900 MHz Input RFIN to output VRMS Input Impedance 30 0 6 Q pF Input Return Loss 9 dB Dynamic Range CW input 40 C Ta 85 C 0 1 dB Error Delta from 25 C Vs 5 V 2 dB 0 25 dB Erro Vs 3V 5 5 dB Vs 5V 8 dB 1 dB Error Vs 3V 28 5 dB Vs 5V 32 dB 2 dB Error Vs 3V 34 dB Vs 5V 36 5 dB Maximum Input Level 0 25 dB error 12 dBm Minimum Input Level 1 dB error 17 dBm Conversion Gain VOU
4. ui 1 2 8 3 8 25 20 15 10 5 0 5 10 15 INPUT dBm INPUT dBm Figure 17 Output Delta from 25 C Output Voltage for 55 Devices Figure 20 Output Delta from 25 C Output Voltage for 55 Devices at 40 C and 85 C Frequency 900 MHz Supply 5 0 V at 40 C and 85 C Frequency 2700 MHz Supply 5 0 V y iv o ir tr ui INPUT dBm Figure 18 Output Delta from 25 C Output Voltage for 55 Devices at 40 C and 85 C Frequency 1900 MHz Supply 5 0 V Rev A Page 11 of 24 INPUT dBm Figure 21 Output Delta from 25 C Output Voltage for 55 Devices at 40 C and 85 C Frequency 3900 MHz Supply 5 0 V ADL5500 CW QPSK 4 8dB CF 8PSK 4 8dB CF 16QAM 6 3dB CF 64QAM 7 4dB CF OUTPUT V 05546 022 INPUT dBm Figure 22 Output vs Input Level with Different Waveforms 10 MHz Signal BW for All Modulated Signals Supply 5 0 V Frequency 1900 MHz 3 0 CW 2 5 BPSK 11dB CF QPSK 11dB CF 2 0 16QAM 12dB CF 15 64QAM 11dB CF 1 0 0 5 ERROR dB eo INPUT dBm Figure 23 Error from CW Linear Reference vs Input Level for Various 802 16 OFDM Waveforms at 2 35 GHz 10 MHz Signal BW and 256 Subcarriers for All Modulated Signals Supply 5 0 V 0 L cw 12 2kbps DPCCH 5 46dB 15ksps DPDCH 0dB 60ksps 3 4dB CF 2 0
5. Frequency 900 MHz 0 01 uF Filter Capacitor Rev A Page 13 of 24 05546 032 05546 031 ADL5500 CIRCUIT DESCRIPTION The ADL5500 is an rms responding mean power detector that provides an approach to the exact measurement of RF power that is independent of waveform It achieves this function by using a proprietary technique in which the outputs of two identical squaring cells are balanced by the action of a high gain error amplifier The signal to be measured is applied to the input of the first squaring cell through the input matching network The input is matched to offer a broadband 50 Q input impedance from 100 MHz to 6 GHz The input matching network has a high pass corner frequency of approximately 90 MHz The ADL5500 responds to the voltage Vin at its input by squaring this voltage to generate a current proportional to Vin This current is applied to an internal load resistor in parallel with a capacitor followed by a low pass filter which extracts the mean of Vin Although essentially voltage responding the associated input impedance calibrates this port in terms of equivalent power Therefore 1 mW corresponds to a voltage input of 224 mV rms referenced to 50 Q Because both the squaring cell input impedance and the input matching network are frequency dependent the conversion gain is a function of signal frequency The voltage across the low pass filter whose frequency can be arbitrarily lo
6. Q pF Input Return Loss 12 5 dB Dynamic Range CW input 40 C lt Ta lt 85 C 0 1 dB Error Delta from 25 C Vs 5V 8 dB 0 25 dB Error Vs 3V 19 dB Vs 5V 24 dB 1 dB Error Vs 3V 24 5 dB Vs 5V 29 dB 2 dB Error Vs 3V 27 5 dB Vs 5V 33 dB Maximum Input Level 0 25 dB error 5 dBm Minimum Input Level 1 dB error 19 5 dBm Conversion Gain VOUT Gain x Vin Intercept 6 9 V V rms Output Intercept 0 03 V Output Voltage High Power In Pin 5 dBm 400 mV rms 2 8 V Output Voltage Low Power In Pin 21 dBm 20 mV rms 0 16 V Temperature Sensitivity Pin 5 dBm 25 C lt Ta lt 85 C 0 0020 dB C 40 C lt Ta 25 C 0 0023 dB C Rev A Page 3 of 24 ADL5500 Parameter Condition Min Typ Max Unit RMS CONVERSION f 900 MHz Input RFIN to output VRMS Input Impedance 62 1 1 Q pF Input Return Loss 13 dB Dynamic Range CW input 40 C Ta 85 C 0 1 dB Error Delta from 25 C Vs 5 V 8 5 dB 0 25 dB Erro Vs 3V 19 5 dB Vs 5V 23 dB 1 dB Error Vs 3V 24 5 dB Vs 5V 29 dB 2 dB Error Vs 3V 28 dB Vs 5V 32 dB Maximum Input Level 0 25 dB error 6 dBm Minimum Input Level 1 dB error 19 dBm Conversion Gain VOUT Gain x Vin Intercept 6 4 V V rms Output Intercept 0 04 V Output Voltage High Power In Pin 5 dBm 400 mV rms 2 61 V Output Voltage Low Power In Pin 21 dBm 20 mV rms 0 15 V Temperature Sensitivity Pn 5 dBm 25 C lt Ta lt 85 C 0 0018
7. arbitrary value The AD8031 rail to rail op amp used in these examples can swing from 50 mV to 4 95 V ona single 5 V supply and operates at supply voltages down to 2 7 V If high output current is required gt 10 mA the AD8051 which also has rail to rail capability can be used down to a supply voltage of 3 V It can deliver up to 45 mA of output current 5V ADL5500 O 12 8V V rms COMM 05546 037 05546 038 5V O 6 4V V rms ADL5500 COMM 05546 039 Figure 40 Output Buffering Options Slope of 6 4 V V rms at 900 MHz ADL5500 VRMS OUTPUT OFFSET The ADL5500 has a 1 dB error detection range of about 30 dB as shown in Figure 10 to Figure 15 The error is referred to the best fit line defined in the linear region of the output response Below an input power of 20 dBm the response is no longer linear and begins to lose accuracy In addition depending on the supply voltage saturation of the output limits the detection accuracy above 10 dBm Calibration points should be chosen in the linear region avoiding the nonlinear ranges at the high and low extremes 10 1 e 2 n LE 2 o 0 1 H 3 0 01 E 40 35 30 25 20 15 10 5 0 5 10 INPUT dBm Figure 41 Output vs Input Level Distribution of 55 Devices Frequency 900 MHz Supply 3 0 V Figure 41 shows the distribution of the output response vs the input pow
8. 3 6kbps 6 7dB CF N PICH FCH 9 6kbps 2 DCCH SCH 153 6kbps 7 6dB CF INPUT dBm Figure 27 Error from CW Linear Reference vs Input with Various CDMA2000 Reverse Link Waveforms at 900 MHz Rev A Page 12 of 24 HPE3631A POWER SUPPLY ADL5500 1 vRMS VPOS c2 c1 b 100pF g 0 1uF HP8648B SIGNAL GENERATOR 05546 028 Figure 28 Hardware Configuration for Output Response to Modulated Pulse Input 400mV rms RF INPUT t 250mV rms 160mV rms VRMS 500mV PER VERTICAL DIVISION 400s PER HORIZONTAL DIVISION 05546 029 Figure 29 Output Response to Modulated Pulse Input for Various RF Input Levels Supply 3 V Modulation Frequency 900 MHz No Filter Capacitor b rms RF INPUT E 250mV rms 400us PER HORIZONTAL DIVISION 05546 030 Figure 30 Output Response to Modulated Pulse Input for Various RF Input Levels Supply 3 V Modulation Frequency 900 MHz 0 01 uF Filter Capacitor ADL5500 HP8110A PULSE GENERATOR ADL5500 1 VRMS VPOS TEK P6204 FET PROBE HP8648B SIGNAL GENERATOR TEK TDS784C SCOPE Figure 31 Hardware Configuration for Output Response to Power Supply Gating Measurements VRMS 500mV PER VERTICAL DIVISION 200us PER res HORIZONTAL DIVISION Figure 32 Output Response to Gating on Power Supply for Various RF Input Levels Supply 3 V Modulation
9. 64kbps DPCCH 9 54dB 15ksps DPDCH 0dB 240ksps 3 4dB CF 144kbps DPCCH 11 48dB 15ksps DPDCH 0dB 480ksps 3 3dB CF 384kbps DPCCH 11 48dB 15ksps DPDCH 0dB 960ksps 3 3dB CF 768kbps DPCCH 11 48dB 15ksps DPDCH1 2 0dB 960ksps 5 8dB CF A eo ERROR dB e 25 20 15 10 5 0 5 10 INPUT dBm Figure 24 Error from CW Linear Reference vs Input with Various WCDMA Up Link Waveforms at 1900 MHz 05546 023 05546 024 3 0 cw 25 QPSK 4 8dB CF 8PSK 4 8dB CF 2 0 16QAM 6 3dB CF 15 64QAM 7 4dB CF 1 0 ERROR dB o 05546 025 25 20 15 10 5 0 5 10 INPUT dBm Figure 25 Error from CW Linear Reference vs Input with Different Waveforms 10 MHz Signal BW for All Modulated Signals Supply 5 0 V Frequency 1900 MHz 3 0 Cw 2 5 BPSK 11dB CF QPSK 11dB CF 2 0 16QAM 12dB CF 15 64QAM 11dB CF 1 0 0 5 S 0 p E 0 5 1 0 1 5 2 0 2 5 3 3 0 8 25 20 15 10 5 0 5 10 INPUT dBm Figure 26 Error from CW Linear Reference vs Input Level for Various 802 16 OFDM Waveforms at 3 5 GHz 10 MHz Signal BW and 256 Subcarriers for All Modulated Signals Supply 5 0 V y B cc o tt tc ui PICH FCH 9 6kbps 4 8dB CF PICH FCH 9 6kbps DCCH 6 3dB CF PICH FCH 9 6kbps SCH 15
10. ANALOG DEVICES 100 MHz to 6 GHz TruPwr Detector ADL5500 FEATURES True rms response Excellent temperature stability 0 1 dB accuracy vs temperature over top 8 dB of input range Up to 30 dB input dynamic range at 3 9 GHz 50 O input impedance 1250 mV rms 15 dBm maximum input Single supply operation 2 7 V to 5 5 V Low power 3 mW at 3 V supply RoHS compliant APPLICATIONS Measurement of CDMA2000 W CDMA and QPSK QAM based OFDM and other complex modulation waveforms RF transmitter or receiver power measurement GENERAL DESCRIPTION The ADL5500 is a mean responding power detector for use in high frequency receiver and transmitter signal chains from 100 MHz to 6 GHz It is easy to apply requiring only a single supply between 2 7 V and 5 5 V and a power supply decoupling capacitor The input is internally ac coupled and has a nominal input impedance of 50 Q The output is a linear responding dc voltage with a conversion gain of 6 4 V V rms at 900 MHz The on chip 1 KQ series resistance at the output combined with an external shunt capacitor creates a low pass filter response that reduces the residual ripple in the dc output voltage The ADL5500 is intended for true power measurement of simple and complex waveforms The device is particularly useful for measuring high crest factor high peak to rms ratio signals such as CDMA2000 W CDMA and QPSK QAM based OFDM waveforms
11. Output Voltage at 40 C 25 C and 85 C After Ambient Normalization Frequency 900 MHz Supply 5 0 V Rev A Page 18 of 24 The high accuracy range center varies over frequency At 900 MHz the region is centered at approximately 3 dBm At higher frequencies the high accuracy range is centered at higher input powers see Figure 16 to Figure 21 DRIFT OVER A REDUCED TEMPERATURE RANGE Figure 44 shows the error over temperature for a 1 9 GHz input signal Error due to drift over temperature consistently remains within 0 25 dB and only begins to exceed this limit when the ambient temperature goes above 50 C and below 10 C For all frequencies using a reduced temperature range higher measurement accuracy is achievable 1 00 485 C E 5 50 ou 30 C 25 C 0 50 15 C pc 25 g 025 2C kJ a 5 o tc tc M 9 25 0 50 0 75 S 1 00 8 20 15 10 5 0 5 10 15 INPUT dBm Figure 44 Typical Drift at 1 9 GHz for Various Temperatures OPERATION ABOVE 4 0 GHz The ADL5500 works at frequencies above 4 0 GHz but exhibits slightly higher output voltage temperature drift Figure 45 and Figure 46 show the error distributions of six devices at 5 0 GHz and 6 0 GHz over temperature Although the temperature drift is larger than at lower frequencies the error distributions at each temperature remain tight throughout the central linear region Due to the repeatabil
12. T Gain x Vin Intercept 3 2 V V rms Output Intercept 0 02 V Output Voltage High Power In Pin 5 dBm 400 mV rms 1 28 V Output Voltage Low Power In Pin 21 dBm 20 mV rms 0 08 V Temperature Sensitivity Pin 5 dBm 25 C lt Ta lt 85 C 0 0035 dB C 40 C lt Ta lt 25 C 0 0066 dB C OUTPUT OFFSET No signal at RFIN 40 150 mV POWER SUPPLIES Operating Range 40 C lt Ta lt 85 C 2 5 5 V Quiescent Current No signal at RFIN 1 0 mA The available output swing and hence the dynamic range is altered by the supply voltage see Figure 8 Error referred to delta from 25 C response see Figure 16 through Figure 21 3 Error referred to best fit line at 25 C Calculated using linear regression 5 Supply current is input level dependant see Figure 6 Rev A Page 6 of 24 ADL5500 ABSOLUTE MAXIMUM RATINGS Table 2 Parameter Rating Stresses above those listed under Absolute Maximum Ratings Supply Voltage Vs 55V may cause permanent damage to the device This is a stress VRMS OV Vs rating only functional operation of the device at these or any RFIN 1 25 Vrms other conditions above those indicated in the operational Equivalent Power re 50 O 15 dBm section of this specification is not implied Exposure to absolute Internal Power Dissipation 150 mw maximum rating conditions for extended periods may affect Osa WLCSP 260 C W device reliability Maximum Junction Temperature 125 C Operat
13. V Cur 10 nE light condition x 600 LUX Colors black 25 C blue 40 C red 85 C unless otherwise noted 10 2350MHz 2700MHz 3900MHz 1 E ao E E o 0 1 100MHz 450MHz 900MHz 1900MHz 2350MHz 2700MHz 8 3900MHz 3 0 03 5 8 25 20 15 10 5 0 5 10 15 INPUT dBm INPUT dBm Figure 4 Output vs Input Level Frequencies 100 MHz 450 MHz 900 MHz Figure 7 Linearity Error vs Input Level Frequencies 100 MHz 450 MHz 1900 MHz 2350 MHz 2700 MHz and 3900 MHz Supply 5 0 V 900 MHz 1900 MHz 2350 MHz 2700 MHz and 3900 MHz Supply 5 0 V 5 0 10 45 5 5V 5 0V 4 0 27V 3 5 f 3 0V S 3 0 7 Ss 1 E E B 25 a 5 5 O 20 o 1s 777 100MHz f 450MHz 1 0 7 900MHz 0 1 f 1900MHz 0 5 J 2350MHz 8 2700MHz 900MHz T 3 0 0 2 0 4 0 6 0 8 1 0 1 2 14 8 25 20 15 10 5 0 5 10 15 INPUT V rms INPUT dBm Figure 5 Output vs Input Level Linear Scale Frequencies 100 MHz 450 MHz Figure 8 Output vs Input Level 900 MHz 1900 MHz 2350 MHz 2700 MHz and 3900 MHz Supply 5 0 V Supply 2 7 V 3 0 V 5 0 V and 5 5 V Frequency 900 MHz 25 E 20 E T E kJ E 8 oa 15 o
14. c All rights reserved ADL5500 TABLE OF CONTENTS Features teet eec UE cn Oo ST 1 zlii m 1 General Description einni a 1 Functional Block Diagram sse 1 Revisio m HIStory ere ces etc ee tee eats Ae ee 2 Neff md 3 Absolute Maximum Ratings eee 7 ESD Ca tion eerte ener tieritetene teretes 7 Pin Configuration and Function Descriptions 8 Typical Performance Characteristics sse 9 Circuit Description tenente 14 Filtering iei RP RARE OE MERE aeii 14 Applications eit D Ete tan 15 Basic Connections sse 15 Output SWIDg eene eet EH RI E aE eaa 15 Linearityzii aeo nenenes on eH erbe 15 REVISION HISTORY 2 06 Rev 0 to Rev A Changes to Features endete ae eR EH Eis 1 Changes tor Table2 eroe tle 7 Changes to Figure Dorien enina aiia 9 Changes to Figure 28 and Figure 31 sss 13 Changes to Figure 35 Caption 15 Changes to Power Consumption and Power On Off Response Section iie vs E On Ree bes Changes to FIguTe 48 eee te teme DRESS Changes to Ordering Guide 7 05 Revision 0 Initial Version Input Coupling Using a Series Resistor sss 16 Multiple RF Inputs eene 16 Selecting the Output Low Pass Filter Network 16 Power Consumption and Power On Off Response 16 Output Drive Capability and Buffering esses 17 VRMS Output Offset eerte 17 Device Calibrati
15. dB C 40 C lt TA 25 C 0 0023 dB C RMS CONVERSION f 1900 MHz Input RFIN to output VRMS Input Impedance 43 0 9 Q pF Input Return Loss 11 5 dB Dynamic Range CW input 40 C lt Ta lt 85 C 0 1 dB Error Delta from 25 C Vs 5 V 7 dB 0 25 dB Error Vs 3V 20 dB Vs 5V 23 dB 1 dB Error Vs 3V 26 dB Vs 5V 30 dB 2 dB Error Vs 3V 31 5 dB Vs 5V 33 dB Maximum Input Level 0 25 dB error 8 dBm Minimum Input Level 1 dB error 19 5 dBm Conversion Gain VOUT Gain x Vin Intercept 5 0 V V rms Output Intercept 0 02 V Output Voltage High Power In Pin 5 dBm 400 mV rms 2 02 V Output Voltage Low Power In Pin 21 dBm 20 mV rms 0 11 V Temperature Sensitivity Pn 5 dBm 25 C lt TA lt 85 C 0 0017 dB C 40 C lt Ta 25 C 0 0031 dB C Rev A Page 4 of 24 ADL5500 Parameter Condition Min Typ Max Unit RMS CONVERSION f 2350 MHz Input RFIN to output VRMS Input Impedance 37 0 9 Q pF Input Return Loss 9 dB Dynamic Range CW input 40 C lt Ta lt 85 C 0 1 dB Error Delta from 25 C Vs 5 V 5 dB 0 25 dB Erro Vs 3V 5 dB Vs 5V 10 dB 1 dB Error Vs 3V 28 5 dB Vs 5V 32 dB 2 dB Error Vs 3V 32 dB Vs 5V 36 dB Maximum Input Level 0 25 dB error 8 dBm Minimum Input Level 1 dB error 19 5 dBm Conversion Gain VOUT Gain x Vin Intercept 4 5 V V rms Output Intercept 0 02 V Output Voltage High Power In Pin 5 dBm 400 mV rms 1 82 V
16. e basic connections for the ADL5500 The device is powered by a single supply of between 2 7 V and 5 5 V with a quiescent current of 1 0 mA The VPOS pin is decoupled using 100 pF and 0 1 uF capacitors The ADL5500 RF input does not require external termination components because it is internally matched for an overall broadband input impedance of 50 4 Vg 2 7V TO 5 5V ADL5500 VRMS O VRMS VPOS O RFIN 05546 033 Figure 33 Basic Connections for ADL5500 OUTPUT SWING At 900 MHz the output voltage is nominally 6 4 times the input rms voltage a conversion gain of 6 4 V V rms The output voltage swings from near ground to 4 9 V on a 5 0 V supply Figure 34 shows the output swing of the ADL5500 to a CW input for various supply voltages It is clear from Figure 34 that operating the device at lower supply voltages reduces dynamic range as the output headroom decreases 10 5 5V 5 0V 2 7V 3 0V S 1 LE 2 n LE 2 o 0 1 0 03 8 25 20 15 10 5 0 5 10 15 INPUT dBm Figure 34 Output Swing for Supply Voltages of 2 7 V 3 0 V 5 0 V and 5 5 V ADL5500 LINEARITY Because the ADL5500 is a linear responding device plots of output voltage vs input voltage result in a straight line It is more useful to plot the error on a logarithmic scale as shown in Figure 35 The deviation of the plot for the ideal straight line characteristic is caused by outpu
17. er for multiple devices The ADL5500 loses accuracy at low input powers as the output response begins to fan out As the input power is reduced the spread of the output response increases along with the error Although some devices follow the ideal linear response at very low input powers not all devices continue the ideal linear regression to a near 0 V y intercept Some devices exhibit output responses that rapidly decrease and some flatten out With no RF signal applied the ADL5500 has a typical output offset of 40 mV with a maximum of 150 mV Rev A Page 17 of 24 ADL5500 DEVICE CALIBRATION AND ERROR CALCULATION Because slope and intercept vary from device to device board level calibration must be performed to achieve high accuracy In general calibration is performed by applying two input power levels to the ADL5500 and measuring the corresponding output voltages The calibration points are generally chosen to be within the linear operating range of the device The best fit line is characterized by calculating the slope and intercept using the following equations Slope Vrms2 Vrms Vinze Vii 1 Intercept Vrms Slope x Vii 2 where Vn is the rms input voltage to RFIN Vrms is the voltage output at VRMS Once slope and intercept have been calculated an equation can be written that allows calculation of an unknown input power based on the measured output voltage Vin Vrms Intercept Sl
18. essible from the edge connector which is only R6 Open Size 0402 used for characterization Rev A Page 20 of 24 ADL5500 B12 om e 1 ANALOG a S 11 DEVICES Gnp i uem gt e ADL5500 WLCSP Gu ssf CA CHAR BD Pi 2 ZR D R6 VRMS B1 Be Figure 49 Layout of Component Side WLCSP 05546 045 05546 047 Figure 51 Silkscreen of Component Side WLCSP SIA gt c o e Q x o GEOITOA O 00 05546 046 05546 048 Figure 50 Layout of Circuit Side WLCSP Figure 52 Silkscreen of Circuit Side WLCSP Rev A Page 21 of 24 ADL5500 OUTLINE DIMENSIONS 1 010 A1 BALL 290 50 CORNER 9 910 TOP VIEW BALL SIDE DOWN SEATING PLANE E 0 50 BSC BALL PITCH 0 030 NOM COPLANARITY BOTTOM VIEW BALL SIDE UP Figure 53 4 Ball Wafer Level Chip Scale Package WLCSP CB 4 Dimensions shown in millimeters 111105 0 ORDERING GUIDE Ordering Model Temperature Range Package Description Package Option Branding Quantity ADL5500ACBZ P7 40 C to 85 C 4 Ball WLCSP 7 Pocket Tape and Reel CB 4 Q06 3 000 ADL5500ACBZ P2 40 C to 85 C 4 Ball WLCSP 7 Pocket Tape and Reel CB 4 Q06 250 ADL5500 EVALZ Evaluation Board Z Pb free part Rev A Page 22 of 24 ADL5500 NOTES Rev A Page 23 of 24 ADL5500 NOTES 2006 Analog Devices Inc All righ
19. h the frequency dependent input impedance the apparent gain changes greatly with frequency However this method has the advantage of very little power being tapped off in RF power transmission applications If the resistor is large compared to the transmission line s impedance the VSWR of the system is relatively unaffected RsERIES RFIN O RFIN ADL5500 05546 036 Figure 36 Attenuating the Input Signal MULTIPLE RF INPUTS Figure 37 shows a technique for combining multiple RF input signals to the ADL5500 Some applications can share a single detector for multiple bands Three 16 5 Q resistors in a T network combine the three 50 Q terminations including the ADL5500 The broadband resistive combiner ensures each port of the T network sees a 50 Q termination Because there is only 6 dB of isolation from one port of the combiner to the other ports only one band should be active at a time BAND 1 DIRECTIONAL COUPLER DIRECTIONAL COUPLER ADL5500 05546 051 Figure 37 Combining Multiple RF Input Signals SELECTING THE OUTPUT LOW PASS FILTER NETWORK The ADL5500 s internal filter capacitor provides averaging in the square domain but leaves some residual ac on the output Signals with high peak to average ratios such as W CDMA or CDMA2000 can produce ac residual levels on the ADL5500 dc output To reduce the effects of these low frequency components in the waveforms some additional filtering is re
20. ident at the board The resultant voltage varies with both cable length and frequency dependence on the relative ND phase of the initial and reflected signals Placing the 3 dB pad at the input of the board improves the match at the board and thus reduces the sensitivity to mismatches at the source When such precautions are taken measurements are less sensitive to cable length and other fixture issues In an actual application when Figure 47 Land Pattern Used on the ADL5500 Evaluation Board the distance between ADL5500 and source is short and well defined this 3 dB attenuator is not needed 05546 054 TO EDGE CONNECTOR C1 c2 ADL5500 Gror V onr VRMS O 1 VRMS VPOS o VPOS RFIN 05546 044 Figure 48 Evaluation Board Schematic Table 5 Evaluation Board Configuration Options Component Description Default Condition VPOS GND Ground and Supply Vector Pins Not Applicable C1 C2 Power Supply Decoupling The nominal supply decoupling of 0 01 uF and 100 pF C1 0 01 uF Size 0402 C2 100 pF Size 0402 R3 R8 C4 Output Filtering The combination of the internal 1 kO output resistance and C4 produce R3 0 Q Size 0402 a low pass filter to reduce output ripple The output can also be scaled down using the R8 Open Size 0402 resistor divider pads R3 and R8 In addition resistors and capacitors can be placed in CAand C4 10 nF Size 0402 R8 to load test VRMS R6 Alternate Interface R6 allows VOUT to be acc
21. ing Temperature Range 40 C to 85 C Storage Temperature Range 65 C to 150 C ESD CAUTION ESD electrostatic discharge sensitive device Electrostatic charges as high as 4000 V readily accumulate on the human body and test equipment and can discharge without detection Although this product features BAROTH S proprietary ESD protection circuitry permanent damage may occur on devices subjected to high energy Spr Aat electrostatic discharges Therefore proper ESD precautions are recommended to avoid performance degradation or loss of functionality ESD SENSITIVE DEVICE Rev A Page 7 of 24 ADL5500 PIN CONFIGURATION AND FUNCTION DESCRIPTIONS BUMP 1 INDICATOR e VRMS VPOS a 14 14 A Eon COMM RFIN r r s 2 3 Noe Sle 05546 003 TOP VIEW BUMP SIDE DOWN Not to Scale Figure 3 4 Ball WLCSP Pin Configuration Table 3 Pin Function Descriptions Ball No Mnemonic Description 1 VRMS Output Pin Rail to rail voltage output with limited current drive capability The output has an internal 1 kQ series resistance High resistive loads are recommended to preserve output swing 2 COMM Device Ground Pin 3 RFIN Signal Input Pin Internally ac coupled after internal termination resistance Nominal 50 O input impedance 4 VPOS Supply Voltage Pin Operational range 2 7 V to 5 5 V Rev A Page 8 of 24 ADL5500 TYPICAL PERFORMANCE CHARACTERISTICS Ta 25 C Vs 5 0
22. ity of the drift from part to part compensation can be applied to reduce the effects of temperature drift ADL5500 ERROR dB e 1 2 05546 042 25 20 15 10 5 0 5 10 15 INPUT dBm Figure 45 Temperature Drift Distributions for Six Devices at 40 C 25 C and 85 C After Ambient Normalization Frequency 5 0 GHz Supply 5 0 V CC p ERROR dB 05546 043 25 20 15 10 5 0 5 10 15 INPUT dBm Figure 46 Temperature Drift Distributions for Six Devices at 40 C 25 C and 85 C After Ambient Normalization Frequency 6 0 GHz Supply 5 0 V DEVICE HANDLING The wafer level chip scale package consists of solder bumps connected to the active side of the die The part is lead free with 95 596 tin 4 096 silver and 0 596 copper solder bump composition The WLCSP can be mounted on printed circuit boards using standard surface mount assembly techniques however caution should be taken to avoid damaging the die See the AN 617 Application Note for additional information WLCSP devices are bumped die therefore the exposed die can be sensitive to light which can influence specified limits Lighting in excess of 600 LUX can degrade performance Rev A Page 19 of 24 ADL5500 EVALUATION BOARD Land Pattern and Soldering Information Figure 47 shows the land pattern used on the ADL5500 evaluation board Pad diameters of 0 28 mm are used with a s
23. older paste mask opening of 0 38 mm For the RF input trace a trace width of 0 30 mm is used which corresponds to a 50 Q characteristic impedance for the dielectric material being used FR4 All traces going to the pads are tapered down to 0 15 mm For the RFIN line the length of the tapered section is 0 20 mm Figure 48 shows the schematic of the ADL5500 evaluation board The layout and silkscreen of the evaluation board layers are shown in Figure 49 to Figure 52 The board is powered by a single supply in the 2 7 V to 5 5 V range The power supply is decoupled by 100 pF and 0 01 uF capacitors Table 5 details the various configuration options of the evaluation board Problems caused by impedance mismatch can arise using the evaluation board to examine the ADL5500 performance One d e rts way to reduce these problems is to put a coaxial 3 dB attenuator on the RFIN SMA connector Mismatches at the source cable PAPE p mm and cable interconnection as well as those occurring on the datn US evaluation board can cause these problems r A simple and common example of such a problem is triple 4 travel due to mismatch at both the source and the evaluation board Here the signal from the source reaches the evaluation imm board and mismatch causes a reflection When that reflection reaches the source mismatch it causes a new reflection which travels back to the evaluation board adding to the original PASTE MASICOPEMING TL signal inc
24. on and Error Calculation 18 Calibration for Improved Accuracy see 18 Drift over a Reduced Temperature Range 19 Operation Above 4 0 GHz sse 19 Device Handling eet nen etia 19 Evaluation Board eite tenir pee 20 O tline Dimensions eicit t Ries 22 Ordering Guide eee bee 22 Rev A Page 2 of 24 SPECIFICATIONS Ta 25 C Vs 3 0 V Cuz 10 nE light condition lt 600 LUX unless otherwise noted ADL5500 Table 1 Parameter Condition Min Typ Max Unit FREQUENCY RANGE Input RFIN 100 6000 MHz RMS CONVERSION f 100 MHz Input RFIN to output VRMS Input Impedance 94 3 Q pF Input Return Loss 10 dB Dynamic Range CW input 40 C lt Ta lt 85 C 0 1 dB Error Delta from 25 C Vs 5V 5 dB 0 25 dB Error Vs 3V 17 5 dB Vs 5V 20 dB 1 dB Error Vs 3V 25 dB Vs 5V 29 dB 2 dB Error Vs 3V 28 5 dB Vs 5V 33 dB Maximum Input Level 0 25 dB error 6 dBm Minimum Input Level 1 dB error 18 5 dBm Conversion Gain VOUT Gain x Vin Intercept 6 1 V V rms Vs 5V 4 6 7 2 V V rms Output Intercept 0 03 V Vs 5V 20 100 mV Output Voltage High Power In Pin 5 dBm 400 mV rms 2 43 V Output Voltage Low Power In Pin 21 dBm 20 mV rms 0 14 V Temperature Sensitivity Pin 5 dBm 25 C TA lt 85 C 0 0032 dB C 40 C lt TA lt 25 C 0 0042 dB C RMS CONVERSION f 450 MHz Input RFIN to output VRMS Input Impedance 75 1 4
25. ope 3 For an ideal known input power the law conformance error of the measured data can be calculated as ERROR dB 20 x log Vams measuren Intercept Slope x Vin weat 4 Figure 42 includes a plot of the error at 25 C the temperature at which the ADL5500 is calibrated Note that the error is not zero This is because the ADL5500 does not perfectly follow the ideal linear equation even within its operating region The error at the calibration points is however equal to zero by definition 3 ERROR dB 05546 052 25 20 15 10 5 0 5 10 15 INPUT dBm Figure 42 Error from Linear Reference vs Input at 40 C 25 C and 85 C vs 25 C Linear Reference Frequency 900 MHz Supply 5 0 V Figure 42 also includes error plots for the output voltage at 40 C and 85 C These error plots are calculated using the slope and intercept at 25 C This is consistent with calibration in a mass production environment where calibration at temperature is not practical CALIBRATION FOR IMPROVED ACCURACY Another way of presenting the error function of the ADL5500 is shown in Figure 43 In this case the dB error at hot and cold temperatures is calculated with respect to the transfer function at ambient This is a key difference in comparison to the previous plots Up to now the errors have been calculated with res
26. pect to the ideal linear transfer function at ambient When this alternative technique is used the error at ambient becomes equal to 0 by definition see Figure 43 This plot is a useful tool for estimating temperature drift at a particular power level with respect to the nonideal response at ambient The linearity and dynamic range tend to be improved artificially with this type of plot because the ADL5500 does not perfectly follow the ideal linear equation especially outside of its linear operating range Achieving this level of accuracy in an end application requires calibration at multiple points in the device s operating range In some applications very high accuracy is required at just one power level or over a reduced input range For example in a wireless transmitter the accuracy of the high power amplifier HPA is most critical at or close to full power The ADL5500 offers a tight error distribution in the high input power range as shown in Figure 43 The high accuracy range centered around 3 dBm at 900 MHz offers 8 5 dB of 0 1 dB detection error over temperature Multiple point calibration at ambient temperature in the reduced range offers precise power measurement with near 0 dB error from 40 C to 85 C 3 85 C 25 C ERROR dB e 40 C 1 2 3 25 20 15 10 5 0 5 10 15 INPUT dBm Figure 43 Error from 25 C
27. quired The output of the ADL5500 can be filtered by placing a capacitor between VRMS Pin 1 and ground The combination of the on chip 1 kQ output series resistance and the external shunt capacitor forms a low pass filter to reduce the residual ac Table 4 shows the effect of several capacitor values for various communications standards with high peak to average ratios along with the residual ripple at the output in peak to peak and rms volts Note that large load capacitances increase the turn on and pulse response times see Figure 29 and Figure 30 Table 4 Waveform and Output Filter Effects on Residual AC Output Residual AC Waveform Crit V dc mV p p mV rms 640AM 0 01 uF 0 5 7 0 14 7 4 dB CF 1 0 7 4 1 5 2 0 7 6 1 6 0 1 uF 0 5 6 7 14 1 0 7 2 1 5 2 0 7 4 1 5 W CDMA RL 0 01 uF 0 5 10 1 7 3 4 dB CF 1 0 16 24 2 0 45 5 6 0 1 uF 0 5 7 1 5 1 0 9 1 6 2 0 14 2 3 CDMA2000 UL 0 01 uF 0 5 46 6 6 7 dB CF 1 0 85 13 2 0 191 27 0 1 uF 0 5 17 3 1 0 31 5 2 0 68 9 POWER CONSUMPTION AND POWER ON OFF RESPONSE The quiescent current consumption of the ADL5500 varies with the size of the input signal from approximately 1 mA for no signal up to 6 mA at an input level of 0 7 V rms 10 dBm re 50 Q If the input is driven beyond this point the supply current increases sharply as shown in Figure 6 There is little variation in quiescent current with power supply voltage The ADL5500 can be disabled by simpl
28. t clipping at the high end and by signal offsets at the low end However it should be noted that offsets at the low end can be either positive or negative therefore this plot could also trend upwards at the low end Figure 10 through Figure 15 show error distributions for a large population of devices 3 100MHz 450MHz 900MHz 2 1900MHz 2350MHz 2700MHz 3900MHz ERROR dB e 05546 007 INPUT dBm Figure 35 Representative Unit Error in dB vs Input Level Vs 5 0 V It is also apparent in Figure 35 that the error plot tends to shift to the right with increasing frequency The squaring cell has an input impedance that decreases with frequency The matching network compensates for the change and maintains the input impedance at a nominal 50 The result is a decrease in the actual voltage across the squaring cell as the frequency increases reducing the conversion gain Similarly conversion gain is less at frequencies near 100 MHz because of the small on chip coupling capacitor Rev A Page 15 of 24 ADL5500 INPUT COUPLING USING A SERIES RESISTOR Figure 36 shows a technique for coupling the input signal into the ADL5500 that can be applicable where the input signal is much larger than the input range of the ADL5500 A series resistor combines with the input impedance of the ADL5500 to attenuate the input signal Because this series resistor forms a divider wit
29. the squaring cells in the ADL5500 have a Class AB aspect the peak input is not limited by its quiescent bias condition but is determined mainly by the eventual loss of square law conformance Consequently the top end of their response range occurs at a large input level approximately 700 mV rms while preserving a reasonably accurate square law response The maximum usable range is in practice limited by the output swing The rail to rail output stage can swing from a few millivolts above ground to within 100 mV below the supply An example of the output induced limit given a conversion gain of 6 4 V V rms at 900 MHz and assuming a maximum output of 2 9 V with a 3 V supply has a maximum input of 2 9 V rms 6 4 or 450 mV rms FILTERING An important aspect of rms dc conversion is the need for averaging the function is root mean square The on chip averaging in the square domain has a corner frequency of approximately 150 kHz and is sufficient for common modulation signals such as CDMA WCDMA and QPSK QAM based OFDM for example WLAN and WiMAX It ensures the accuracy of rms measurement for these signals however it leaves significant ripple on the output To reduce this ripple an external shunt capacitor can be used at the output to form a low pass filter with the on chip 1 kQ resistance see the Selecting the Output Low Pass Filter Network section Rev A Page 14 of 24 APPLICATIONS BASIC CONNECTIONS Figure 33 shows th
30. ts reserved Trademarks and ANALOG registered trademarks are the property of their respective owners DOE AG a GOAL DEVICES www analog com Rev A Page 24 of 24
31. w is applied to one input of an error sensing amplifier A second identical voltage squaring cell is used to close a negative feedback loop around this error amplifier This second cell is driven by a fraction of the quasi dc output voltage of the ADL5500 When the voltage at the input of the second squaring cell is equal to the rms value of Vm the loop is in a stable state and the output then represents the rms value of the input By completing the feedback path through a second squaring cell identical to the one receiving the signal to be measured several benefits arise First scaling effects in these cells cancel therefore the overall calibration can be accurate even though the open loop response of the squaring cells taken separately need not be Note that in implementing rms dc conversion no reference voltage enters into the closed loop scaling Second the tracking in the responses of the dual cells remains very close over temperature leading to excellent stability of calibration The squaring cells have very wide bandwidth with an intrinsic response from dc to microwave However the dynamic range of such a system is small due in part to the much larger dynamic range at the output of the squaring cells There are practical limitations to the accuracy of sensing very small error signals at the bottom end of the dynamic range arising from small random offsets that limit the attainable accuracy at small inputs On the other hand
32. y removing the power to the device Figure 32 shows a plot of the output response to the supply being turned on that is VPOS is pulsed with an output shunt capacitor of 0 01 uF Again the turn on time is influenced strongly by the size of the output shunt capacitor To improve the falling edge of the supply gating response and the pulse response a resistor can be placed in parallel with the output shunt capacitor The added resistance helps discharge the capacitor Although this method reduces the power off time the added load resistor also attenuates the output see the Output Drive Capability and Buffering section Rev A Page 16 of 24 OUTPUT DRIVE CAPABILITY AND BUFFERING The ADL5500 is capable of sourcing an output current of approximately 3 mA The output current is sourced through the on chip 1 kQ series resistor therefore any load resistor forms a voltage divider with this on chip resistance It is recommended that the ADL5500 drive high resistive loads to preserve output swing preferably gt 100 kQ If an application requires driving a low resistance load a simple buffering circuit can be used as shown in Figure 40 Similar circuits can be used to increase or decrease the nominal conversion gain see Figure 38 and Figure 39 In Figure 39 the AD8031 buffers a resistive divider to give half of the slope In Figure 38 the op amps gain of two doubles the slope Using other resistor values the slope can be changed to an
33. z gt z 5 a n Lu 5 D 10 5 8 0 01 02 03 04 05 06 07 08 09 0 4 2 3 4 5 6 INPUT V rms FREQUENCY GHz Figure 6 Supply Current vs Input Level Supplies 3 0 V and 5 0 V Figure 9 Return Loss vs Frequency Temperatures 40 C 25 C and 85 C Rev A Page 9 of 24 ADL5500 ERROR dB INPUT dBm 05546 010 Figure 10 Temperature Drift Distributions for 55 Devices at 40 C 25 C and 85 C vs 25 C Linear Reference Frequency 450 MHz Supply 5 0 V 3 ERROR dB e INPUT dBm 05546 011 Figure 11 Temperature Drift Distributions for 55 Devices at 40 C 25 C and 85 C vs 25 C Linear Reference Frequency 900 MHz Supply 5 0 V ERROR dB INPUT dBm 05546 012 Figure 12 Temperature Drift Distributions for 55 Devices at 40 C 25 C and 85 C vs 25 C Linear Reference Frequency 1900 MHz Supply 5 0 V Rev A Page 10 of 24 ERROR dB 05546 013 25 20 15 10 5 0 5 10 15 INPUT dBm Figure 13 Temperature Drift Distributions for 55 Devices at 40 C 25 C and 85 C vs 25 C Linear Reference Frequency 2350 MHz Supply 5 0 V ERROR dB
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ANALOG DEVICES ADL5500 English products handbook