SHARP LZ93N19 handbook
Contents
1. HORIZONTAL TIMING lt NTSC gt Unit us 0 6 29 HD i 0 11 01 157 629 CSYNC 1 57 A EQ 3 15 1 57 SAW 6 92 9 44 BF 079 2 05 BCPI 1 57 2 83 2 3 15 5 98 ENCP 629 H 2 0 9 75 787 18 88 WBLK B c HBLK f 0 9 75 WHD 0 6 36 SCHD 5 VD 0 FRPI 2 0 6 29 CFMO NOTES Applied to the CCD of 542 horizontal pixels CKMD L A 2 31 ws 2 94 4s C 8 60 Applied to the CCD of 762 horizontal pixels CKMD A 22 36 ws 2 91 4s C 8 57 us 284 SHARP LZ93N19 HORIZONTAL TIMING PAL gt Unit uS 6 21 HD 12 12 CBLK 1 55 621 CSYNC 1 55 A EQ 311 155 SAW 714 932 BF L 078 280 BCP 155 280 BCP2 310 590 ENCP HGi2 0 9 63 PBLK 839 20 50 WBLK B C HBLK 0 9 63 WHD 0 6 34 SCHD 0 FRPI 2 o 6 21 CFMO 1 55 LSW NOTES Applied to the CCD of 542 horizontal pixels CKMD 1 2 28 5 2 90 uS 9 73 uS Applied to the CCD of 762 horizontal pixels CKMD A 2 33 4S 2 87 us 9 70 285 R H RALs CCD SHARP LZ93N19 WBLK CBLK TIMING lt NTSC gt Unit xs ODD FIELD 492 42. 3rd FIELD HD CSYNC PBLK BF 1 BF 3 BFBL 1 BFBL 3 LSW 1 LSW 3 WHD BCP1 2x HG HG2 FRPI CFMO 2nd 4th FIELD HD Fi CBLK CSYNC PBLK BF 2 BF 4 BFBL 2 BFBL 4 LSW 2 LSW 4 WHD 1 2 HG HG2 FRP CFMO VERTICAL TIMING lt PAL gt 621622623624625 n f n n n 23456789101112 An n 1 N f 1314151617181920212223 24 n Vu E mE TESTE 0e TEE 1 2 1st Field CPMD H 30931031 1312313314315316317318319320321 322323324325326327328329330331 332333324335336337 n n n n fn fn n fl non n n n A Va wr ma ma v Wy li U uU UTU i n nni n n 1 nnm nao mi 1 J Leh Af n mm L CPMD H LZ93N19 283 CCD PERIPHERALs SHARP 1293 19
3. TST 1 TST2 TST3 TST4 TST5 7 Applied to inputs TST 1 TST2 TST3 TST4 TSTs 8 Applied to output EOO 277 CCD PERIPHERALs SHARP PIN FUNCTION 11 0 L 293319 FUNCTION CFMO bier frame output A pulse to control color frame occurs at every 4 fields in NTSC rode recurs at every 8 fields in PAL mode Color frame input An input pin for color frame signal Connect to CFMO pin 1 in Internal Synchronous mode Con nect to external color frame signal in External Syn chronous mode Connect to L level when 4FSC pin 43 is set to L level Test terminal 3 A pin for tests Set open or to L level in the Normal mode Subcarrier output 1 An output pin for color subcarrier The frequency of the signal is 1 4 the 4FSC frequency pin 43 The signal is reset by color frame pulse CFMI pin 2 Subcarrier output 2 An output pin for color subcarrier When the phase of SC pin 4 is 180 degree the phase of 5 2 is 90 degree in NTSC mode in PAL mode the phase of SC2 is 90 degree when LSW pin 14 is Low and 270 degree when LSW is High Grouding A grouding pin Wide Horizontal drive output An output pin for wide horizontal drive pulse The pulse width is equal to that of PBLK pin 39 and the repetition is horizontal frequency Vertical reset An input pin for resetting internal vertical counter The input pulse is necessary 1 2 h
4. is advanced output is Low level When CPI is delayed output is High level When phases are equal the terminal imped ance is High Horizontal comparison input An input pin for comparison horizontal signal to the phase comparator Connect to SCHD pin 33 when comparator is used Set to L level when comparator is not used Horizontal drive pulse The pulse occurs at the start of lines Connect to timing LSI Horizontal reference input An input pin for the reference horizontal signal to the phase comparator Connect to HD pin 31 when comparator is used Set to L level when comparator is not used Subcarrier HD A horizontal synchronization pulse obtained by di viding 4FSC pin 43 At NTSC mode dividing into 1 91 O 4FSC At PAL mode dividing into 1 1 135 4FSC ordi narily and dividing into 1 1 137 4FSC during one horizontal pe riod within the V blanking V drive pulse The pulse occurs at the start of every field Con nect to VDI pin 2 of timing LSI LZ93N61 or VDI Pin 1 of timing LSI LZ92E62 Filed index The pulse is used for detecting field At NTSC mode 1st field LOW 2nd field HIGH At PAL mode 1st and 3rd field LOW 2nd and 4th field HIGH 280 Blanking clamp pulse When the input is High BCPI pin 37 and BCP2 pin 36 are Low SHARP LZ93N19 SYMBOL POLARITY PIN NAME FUNCTION A pulse to clamp the optical black signal This pulse
5. is continuous at horizontal cycle when CPMD pin Optical black 25 and CPBL pin 36 are Low When CPMD is High clamp pulse 1 and CPBL is Low output stays Low during the ab sence of effective pixels within the Vertical blank ing otherwise is continuous at horizontal cycle Optical black BCP2 is thesame as BCPI pin 37 except that BCP2 clamp pulse 2 is delayed by 900 ns from BCP 1 Pre blanking pulse Equivalent to CBLK pin 16 pulse except for shorter output pulse width with cut off trailing edge The pulse is used in color separator The signal switches H and L at every line It resets at the 14th line when in NTSC and at the 9th line when in PAL mode Line index pulse 1 The pulse is used in color separator The signal switches H and L at every line It resets at the 277th line when in NTSC and at the 322th line when in PAL mode Line index pulse 2 Equivalent to CBLK pin 16 except that its pulse Wide blanking pulse width is wider than that of CBLK An input pin for the signal 4 times the color sub carrier frequeny At NTSC mode 14 318180 MHz At PAL mode 17 734475 MHz Connect to L level when SC1 pin 4 and SC2 pin 5 signals are not required 4FSC input A pin for tests Set open or to L level in the Normal mode Test terminal 1 Input pin CMOS level ICU Input pin CMOS level with pull up resistor ICD Input pin CMOS level with pull down
6. resistor ICSU Schmitt trigger Input pin CMOS level with pull up resistor 0 Output pin TO Tri state output pin 281 CCD PERIPHERALs SHARP LZ93N19 TIMING DAIGRAM VERTICAL TIMING lt NTSC gt ODD FIELD 5235245251 234 56789101112131415 16171619202122232425 HD ANANN n n f ED FI CBLK 1 n nnn CSYNC UJ UV UU BF 11 1 Ln d 1 1 1 1 WHD f f u1nnnnnnnnmnnnnmrmnssnunonsonsonsonsonsonsij no 1 2 HG E n HG2 ru 14 j LA FRP 1 2 Field x CPMD H EVEN FIELD 260261262263264265266 267266269270271272273 274275276277276279 280 261262 2832642652 267 HD n nmn 111111 n nnl nn VD 1 FI hf n fn nf n CSYNC p uw Yu vun vuU U U t U mn n n f m BF ffl tl fi f 0D nd Qf HD ni 111 BCP 2k 11 HG HG2 1 11 FRP2 r CFMO x CPMD 282 1st
7. 93 525 1 2 20 21 22 87 88 CBLK 1 20 H 11 01 us WBLK 118 5 H 18 88 EVEN FIELD 230 231 232 263 264 283 284 349 350 351 l N JL JL f WBLK 118 5 7 87 us WBLK CBLK TIMING lt PAL gt 1st 3rd FIELD 586 587 588 623 624 23 24 25 100 101 cBLK JL WBLK Lj 137 5 420 51 US 2nd 4th FIELD 274 275 276 310 311 336 412 413 414 CBLK 25 12 12 us WBLK 137 5 H 48 39 us l 286
8. E fa LSW T FRP2 D m Voc 28 4 VD FI GND 6 F F 2 FOO GND 6 1 4 2 O 8 TST1 TST2 TST3 TST4 TST5 SCHD SCI SC2 RPI CPI In the absence of confirmation by device specification sheets WARP takes no responsibility for any defects that occur In equipment using any of SHARP s devices shown in catalogs data books etcContact WARP in waler to obtain thelatest version of the device specification sheets before using any SHARP s device 276 SHARP LZ93N19 ABSOLUTE MAXIMUM RATINGS PARAMETER SYMBOL RATING Supply voltage 0 3 to 7 0 Input voltage 0 3 toVec 0 3 Output voltage 0 3 to 0 3 Operating temperature 20 to 70 Storage temperature 55 to 150 DC CHARACTERISTICS Vcc 5 10 Ta 10 to 70 C PARAMETER SYMBOL Input Low voltage Vit Input High voltage Input High threshold voltage Vr Input Low threshold voltage Vr Hysteresis voltage VT VT Output Low voltage VoL lo 4 mA Output High voltage 2 v nput Low current Vlzo v j EAER VI Vcc nput High curren Leak Output current loz High Z NOTES 1 Applied to all inputs except for VRI 2 Applied to input VRI 3 Applied to all outputs 4 Applied to all inputs except for VRI LRST 5 Applied to Inputs VRI LRST 6 Applied to all inputs except for
9. SHARP 7o IL LZ93N19 L Z 9 3 N 1 9 Synchronous Signal Generator for CCD DESCRIPTION PIN CONNECTIONS The LZ93N19 is a CMOS synchronous signal generator LSI which provides TV synchronous 44 NOTE pulses and video signal processing pulses in 9 9 lt 92 E E f n orczo uso oo5gp combination with the timing signal generator LSI 8382 8802928272825 2423 LZ93N61 17932750 LZ93F33 LZ95D37 M VD 34 22 CKMD 35 21 TST2 FEATURES CPBL 36 20 FRP 1 BCPI 37 19 FRP2 Switchable between 270000 pixels CCD and BCP 3s 18 TSTS 320000 pixels CCD PBLK 39 17 CSYNC Switchable between NTSC EIA and PAL HG 40 18 GBLK HG2 41 15 ENCP CCIR systems WBLK 42 14 LSW Single 5 V power supply 4FSC 43 13 LRST External synchronization is possible TST 1144 0 12 TVMD Package 44 pin QFP QFP044 P 101 O 112131415161 89 or gop eases SE BLOCK DIAGRAM D LRST an 7 7 H CKMD 2 t GATE HG 1 1 2 gt figs 1 2 GATE GPBL 5 BF 1 2 GATE ENCP 16 CBLK CFMI i 17 CSYNC 52 HBLK RESET e L FIELD d SELECT 38 BCP2 Ha Hs OR COUNTER COUNTER 2 WBLK 1 7 1 10 BFBL GATE GAT
10. ck output that is used for VTR servo The pulse occurs at odd fields and its repetition is frame period Test terminal 2 A pin for to tests Set open or to L level in the Normal mode Clock mode select Test terminal 4 A pin to select the factor of frequeny divisions Division 1 3 1 4 CKMD LOW HIGH Set to L level for 1721 13 22114 122123 122124 U2313 LZ2314 LZ2323 or LZ2324 A pin for to tests Set open or to L level in the Normal mode Horizontal blanking pulse A pulse that corresponds to the cease period of the horizontal transfer pulse Clamp Pulse mode seldct An input pin to stop or continue BCP 1 pin 37 and BCP2 pin 38 pulses within the vertical blanking period L level continuous output H level becomes Low level during the ab sence of effective pixels within V blanking period Grounding A grounding pin 279 SYMBOL PIN NAME LZ93N19 FUNCTION Main clock An input pin for reference clock Connect to Dour pin 3 of timing LSI LZ93N61 or DO pin 3 of timing LSI following frequencies ap pear on this pin At NTSC mode 9 534964 MHz when CKMD L level 12 713285 MHzwhen CKMD H level At PAL mode 9 656250 MHz when CKMD L level 12 875000 MHz when CKMD H level Power supply Supply 5 V power Phase comparator output Phase comparator output for input signals RPI pin 32 and CPI pin 30 When CPI
11. orizontal max delay from vertical synchronous start point because VRI is counted by 2 times horizontal frequency Set open or to H level when not resetting Burst flag A pulse to define burst period Burst flag blanking At NTSC mode At PAL mode holds H level stays at L level during the blank ing period of BF pin 9 otherwise stays at H level Non connection A pin for no use TV mode An input pin to select TV standards At NTSC mode L level At PAL mode level 278 Line switch reset The input resets the output from LSW 14 Sei open or to H level when not used SYMBOL POLARITY PIN NAME LZ93N19 FUNCTION LSW JU Line switch The signal switches between H and L at every line It is set at Low level at the 1st line of the 1st field n Encoder DC clamp A clamp pulse that is used for recovering DC level The repetition is horizontal frequency Composite blanking pulse Composite blanking pulses In NTSC mode 11 01 js V 20 period In PAL mode 12 12 us V 25 period Composite synchronous signal A composite synchronous signal Test terminal 5 A pin for to tests Set open or to L level in the Normal mode Frame read pulse 2 A clock output that is used for VTR servo The pulse occurs at even fields and its repetition is frame period CCD PERIPHERALs Frame read pulse 1 A clo
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SHARP LZ93N19 handbook