ST STM6520 handbook
Contents
1. 40 20 0 20 40 60 80 100 120 140 Temperature C A 5 5 Vt 3 3 V 4 2 V AMO0625 Doc ID 15953 Rev 6 ky STM6520 Maximum rating 6 a Maximum rating Stressing the device above the rating listed in the Absolute maximum ratings table may cause permanent damage to the device These are stress ratings only and operation of the device at these or any other conditions above those indicated in the operating sections of this specification is not implied Exposure to absolute maximum rating conditions for extended periods may affect device reliability Refer also to the STMicroelectronics SURE Program and other relevant quality documents Table 2 Absolute maximum ratings Symbol Parameter Value Unit TsrG Storage temperature Voc off 55 to 4150 C Tap Lead solder temperature for 10 seconds 260 C OJA Thermal resistance junction to ambient TDFN8 149 0 C W Vio Input or output voltage 0 3 to 5 5 V Voc Supply voltage 0 3 to 7 V ESD V Electrostatic discharge protection human body model 2 kV HBM all pins JESD22 A114 B level 2 Electrostatic discharge protection charged device model VRCDM 1 kV all pins V Electrostatic discharge protection machine model all pins 200 V MM JESD22 A115 A level A Latch up Vcc pin reset input pins EIA JESD78 1 Reflow at peak temperature of 260 C The time above 2552. ky STM6520 Dual push button Smart Reset with push button controlled output delay Features Dual Smart Reset push button inputs with user selectable extended reset setup delay by two state input logic tsrc 6 10 s min Push button controlled reset pulse duration no fixed nor minimum pulse width guaranteed No power on reset m Dual reset outputs January 2011 RST1 active low open drain RST2 active high push pull Fixed Smart Reset input logic voltage levels Broad operating voltage range 1 65 V to 5 5 V inactive reset output levels valid down to 1 0 V Low supply current 1 5 pA Operating temperature 30 C to 85 C TDFN8 package 2 mm x 2 mm x 0 75 mm RoHS compliant A TDFN8 DG 2mmx2mm Applications Doc ID15953 Rev 6 Mobile phones smartphones e books MP3 players Games Portable navigation devices Any application that requires delayed reset push button s response for improved system stability 1 23 www st com Contents STM6520 Contents 1 IegupBM 5 2 Device overview 99 NEE KKK ENKE kager a eee ee 6 3 Pin descriptions Gage cum mx eR RAE RRESAER REG RE EAE 7 3 1 Power supply Voc s es seet dee ke Rn eR Rx ed RR n seeds 7 3 2 Ground Ves susashscksthlaaeA EUER ERI ee een eeu CARA AX aq E RE 7 3 3 Smart Reset inputs SRO GP 7 3 4 User selectable Smart Reset delay DG
3. 7 3 5 Reset outputs RST1 DST 7 4 Typical application diagram seeeleessee 8 5 Typical operating characteristics 10 6 Maximum rating ucc acad CR COR TR RC RC RC NOR ir LO RC RA RE f 11 7 DC and AC parameters eeeeeeeeeee eese 12 8 Package mechanical data 14 9 Package footprint ge IEN SUNNEN ewe Rie 16 10 Tape and reel information sssseleleelllles 17 11 Ordering information 20 12 Package marking information 21 13 REVISION history iussum ce ene eee nct RR CN QR OR Ue EN Un RR n 22 2 23 Doc ID 15953 Rev 6 DI STM6520 List of tables List of tables Table 1 Table 2 Table 3 Table 4 Table 5 Table 6 Table 7 Table 8 Table 9 Table 10 Table 11 Signal names EE 6 Absolute maximum rang 11 Operating and measurement conditions 12 DC and AC characteristics 063 SEERE NERE REE ERE SEER EEE A RS 13 TDFN 8 lead 2 x 2 x 0 75 mm 0 5 mm package mechanical data 15 Parameter for landing pattern TDFN 8 lead 2 x 2 mm package 16 Carrier tape dimensions lille m eae 17 Heel dimensions iue RR mx RAE aioe Xue NENNEN RISANE NENEA runs 18 Ordering information scheme 000 eee 20 Package marking 2 00 cece RR rh 21 Document revision history 22 Doc ID 15953 Rev 6 3 23 List of figures STM6520 List of figures Figure 1 Figure 2
4. Powerkey L System ASIC AM00440c 1 DSR pin pin 5 must be tied to Voc or Vss 2 When only one Smart Reset input is used connect the unused one permanently to Vss Figure 5 RST2 used for interrupting system power System power Regulator y STM6520 psR per SRo 2 SR1 RST1 Power on Powerkey System ASIC AM00439c 1 DSR pin pin 5 must be tied to Vec or Vss 2 When only one Smart Reset input is used connect the unused one permanently to Vgs a 8 23 Doc ID 15953 Rev 6 STM6520 Typical application diagram Figure6 Timing waveforms 165V 1 65 V Start End Push button timer timer controlled output wu T immunity N seconds SR1 RST1 RST2 AMO00437 Figure 7 Undervoltage condition Time s AM00438 Note If undervoltage occurs Vcc drops below 1 575 V typ while reset outputs are active both outputs are released and go inactive ky Doc ID 15953 Rev 6 9 23 Typical operating characteristics STM6520 5 10 23 Typical operating characteristics Figure 8 Supply current lcc vs temperature 40 20 0 20 40 60 80 100 120 140 Temperature C 5 5 V 3 3 V 2V AMo0624 Figure 9 Smart Reset delay tsnc vs temperature DSR Vss tsrc Isl
5. C must not exceed 30 seconds 2 For RST2 0 3 to Voc 0 3 V only Doc ID 15953 Rev 6 11 23 DC and AC parameters STM6520 7 12 23 DC and AC parameters This section summarizes the operating measurement conditions and the DC and AC characteristics of the device The parameters in the DC and AC characteristics table that follow are derived from tests performed under the Measurement Conditions summarized in Table 3 Operating and measurement conditions Designers should check that the operating conditions in their circuit match the operating conditions when relying on the quoted parameters Table 3 Operating and measurement conditions Parameter Value Unit Voc supply voltage 1 65 to 5 5 V Ambient operating temperature TA 30 to 85 C Input rise and fall times lt 5 ns Input pulse voltages 0 2 to 0 8 Vcc V Input and output timing ref voltages 0 3 to 0 7 Vcc V Figure 10 AC testing input output waveforms 0 2 Vcc f E03 Vcc AM00478 Doc ID 15953 Rev 6 ky STM6520 DC and AC parameters Table 4 DC and AC characteristics Symbol Parameter Test conditions Min Typ Max Units Vcc Supply voltage range Operating voltage 1 65 5 5 V Voc 3 0 V tggc counter is inactive 1 5 2 5 HA Voc 5 0 V tgnc counter is inactive 2 0 3 0 HA Icc Supply voltage Voc 3 0 V tgnc counter is ac
6. E SAVING OR LIFE SUSTAINING APPLICATIONS NOR IN PRODUCTS OR SYSTEMS WHERE FAILURE OR MALFUNCTION MAY RESULT IN PERSONAL INJURY DEATH OR SEVERE PROPERTY OR ENVIRONMENTAL DAMAGE ST PRODUCTS WHICH ARE NOT SPECIFIED AS AUTOMOTIVE GRADE MAY ONLY BE USED IN AUTOMOTIVE APPLICATIONS AT USER S OWN RISK Resale of ST products with provisions different from the statements and or technical features set forth in this document shall immediately void any warranty granted by ST for the ST product or service described herein and shall not create or extend in any manner whatsoever any liability of ST ST and the ST logo are trademarks or registered trademarks of ST in various countries Information in this document supersedes and replaces all information previously supplied The ST logo is a registered trademark of STMicroelectronics All other names are the property of their respective owners 2011 STMicroelectronics All rights reserved STMicroelectronics group of companies Australia Belgium Brazil Canada China Czech Republic Finland France Germany Hong Kong India Israel Italy Japan Malaysia Malta Morocco Philippines Singapore Spain Sweden Switzerland United Kingdom United States of America www st com ky Doc ID 15953 Rev 6 23 23
7. Figure 3 Figure 4 Figure 5 Figure 6 Figure 7 Figure 8 Figure 9 Figure 10 Figure 11 Figure 12 Figure 13 Figure 14 Figure 15 Figure 16 Figure 17 4 23 logic diagram oed Ae erg e Ree RD RENS EE debate A REL LERNER AN 5 PIN CONNGCUONS sodas eee anise ee ed amet deed RE Ed RE E xard wee nsw Kor 5 Block dlagraM 2 enses abe ees ewe eee ded eb Ded edad x pep S ERR 7 RST1 output used for microcontroller reset llle 8 RST2 used for interrupting system power 8 Timing wavefOrms 9 Undervoltage condition s ssk respiris tnt eee 9 Supply current Icc vs temperature 10 Smart Reset delay tenc vs temperature DSR Nee 10 AC testing input output waveforms 00 ce en 12 TDFN 8 lead 2 x 2 mm package outline 14 Landing pattern TDFN 8 lead 2 x 2 mm without thermal pad 16 Carrertape deeqeidie red dbi eer eda di reed eva b ree rites hag es es 17 Reel dimensions ER tte un 18 Tape trailer leader inaner a ete tetas 19 Pin T orlentatlon 5e eot KEE ERRELE RANTE Pele ARB RER EO mA Ree ae ERRA ES 19 Package marking area top view 21 Doc ID 15953 Rev 6 ky STM6520 Description Description The Smart Reset devices provide a useful feature that ensures inadvertent short reset push button closures do not cause system resets This is done by implementing extended Smart Reset input delay time tegc and combined push butt
8. age outline PIN 1 INDEX AREA 3 o 10 C 2x 77 c3 o10 c zx TOP VIEW Z o10 c 4o l SEATING A j PLANE SIDE VIEW A 0 08 C EAD e PIN 1 INDEX AREA bes b 1 nm 0100 C A B Pin ID c A 5 8 BOTTOM VIEW 8070540 A Doc ID 15953 Rev 6 ky STM6520 Package mechanical data a Table 5 TDFN 8 lead 2 x 2 x 0 75 mm 0 5 mm package mechanical data Dimension mm Dimension inches Symbol Min Nom Max Min Nom Max A 0 70 0 75 0 80 0 028 0 030 0 031 A1 0 00 0 02 0 05 0 000 0 001 0 002 b 0 15 0 20 0 25 0 006 0 008 0 010 D 1 9 2 00 2 1 0 075 0 079 0 083 BSC E 1 9 2 00 2 1 0 075 0 079 0 083 BSC 2 j i e 0 50 0 020 L 0 45 0 55 0 65 0 018 0 022 0 026 Doc ID 15953 Rev 6 15 23 Package footprint STM6520 9 16 23 Package footprint Figure 12 Landing pattern TDFN 8 lead 2 x 2 mm without thermal pad b AM00441 Table 6 Parameter for landing pattern TDFN 8 lead 2 x 2 mm package Dimension mm Parameter Description Min Nom Max L Contact length 1 05 1 15 b Contact width 0 25 0 30 E Max land pattern Y direction 2 85 E1 Con
9. ling capacitor is recommended to be connected between the Vcc and Vgs pins as close to the STM6520 device as possible Ground Vss This is the ground pin for the device Smart Reset inputs SRO SR1 Push button Smart Reset inputs active low Both inputs need to be asserted simultaneously for at least tgnc to activate the reset outputs User selectable Smart Reset delay DSR An input that allows the user to program the setup time tsprc for which both the push buttons need to be pressed to activate the reset outputs Controlled by different voltage levels on the DSR pin when connected to ground tsgnc 7 5 s when connected to Vcc tenc 12 5 s typ DSR is a DC type input intended to be either permanently grounded or permanently connected to Vcc Reset outputs RST1 RST2 RST1 is active low open drain RST2 active high push pull Neither fixed nor minimum output reset pulse duration nor power on reset is implemented Releasing any of the push buttons while reset outputs are active causes both outputs to deassert Block diagram DSR SRO Smart Reset M SR1 reset logic RST1 RST2 tenc selector i two state logic Oscillator AM00436V2 Doc ID 15953 Rev 6 7 23 Typical application diagram STM6520 4 Typical application diagram Figure 4 RST1 output used for microcontroller reset STM6520 DSR per SCHEI SR1 RST1 Reset Power on
10. nd the products and services described herein at any time without notice All ST products are sold pursuant to ST s terms and conditions of sale Purchasers are solely responsible for the choice selection and use of the ST products and services described herein and ST assumes no liability whatsoever relating to the choice selection or use of the ST products and services described herein No license express or implied by estoppel or otherwise to any intellectual property rights is granted under this document If any part of this document refers to any third party products or services it shall not be deemed a license grant by ST for the use of such third party products or services or any intellectual property contained therein or considered as a warranty covering the use in any manner whatsoever of such third party products or services or any intellectual property contained therein UNLESS OTHERWISE SET FORTH IN ST S TERMS AND CONDITIONS OF SALE ST DISCLAIMS ANY EXPRESS OR IMPLIED WARRANTY WITH RESPECT TO THE USE AND OR SALE OF ST PRODUCTS INCLUDING WITHOUT LIMITATION IMPLIED WARRANTIES OF MERCHANTABILITY FITNESS FOR A PARTICULAR PURPOSE AND THEIR EQUIVALENTS UNDER THE LAWS OF ANY JURISDICTION OR INFRINGEMENT OF ANY PATENT COPYRIGHT OR OTHER INTELLECTUAL PROPERTY RIGHT UNLESS EXPRESSLY APPROVED IN WRITING BY AN AUTHORIZED ST REPRESENTATIVE ST PRODUCTS ARE NOT RECOMMENDED AUTHORIZED OR WARRANTED FOR USE IN MILITARY AIR CRAFT SPACE LIF
11. on inputs which together ensures a safe reset and eliminates the need for a specific dedicated reset button This reset configuration provides versatility and allows the application to discriminate between a software generated interrupt and a hard system reset When the input push buttons are connected to microcontroller interrupt inputs and are closed for a short time the processor can only be interrupted If the system still does not respond properly continuing to keep the push buttons closed for the extended setup time tsrc causes a hard reset of the processor through the reset outputs The STM6520 has two combined delayed Smart Reset inputs SRO SR1 with two user selectable delayed Smart Reset setup time tsnc options of 7 5 s and 12 5 s typ selected by a dual state Smart Reset M DSR input pin When DSR is connected to ground tenc 7 5 s when connected to Vcc tsnc 12 5 s typ There are two reset outputs both going active simultaneously after both of the Smart Reset inputs were held active for the selected tsnc delay time The outputs remain asserted until either or both inputs go to inactive logic level for this device the output reset pulse duration is fully push button controlled meaning neither fixed nor minimum reset pulse width nor power on reset pulse is implemented The first reset output RST1 is active low open drain the second reset output RST2 is active high push pull The device fully operates over a b
12. road Vcc range 1 65 to 5 5 V Below 1 575 V typ the inputs are ignored and outputs are deasserted the deasserted reset output levels are then valid down to 1 0 V Figure 1 Logic diagram D SR1 d STM6520 V n AM00434 Figure 2 Pin connections Vcc SRO NC DSR AMO00435 Doc ID 15953 Rev 6 5 23 Device overview STM6520 2 Device overview Table 1 Signal names Symbol Input output Description RST1 Output First reset output active low open drain RST2 Output Second reset output active high push pull SRO Input Primary push button Smart Reset input Active low SR1 Input Secondary push button Smart Reset input Active low A dual state Smart Reset input delay selection pin When connected to ground tenc 7 5 s when connected to Vcc PER Input tenc 12 5 s typ DSR is a DC type input intended to be either permanently grounded or permanently connected to Voc Positive supply voltage for the device A 0 1 uF decoupling ceramic Vec Supply voltage capacitor is recommended to be connected between Vcc and Vss pins Vas Supply ground Ground NC No connect not bonded should be connected to Vas 6 23 Doc ID 15953 Rev 6 ky STM6520 Pin descriptions 3 3 1 3 2 3 3 3 4 3 5 Figure 3 Pin descriptions Power supply Vcc This pin is used to provide power to the Smart Reset device A 0 1 uF ceramic decoup
13. s 100 mm min No components cover tape TRAILER LEADER gt j4 160 mm min 400 mm min e Sealed with cover tape User direction of feed AM00444 Figure 16 Pin 1 orientation O O O 0 O 0 0 User direction of feed AM00442 Drawings are not to scale All dimensions are in mm unless otherwise noted Doc ID 15953 Rev 6 19 23 Ordering information STM6520 11 20 23 Ordering information Table 9 Ordering information scheme Example STM6520 A Q R R DG 9 F Device type STM6520 Reset Vcc monitoring threshold voltage Vast A no Vcc monitoring feature Smart Reset setup delay tsnc Q 7 5 or 12 5 s typ user selected two state input comparator on SRO SR1 no input pull ups Outputs type R RST1 active low open drain no pull up RST2 active high push pull Reset pulse timeout period tec R push button controlled no defined taec no power on reset Package DG TDFN8 2 x 2 x 0 75 mm 0 5 mm pitch Temperature range 9 30 C to 85 C Shipping method F ECOPACK package tape and reel For other options voltage threshold values etc or for more information on any aspect of this device please contact the ST sales office nearest you Doc ID 15953 Rev 6 a STM6520 Package marking information 12 Package marking information Table 10 Package marking Part number Package Topmark STM6520AQRRDG9F TDFN8 2 x 2
14. tact gap spacing 0 65 D Max land pattern X direction 1 75 Contact pitch 0 5 Doc ID 15953 Rev 6 ky STM6520 Tape and reel information 10 Tape and reel information Figure 13 Carrier tape Po 1 i Top cover tape WwW K Center lines 0 of cavity Py VE eas et EN a Sa i ao get ag a cr eg oe ats poh sd d aT IO Rs PU ea gt User direction of feed AMO03073v2 Table 7 Carrier tape dimensions Bulk Package W D E Po P2 F Ao Bo Ko P4 T Unit qty 8 00 1 50 1 75 4 00 2 00 3 50 2 30 2 30 1 00 4 00 0 250 TDFN8 0 30 0 10 510 0 10 0 10 0 05 0 05 0 05 0 05 0 10 0 05 3000 0 10 0 00 ky Doc ID 15953 Rev 6 17 23 Tape and reel information STM6520 18 23 Figure 14 Reel dimensions i 40 mm min acces hole at slot location C EH DEN EE EE E31 GE H N A Full radius Tape slot in core for i tape start 25 mm min width G measured at hub AMO00443 Table 8 Reel dimensions Tape sizes A max B min C D min N min G T max 8 mm 180 7 inches 1 50 13 0 0 20 20 20 60 8 4 2 0 14 40 Doc ID 15953 Rev 6 ky STM6520 Tape and reel information Note 1 a Figure 15 Tape trailer leader End Start Top No components Component
15. tive 3 5 HA Voc 5 0 V tgnc counter is active 4 7 HA Voc 2 4 5 V sinking 3 2 mA 0 3 V Vo Reset output voltage low Voc 2 3 3 V sinking 2 5 mA 0 3 V Voc 2 1 65 V sinking 1 mA 0 3 V Voc 2 4 5 V lsource 0 8 mA 0 8 Vcc V VOH GE Sutputyeliage nigh Iv e b EEN Lage tech 0 8 Voc V Voc 1 65 V Isource 0 25 mA 0 8 Voc V llo Output leakage current RST1 Open drain Vasti 5 5 V 0 1 0 1 pA Smart Reset DSR Vss 6 7 5 9 S tsrc Smart Reset delay DSR Vec e 25 TE P Vu SRO SRT input voltage low SCH 0 3 V Vu SRO SRT input voltage high 0 85 5 5 V lu uz Ge current SRO 4 1 UA pins Input glitch immunity Corresponds to the actual tenc tenc S 1 Valid for ambient operating temperature T4 30 to 85 C Voc 1 65 to 5 5 V except where noted 2 Typical value is at 25 C and Vcc 3 3 V unless otherwise noted 3 Reset outputs are deasserted below 1 575 V typ and remain deasserted down to Vcc 1 V 4 Input glitch immunity is equal to tsgc when both SR inputs are low otherwise infinite ST Doc ID 15953 Rev 6 13 23 Package mechanical data STM6520 8 14 23 Package mechanical data In order to meet environmental requirements ST offers these devices in different grades of ECOPACK packages depending on their level of environmental compliance ECOPACK specifications grade definitions and product status are available at www st com ECOPACK is an ST trademark Figure 11 TDFN 8 lead 2 x 2 mm pack
16. x 0 75 mm 0 5 mm pitch DRM STM6520AQRRDG9F TDFN8 2 x 2 x 0 75 mm 0 5 mm pitch ERM Figure 17 Package marking area top view Topmark A dot pin 1 reference B assembly plant P C assembly year Y 0 9 9 2009 etc D assembly work week WW 01 to 52 20 WW20 etc E marking area topmark AM00479 a Doc ID 15953 Rev 6 21 23 Revision history STM6520 13 Revision history Table 11 Document revision history Date Revision Changes 08 Jul 2009 1 Initial release Document reformatted updated Section 1 Description Table 1 Figure 4 Figure 5 Table 4 renamed Section 2 20 Oct2009 2 Device overview added Section 5 Typical operating characteristics updated supply voltage range in Table 4 20 Jan 2010 3 Updated Section 1 Description Table 1 06 May 2010 4 Updated title Features Applications Table 5 Replaced smart reset by Smart Reset updated 31 May 2010 5 Applications Section 1 Section 3 1 Section 3 5 Figure 4 Figure 5 Table 2 Table 4 Table 6 and Table 10 06 Jan 201 1 6 Updated Icc supply voltage in Table 4 a 22 23 Doc ID 15953 Rev 6 STM6520 Please Read Carefully Information in this document is provided solely in connection with ST products STMicroelectronics NV and its subsidiaries ST reserve the right to make changes corrections modifications or improvements to this document a
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