ST B5973D handbook
Contents
1. 571 B5973D 2 A step down switching regulator for automotive applications Features Qualified following the AEC Q100 requirements temperature Grade 1 see PPAP for more details 2 A DC output current Operating input voltage from 4 V to 36 V 3 3 V 2 reference voltage Output voltage adjustable from 1 235 V to 35 V Low dropout operation 100 duty cycle 250 kHz internally fixed frequency Voltage feedforward Zero load current operation Internal current limiting Inhibit for zero current consumption Synchronization Protection against feedback disconnection Thermal shutdown Applications m Dedicated to automotive applications Figure 1 Typical application HSOP8 exposed pad Description The B5973D is a step down monolithic power switching regulator with a minimum switch current limit of 2 25 A so it is able to deliver up to 2 A DC current to the load depending on the application conditions The output voltage can be set from 1 235 V to 35 V The high current level is also achieved thanks to an SO8 package with exposed frame that allows to reduce the Risa down to approximately 40 C W The device uses an internal P channel DMOS transistor with a typical Rpson of 250 mQ as switching element to minimize the size of the external components An internal oscillator fixes the switching frequency at 250 kHz Having a minimum input voltage of 4V only it is particularly suitable for 5 V bus Pulse2. Package mechanical data B5973D Table 5 HSOP8 mechanical data mm inch Dim Min Typ Max Min Typ Max A 1 70 0 0669 Al 0 00 0 10 0 00 0 0039 A2 1 25 0 0492 b 0 31 0 51 0 0122 0 0201 0 17 0 25 0 0067 0 0098 D 4 80 4 90 5 00 0 1890 0 1929 0 1969 D1 3 3 1 3 2 0 118 0 122 0 126 E 5 80 6 00 6 20 0 2283 0 2441 El 3 80 3 90 4 00 0 1496 0 1575 E2 2 31 2 41 2 51 0 091 0 095 0 099 e 1 27 h 0 25 0 50 0 0098 0 0197 L 0 40 1 27 0 0157 0 0500 k 0 min 8 max ccc 0 10 0 0039 Figure 12 Package dimensions Exposed Pad A D1 3 1mm al A2 E2 2 41mm S a A I o La E Ta a i eee D EA jga e E LE SEATING e PLANE E o oo j N N WE T A et S ZA 7195016 9 11 ky B5973D 6 Revision history Table 6 Document revision history Date Revision Changes 07 Nov 2007 1 Initial release 14 Jan 2008 2 Updated Table 5 on page 9 27 Aug 2008 3 Updated Coverpage and Table 4 on page 4 10 11 B5973D Please Read Carefully Information in this document is provided solely in connection with ST products STMicroelectronics NV and its subsidiaries ST reserve the right to make changes corrections modifications or improvements to this document and the products and services described herein at any time without notice All ST products are sold pursuant to ST s terms and conditions of sale Purchasers are solely responsible for the choice selection and use o
3. 120 129 rs 110 Vin 12V Vo 5V Wa Vin 5V Vo 3 3V Vo 2 5Y 100 i 1 vosav 90 8 E Vo 2 5V Set Vo 1 8v 70 60 E TIET 50 A o 40 E 30 H 30 207 4 20 1 0 2 0 4 0 6 0 8 1 1 2 1 4 1 6 1 8 2 2 2 2 4 2 6 0 2 04 06 08 1 12 14 16 18 2 22 24 26 lo A lo A Figure 10 Efficiency vs output current Figure 11 Efficiency vs output current 95 91 93 89 a 87 85 Se ze SC 81 E 81 579 E 79 S ii 77 75 75 73 73 71 mo 69 69 67 67 65 0 1 0 3 05 0 7 09 14 13 15 17 19 21 23 0 1 03 05 0 7 09 1 1 13 1 5 1 7 19 21 23 lo A lo A 7111 d B5973D 5 Package mechanical data In order to meet environmental requirements ST offers these devices in ECOPACKO packages These packages have a lead free second level interconnect The category of second level interconnect is marked on the package and on the inner box label in compliance with JEDEC Standard JESD97 The maximum ratings related to soldering conditions are also marked on the inner box label ECOPACK is an ST trademark ECOPACK specifications are available at www st com 8 11
4. 5 11 1 With Ty 85 C lim min 2 5 A assured by design characterization and statistical correlation 2 Guarantee by design d B5973D 4 4 Typical characteristics Figure 3 Line regulation Figure 4 Shutdown current vs junction temperature Vo V Ishd WA 3 312 70 3 308 Vcc 12V 3 30442 7 32V 60 3 3 Vee 12V 3 296 3 2921 50 GN A O eg GE a E 3 288 3 284 40 3 28 3 2761 30 0 10 20 30 40 vcc V 50 0 50 100 150 Tj CC Figure 5 Output voltage vs junction Figure 6 Switching frequency vs temperature junction temperature Vo V 1 25 Fsw KHz 260 1 24 D E S 250 1 23 240 1 22 Veo 12V 230 Vee 12V 1 21 Vo 3 3V 1 2 220 50 0 50 100 150 S o 109 ES o Tj C Tj CC Figure 7 Quiescent current vs junction temperature Vee 12V DC 0 50 0 50 100 150 Tj C 6 11 Typical characteristics B5973D Figure 8 Junction temperature vs Figure 9 Junction temperature vs output current output current Fre ro ICO
5. by pulse current limit with the internal frequency modulation offers an effective constant current short circuit protection Pulse by pulse current limit with the internal frequency modulation offers an effective constant current short circuit protection VIN 4V to 35V B5973D c1 10uF 35V ma CERAMIC L1 15uH Vout 3 3V Di STPS340U August 2008 Rev 3 1 11 www st com B5973D Contents Contents 1 E due CEET 2 1 1 Pin connection o 2 1 2 Pin description ois eek ck ae be Siete CARA YER STO REDEE ee 2 2 LECHEN WEE 3 2 1 Maximum Kl e CEET 3 2 2 Thermal data sic AN ENKEN cata ea ew ieee baa ew a Aa as 3 3 Electrical characteristics 4 4 Typical characteristics 22 006 NNN NEEN NNN EE eee eee ees 6 5 Package mechanical data 8 6 REVISION history 00000 a cee ee a ee Ne KE E ENN 10 ky 1 11 B5973D 1 1 1 2 Pin settings Pin connection Figure 2 Pin connection top view OUT VCC SYNC GND INH VREF COMP FB D98IN955 Pin description Table 1 Pin description N Pin Description 1 OUT Regulator output 2 SYNCH Master slave synchronization A logical signal active high disables the device If INH not used the pin 3 INH must be grounded When it is open an internal pull up disable the device 4 COMP E A output for frequency compensation Feedback input Connecting directly to this pin results in an output 5 FB voltage of 1 23 V
6. AUTOMOTIVE GRADE MAY ONLY BE USED IN AUTOMOTIVE APPLICATIONS AT USER S OWN RISK Resale of ST products with provisions different from the statements and or technical features set forth in this document shall immediately void any warranty granted by ST for the ST product or service described herein and shall not create or extend in any manner whatsoever any liability of ST ST and the ST logo are trademarks or registered trademarks of ST in various countries Information in this document supersedes and replaces all information previously supplied The ST logo is a registered trademark of STMicroelectronics All other names are the property of their respective owners O 2008 STMicroelectronics All rights reserved STMicroelectronics group of companies Australia Belgium Brazil Canada China Czech Republic Finland France Germany Hong Kong India Israel Italy Japan Malaysia Malta Morocco Singapore Spain Sweden Switzerland United Kingdom United States of America www st com d 11 11
7. An extenal resistive divider is required for higher output voltages 6 VREF 3 3 V VREF No cap is requested for stability 7 GND Ground 8 VCC Unregulated DC input voltage 2 11 Electrical data B5973D 2 2 1 2 2 3 11 Electrical data Maximum ratings Table 2 Absolute maximum ratings Symbol Parameter Value Unit Vg Input voltage 40 V V OUT pin DC voltage 1 to 40 V OUT pin peak voltage at At 0 1us 5 to 40 V ly Maximum output current int limit V4 V5 Analog pins 4 V V3 INH 0 3 to Voc V Vo SYNCH 0 3 to 4 V Prot Power dissipation at Ta lt 70 C 2 25 W Ti Operating junction temperature range 40 to 150 C TsTG Storage temperature range 55 to 150 C Thermal data Table 3 Thermal data Symbol Parameter SOS Unit RthuA Maximum thermal resistance junction ambient 40 1 C W 1 Package mounted on board B5973D 3 4 Electrical characteristics Table 4 Electrical characteristics Ty 40 C to 125 C Vec 12 V unless otherwise specified Symbol Parameter Test condition Min Typ Max Unit Vcc al AEN Vo 1 235 V lo 2 A 4 36 v RDS on E 0 250 05 o I e limiting Vec 5V 2 25 3 3 5 A current Vcc 5 V Ty 25 C 2 5 3 3 5 fsw Switching frequency 212 250 280 kHz Duty cycle 0 100 Dynamic chara
8. cteristics see test circuit Vs Voltage feedback GE EE v 1 198 1 235 1 272 V n Efficiency Vo 5 V Vec 12V 90 DC characteristics lee quiescent current 3 5 ma la Quiescent current Duty cycle 0 Veg 1 5 V 2 5 mA Vinn gt 2 2 V 50 100 pA Iqst by Meets a Vcc 36 V Vo gt 2 2 V 80 150 pA Inhibit Device ON 0 8 V INH threshold voltage Device OFF 2 2 Error amplifier Vo Sg output Vee 1V 3 5 V VoL SE GE Output Vee 1 5V 04 v lo source Source output current Vcomp 1 9 V Veg 1 V 190 300 pA lo sink Sink output current Vcomp 1 9 V Veg 1 5 V 1 1 5 mA lb Source bias current 2 5 4 uA DC open loop gain RL 00 50 65 dB 4 11 Electrical characteristics B5973D Table 4 Electrical characteristics Ty 40 C to 125 C Ver 12 V unless otherwise specified Symbol Parameter Test condition Min Typ Max Unit 0 1 mA to 0 1 mA gm Transconductance COMP 2 3 mS Synch function High input voltage Vcc 4 4 to 36 V 2 5 Vrer V Low input voltage Voc 4 4 to 36 V 0 74 V 2 11 2 Slave synch current Vsynch 0 74 V A Ges I A Vsynch 233V 0 21 0 45 Master output lsource 3 MA 275 3 Vv amplitude Output pulse width no load Veynch 1 65 V 0 20 0 35 us Reference section IREF 0 to 5 mA Reference voltage 3 2 3 3 3 399 V Voc 4 4 V to 36 V 0mA Line regulation REF 5 10 mV Voc 4 4Vto 36 V Load regulation Inef 0 mA 8 15 mV Short circuit current 5 18 35 mA
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ST B5973D handbook