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ST STG3682 Low voltage high bandwidth dual SPDT switch handbook

1. AYI STG3682 Low voltage high bandwidth dual SPDT switch Features m Ultra low power dissipation lec 0 2uA Max at Ta 85 C m Low ON resistance Ron 4 60 Ta 25 C at Voc 4 3V Ron 5 8Q Ta 25 C at Voc 3 0V m Wide operating voltage range Voc Opr 1 65V to 4 3V single supply m 4 3Vtolerant and 1 8V compatible threshold on digital control input at Voc 2 3V to 3 0V m Typical bandwidth 3dB at 800MHz on all channels m Latch up performance exceeds 100mA per JESD 78 Class Il m ESD performance exceeds JESD22 2000 V Human body model A114 A m USB 2 0 High speed 480Mbps signal switching compliant Table 1 Device summary QFN10 1 8mm x 1 4mm Description The STG3682 is a high speed CMOS low voltage dual analog S P D T Single Pole Dual Throw Switch or 2 1 Multiplexer Demultiplexer Switch fabricated in silicon gate C MOS technology It is designed to operate from 1 65V to 4 3V making this device ideal for portable applications The nSEL inputs are provided to control the switch The switch S1 is ON they are connected to common Ports Dn when the nSEL input is held high and OFF high impedance state exists between the two ports when SEL is held low the switch S2 is ON it is connected to common Port D when the nSEL input is held low and OFF high impedance state exists between the two ports when nSEL is held high Additional key features are fas
2. 00 0 50 C LE STG3682 Package mechanical data d Figure 16 QFN10L 1 8mm x 1 4mm reel information XXX REPRESENTS SUPPLIER S LOGO OR NAME OPTION TEXT HEIGHT 6 25mm HIGH X 1 6mm WIDE EMBOSSED LETTERS SEE DETAIL B SLOT 180 FRONT SIDE APART 2 PLACES lA SEE DETAIL C o a o H Bo lt 0 055 a t Ee o T ua e H ol 179 st 5 00 REF 5 00 REF E 010 00 REF is 620 2 MIN EX 2 00 REF TEXT HEICHT DETAIL C DETAIL B 17 19 Revision history STG3682 7 18 19 Revision history Table 11 Revision history Date Revision Changes 08 Jan 2007 1 First release 03 Jul 2007 2 Updated Con Corr Table 8 on page 9 STG3682 Please Read Carefully Information in this document is provided solely in connection with ST products STMicroelectronics NV and its subsidiaries ST reserve the right to make changes corrections modifications or improvements to this document and the products and services described herein at any time without notice All ST products are sold pursuant to ST s terms and conditions of sale Purchasers are solely responsible for the choice selection and use of the ST products and services described herein and ST assumes no liability whatsoever relating to the choice selection or use of the ST products and services described herein No lic
3. 55 0 051 0 059 e 0 40 0 015 L 0 40 0 30 0 50 0 015 0 011 0 020 Figure 12 Package dimension BOTTOM VIEW 0 15 PIN 1 ID g Q7 n a LI tC op m L d d 2 S 7 SS 6 kt A W 3 L 10x ES Fk 5 4 b 10x e 2 mi la LAO MC i AS A i L LO SEATING PLANE A m Y 20 08 C LEADS COPLANARITY 5 4 i 6 3 vA 2 i E 3 1 E 2 aa 9 10 a D 2 PIN 1 ID D TOP VIEW 14 19 d STG3682 Package mechanical data Figure 13 QFN10L 1 8mm x 1 4mm foot print recommendation 1 90 0 95 i 0 50 5 4 y l ZA i 0 50 10 075 p L j I 0 40 1 50 L _ _ 5 8 7 alas j 9 10 die 0 25 9x 0 20 0 40 Figure 14 QFN10L 1 8mm x 1 4mm carrier type KO R_0 1 Ref AO Gn T 7 21 MIN COVER AO 1 70 10 10 dd BO 2 10 0 10 KO 0 70 0 10 15 19 Package mechanical data STG3682 16 19 Figure 15 QFN10L 1 8mm x 1 4mm reel information R 10 65 E Pig R 5 20 T zo BACK VIEW 951 20 0 30 EMBOSSED RIBS 164 50 0 30 RAISED 0 25mm WIDIH 1 25mm e 179 00 0 50 o _ O e Cn e Y T T T I A B x 5 Ei id E Or SIA li a 179
4. 8 23 torr y ns time 3 0 3 3 Vs 1 5V 11 14 18 3 6 4 3 10 13 17 1 65 1 95 1 7 Break 2 3 2 7 G A 1 5 to before make R 500 ns time delay 3 0 3 3 Vg 1 5V i ki 3 6 4 3 1 3 1 65 2 8 C 100pF Charge 2 3 E I a 3 5 Q injection 3 0 Vaen OV 3 8 is Reen 00 i 4 3 5 0 8 19 ki STG3682 Electrical characteristics Table 8 Analog switch characteristics C 5pF Ry 500 Ta 25 C Test conditions Value Symbol Parameter Ta 25 C 40 to 85 C Unit Vcc V Min Typ Max Min Max Vg 1Vams f 1MHz j 79 Signal 0 dBm OIRR OFF Isolation 1 65 4 8 JB Vs iVnys f 10MHz 60 Signal 0 dBm Vs iVnys f 1MHz 78 Signal 0 dBm Xtalk Crosstalk 1 65 4 3 dB Vg 1Vams f 10MHz 61 Signal 0 dBm R 500 BW 3dB bandwidth 3 0 4 3 800 MHz Signal 0dBm Da Differential gain 3 0 4 3 RL 2 1500 0 64 Dp Differential phase 3 0 4 3 RL 1509 0 1 deg Control pin input C Vcc OV IN capacitance cc 0 Ges Sn Port Con capacitance when 3 3 f 1MHz 12 F switch is enabled S Sn Port Corr capacitance when 3 3 f 1MHz 5 switch is disabled 1 Off Isolation 20Log10 Vp Vs Vp output Vg input to off switch Table 9 USB related AC electrical characteristics Test conditions Value Symbol Parameter Ta 25 C 40 to 85 C Unit Vcc V gt Min Typ Max Min M
5. FF state leakage 0 4V lorF c rreni 4 3 Vs 0 3 or 20 100 nA SN D 6 19 ky STG3682 Electrical characteristics Table 6 DC specifications Test conditions Value Symbol Parameter Ty 25 C 40 to 85 C Unit Vcc V Min Typ Max Min Max Input lin leakage Oto 4 3 Veg Oto 4 3V 0 1 1 uA current Quiescent lcc supply 1 65 to 4 3 VsEL Vcc or GND 0 1 1 0 uA current V4 2SEL 37 50 100 Quiescent V3 4se 1 65V supply V lectv current low 4 3 Naa 1 80V 33 40 50 uA voltage PASEL driving V4 2SEL Were 2 60V 11 20 30 1 Note 1 ARon max ImSN nSNI where m 1 4 and n 1 4 N 1 2 2 Flatness is defined as the difference between the maximum and minimum value of on resistance as measured over the specified analog signal ranges d 7 19 Electrical characteristics STG3682 Table 7 AC electrical characteristics C 35pF RL 500 t t 5ns Test conditions Value Symbol Parameter TA 25 C 40 to 85 C Unit Vcc V Min Typ Max Min Max 1 65 1 95 0 30 le t Propagation 2 3 2 7 0 30 h delay 3 0 3 3 0 25 3 6 4 3 0 25 1 65 1 95 Vg 0 8V 31 Turn ON 2 3 2 7 20 26 34 ton l ns time 3 0 3 3 Vg 1 5V 15 20 26 3 6 4 3 12 15 20 1 65 1 95 Vs 0 8 22 Turn OFF 2 3 2 7 14 1
6. ax tsk o Channel to channel skew 3 0 to 3 6 C 10pF 26 ps Skew of opposite transition t SKP of the same output 301098 SARE BR ES RL 500 10pF Tj Total jitter 301545 Me THP 130 ps tn tr 750ps at 480Mbps IST 9 19 Test circuits STG3682 5 Test circuits Figure 3 ON resistance Figure 4 Bandwidth gus Voc CD l m W S1 D Vee Vour S gt 500 st ae 1 1 ai gi A V IN i S GND Do A A INI li E GND ND CS00370 Figure 5 OFF leakage Figure 6 Channel to channel crosstalk Vee Vcc lstor pou si D YAN V lt A A OUT a NOU ti Ve Um Ne _ i a sa o a IN GND E Vs aie oe GND CS14080 GND Figure 7 OFF isolation Vee EA D y 500 32 i Vs Oy Cs00380 10 19 STG3682 Test circuits Figure 8 Test circuit PULSE GENERATOR SC08630 Note 1 C 5 35pF or equivalent includes jig capacitance 2 H 500 or equivalent 3 R7 Zour of pulse generator typically 500 11 19 Test circuits STG3682 Figure 9 Break before make time delay Vec S1 D Vs O 52 gt IN Do C L vw Kos CS14120 CS14140 Figure 10 Switching time and c
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8. harge injection VGEN OV RGEN 00 RL 1MQ C 100pF Veo GND Vout Q AV our xC csos710 CS14130 Figure 11 Turn ON turn OFF delay time Voc Si D Sm RL CL IN Do O e L Vin GND CS 08720 CS14150 12 19 KII STG3682 Package mechanical data 6 Package mechanical data In order to meet environmental requirements ST offers these devices in ECOPACK amp packages These packages have a Lead free second level interconnect The category of second level interconnect is marked on the package and on the inner box label in compliance with JEDEC Standard JESD97 The maximum ratings related to soldering conditions are also marked on the inner box label ECOPACK is an ST trademark ECOPACK specifications are available at www st com ky 13 19 Package mechanical data STG3682 Table 10 QFN10L 1 8x1 4 Mechical data A mm inch ref Nom Min Max Nom Min Max A 0 50 0 45 0 55 0 020 0 017 0 021 A1 0 02 0 0 05 0 001 0 0 002 A3 0 127 0 005 0 0 b 0 20 0 15 0 25 0 007 0 006 0 010 D 1 80 1 70 1 90 0 070 0 066 0 074 E 1 40 1 30 1 50 0 0
9. ice summary Figure 2 Input equivalent circuit D e S2 e si SEL b o po LC13780 Table 3 Truth table SEL Switch S1 Switch S2 H ON OFF 1 L OFF 1 ON 1 High impedance STG3682 Maximum rating 3 Maximum rating Stressing the device above the rating listed in the Absolute Maximum Ratings table may cause permanent damage to the device These are stress ratings only and operation of the device at these or any other conditions above those indicated in the Operating sections of this specification is not implied Exposure to Absolute Maximum Rating conditions for extended periods may affect device reliability Refer also to the STMicroelectronics SURE Program and other relevant quality documents Table 4 Absolute maximum ratings Symbol Parameter Value Unit Vcc Supply voltage 0 5 to 5 5 V VI DC input voltage 0 5 to Vcc 0 5 V Vic DC control input voltage 0 5 to 5 5 V Vo DC output voltage 0 5 to Vcc 0 5 V lic DC input diode current on control pin Vsg lt 0V 50 mA lik DC input diode current Vsg OV 50 mA lok DC output diode current 20 mA lo DC output current 128 mA lop DC output current peak pulse at 1ms 1096 duty cycle 300 mA loc or DC Vec or ground current 100 mA lenp Pp Power dissipation at Ta 70 C 1 1120 mW Tag Storage temperature 65 to 150 C TL Lead te
10. mperature 10 sec 300 C 1 Derate above 70 C by 18 5mW C 3 1 Recommended operating conditions Table 5 Recommended operating conditions Symbol Parameter Value Unit Vcc Supply voltage 1 65 to 4 3 V VI Input voltage 0 to Voc V Vic Control input voltage 0 to 4 3 V Vo Output voltage 0 to Voc V Top Operating temperature 40 to 85 C dua Input rise and fall time control Ves Sr 0 to 20 ns V input Voc 3 0 to 4 3V 0 to 10 1 Truth Table guaranteed 1 2V to 4 3V KIT 5 19 Electrical characteristics STG3682 4 Electrical characteristics Table 6 DC specifications Test conditions Value Symbol Parameter Ta 25 C 40 to 85 C Unit Vcc V Min Typ Max Min Max 1 65 1 95 0 65Vcc 0 65Vcc 2 3 2 5 12 12 High level Vin input E 2 7 3 0 1 3 1 3 V 3 3 3 6 1 4 1 4 4 3 1 6 1 6 1 65 1 95 0 25 2 3 2 5 0 25 Vi Per 2 7 3 0 0 25 V input voltage 3 3 3 6 0 30 4 3 0 40 1 8 12 0 16 0 A 2 7 6 3 8 0 Switch ON Vs OV to Voc RpeaK peak 3 0 5 8 7 5 Q 3 ls 8mA resistance 37 5 0 6 5 4 3 4 6 6 0 Switch On 3 0 Vs 3V la 8mA 4 0 5 2 Ron Q resistance 3 0 Vs 0 8V lg 8mA 5 0 65 1 8 ON i 2 7 resistance Vs Ron Max ARon match 3 0 i S 8 A 0 3 Q between sum 3 7 channels 1 4 3 1 8 6 6 2 7 2 0 ON Vs OV to Vec Dar resistance 3 0 ea 1 7 Q flatness 2 37 E 15 4 3 1 6 O
11. n this document shall immediately void any warranty granted by ST for the ST product or service described herein and shall not create or extend in any manner whatsoever any liability of ST ST and the ST logo are trademarks or registered trademarks of ST in various countries Information in this document supersedes and replaces all information previously supplied The ST logo is a registered trademark of STMicroelectronics All other names are the property of their respective owners O 2007 STMicroelectronics All rights reserved STMicroelectronics group of companies Australia Belgium Brazil Canada China Czech Republic Finland France Germany Hong Kong India Israel Italy Japan Malaysia Malta Morocco Singapore Spain Sweden Switzerland United Kingdom United States of America www st com 19 19 d
12. t switching speed Break Before Make Delay Time and Ultra Low Power Consumption All inputs and outputs are equipped with protection circuits against static discharge giving them ESD immunity and transient excess voltage Order code STG3682QTR Package QFN10 1 8mm x 1 4mm Packaging Tape and reel July 2007 Rev 2 1 19 www st com Contents STG3682 Contents 1 Pin setings ad a aaa Riu OR i oii i i a EA 3 1 1 Pin connection 3 1 2 Pin description AN ss xn E eg ENN R KR NEEN RR RE ee ne 3 2 DEVICE Summary escoria rr A CR CA Ra n 4 3 Maximum rating ANNE s s x RR OO Cc C CC RR Gc el a 5 3 1 Recommended operating conditions eee eee er nnon 5 4 Electrical characteristics nn nn n nn nannan non n non 6 5 TestclicullS 9 ees N a EE EE RR Bt KK ERER EN 10 6 Package mechanical data 000 13 7 Revision history uus ii RA ARA 18 2 19 kI STG3682 Pin settings 1 Pin settings 1 1 Pin connection Figure 1 Pin connection top through view 1 2 Pin description Table 2 Pin description Pin N Symbol Name and function 1 3 6 8 181 1S2 281 282 Independent channels 2 7 D1 D2 Common channels 10 4 SEL1 SEL2 Control 9 VCC Possitive supply voltage 5 GND Ground 0V Note Exposed pad must be soldered to a floating plane Do NOT connect to power or ground 3 19 Device summary STG3682 2 4 19 Dev

ST STG3682 Low voltage high bandwidth dual SPDT switch handbook

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