ST 74LVC244A handbook
Contents
1. P 11 9 12 1 0 468 0 476 N C 1 1 A A A aE Po Bo vuo Le Oe FG l A j Ko AO P alli ini ei Note Drawing not in scale 9 12 74LVC244A Tape amp Reel TSSOP20 MECHANICAL DATA P 11 9 12 1 0 468 0 476 N iC Y 1 A i i PRA Po Bo V EO Os E l l Ko LAO Lok Note Drawing not in scale 10 12 ky Table 11 Revision History 74LVC244A Date Revision Description of Changes 26 Jul 2004 5 Ordering Codes Revision pag 1 11 12 74LVC244A Information furnished is believed to be accurate and reliable However STMicroelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics Specifications mentioned in this publication are subject to change without notice This publication supersedes and replaces all information previously supplied STMicroelectronics products are not authorized for use as critical components in life support devices or systems without express written approval of STMicr2. SZA 74LVC244A LOW VOLTAGE CMOS QUAD BUS BUFFERS 3 STATE HIGH PERFORMANCE 5V TOLERANT INPUTS HIGH SPEED tpp 5 9ns MAX at Voc 3V m POWER DOWN PROTECTION ON INPUTS AND OUTPUTS m SYMMETRICAL OUTPUT IMPEDANCE IloHl loL 24mA MIN at Vec 3V PCI BUS LEVELS GUARANTEED AT 24 mA BALANCED PROPAGATION DELAYS tpLH PHL a OPERATING VOLTAGE RANGE Vcc OPR 1 65V to 3 6V 1 2V Data Retention m PIN AND FUNCTION COMPATIBLE WITH 74 SERIES 244 m LATCH UP PERFORMANCE EXCEEDS 500mA JESD 17 m ESD PERFORMANCE HBM gt 2000V MIL STD 883 method 3015 MM gt 200V DESCRIPTION The 74LVC244A is a low voltage CMOS OCTAL BUS BUFFER 3 STATE fabricated with sub micron silicon gate and double layer metal wiring CMOS technology It is ideal for 1 65 to 3 6 Vcc operations and low power and low noise applications Figure 1 Pin Connection And IEC Logic Symbols PC11010 July 2004 Table 1 Order Codes PACKAGE T amp R 7ALVOZAAANTA TSSOP 74LVC244ATTR It can be interfaced to 5V signal environment for inputs in mixed 3 3 5V system G control output governs four BUS BUFFERs This device is designed to be used with 3 state memory address drivers etc It has more speed performance at 3 3V than 5V AC ACT family combined with a lower power consumption All inputs and outputs are equipped with protection circuits against static discharge giving them 2KV
3. ESD immunity and transient excess voltage 1 12 74LVC244A Figure 2 Input And Output Equivalent Circuit OUTPUT O SC13540 Table 2 Pin Description Table 3 Truth Table PIN N SYMBOL NAME AND FUNCTION INPUTS OUTPUT 1 1G Output Enable Input G An Yn 2 4 6 8 1A1 to 1A4 Data Inputs L L L 9 7 5 3 2Y1 to 2Y4 Data Outputs L H H 11 be 15 2A1 to 2A4 Data Inputs H X Z 18 16 14 1Y1 to 1Y4 Data Outputs X Don t care 12 Z High Impedance 19 2G Output Enable Input 10 GND Ground 0V 20 Vec Positive Supply Voltage Table 4 Absolute Maximum Ratings Symbol Parameter Value Unit Voc Supply Voltage 0 5 to 7 0 V VI DC Input Voltage 0 5 to 7 0 V Vo DC Output Voltage High Impedance or Vcc OV 0 5 to 7 0 V Vo DC Output Voltage High or Low State note 1 0 5 to Vcc 0 5 V lik DC Input Diode Current 50 mA lok DC Output Diode Current note 2 50 mA lo DC Output Current 50 mA Icc or lenp DC Vec or Ground Current per Supply Pin 100 mA Tstg Storage Temperature 65 to 150 C TL Lead Temperature 10 sec 300 C Absolute Maximum Ratings are those values beyond which damage to the device may occur Functional operation under these conditions is not implied 1 lo absolute maximum rating must be observed 2 Vo lt GND 2 2 12 74LVC244A Table 5 Recomme
4. lo 8 mA 0 7 0 7 V 2 7 lo 12 mA 0 4 0 4 3 0 lo 24 mA 0 55 0 55 I Input Leakage Current 3 6 V 0 to 5 5V HA lof Power Off Leakage _ Curent 0 Vj or Vo 5 5V 10 10 uA loz High Impedance 3 6 Vi Viy or Vip uA Output Leakage Vo 0 to 5 5V Current lcc Quiescent Supply Vi Vcc or GND 10 10 Current 3 6 V A or Vo 3 6 to H 5 5V sil ENO Alec lec incr per Input 2 7 to 3 6 Vin Voc 0 6V 500 500 uA ky 3 12 74LVC244A Table 7 Dynamic Switching Characteristics Test Condition Value Ty 25 C i Symbol Parameter Voc A Unit v Min Typ Max VoLP Dynamic Low Level Quiet C 50pF 0 8 Voy Output note 1 33 Vine OV ig 3 3V 08 x 1 Number of output defined as n Measured with n 1 outputs switching from HIGH to LOW or LOW to HIGH The remaining output is measured in the LOW state Table 8 AC Electrical Characteristics Test Condition Value Symbol Parameter Voc CL Re t t 40 to 85 C 55 to 125 C Unit v PF 2 ns Min Max Min Max tpLH tp4ur Propagation Delay 1 65t0 1 95 30 1000 2 0 9 0 12 Time 2 3 to 2 7 30 500 2 0 7 9 10 5 Pi 2 7 50 500 2 5 1 5 6 9 8 3 3 0 to 3 6 50 500 2 5 1 5 9 7 1 tpzL tpz4 Output Enable Time 1 65 to 1 95 30 1000 2 0 11 14 3 2 3 to 2 7 30 500 2 0 9 6 12 5 RE 2 7 50 500 2 5 1 8 6 10 3 3 0 to 3 6 50 500 2 5 1 7 6 9 1 tpLztpp
5. 6V Vin Voc Voc 2 7V 2 7V VM Voc 2 Voc 2 1 5V 1 5V VoH Voc Voc 3 0V 3 0V Vx VoL 0 15V Voc 0 15V VoL 0 3V VoL 0 3V Vy Vou 0 15V Von 0 15V Vou 0 3V Von 0 3V t t lt 2 0ns lt 2 0ns lt 2 5ns lt 2 5ns Figure 4 Waveform Propagation Delays f 1MHz 50 duty cycle 2 CS01790 74LVC244A Figure 5 Waveform Output Enable And Disable Time f 1MHz 50 duty cycle tpz gt 1Yn 2Yn CS01780 6 12 ky 74LVC244A SO 20 MECHANICAL DATA ddd 0 100 0 004 hx45 o i i al U DA A SN J La C B i ddd SEATING 20 1 PLANE l 0 25 mm GAGE PLANE PIN 1 IDENTIFICATION 0016022D 7 12 74LVC244A TSSOP20 MECHANICAL DATA 0 173 0 0256 BSC 8 0 8 L 0 45 0 60 0 75 0 018 0 024 0 030 PIN 1 IDENTIFICATION 0087225C 2 8 12 74LVC244A Tape amp Reel SO 20 MECHANICAL DATA
6. nded Operating Conditions Symbol Parameter Value Unit Voc Supply Voltage note 1 1 65 to 3 6 V VI Input Voltage 0 to 5 5 V Vo Output Voltage High Impedance or Vcc OV 0 to 5 5 V Vo Output Voltage High or Low State 0 to Vec V lo lor High or Low Level Output Current Vcc 3 0 to 3 6V 24 mA lou lo High or Low Level Output Current Vgc 2 7 to 3 0V 12 mA lon lor High or Low Level Output Current Vec 2 3 to 2 7V 8 mA lon lot High or Low Level Output Current Vcc 1 65 to 2 3V 4 mA Top Operating Temperature 55 to 125 C dt dv Input Rise and Fall Time note 2 0 to 10 ns V 1 Truth Table guaranteed 1 2V to 3 6V 2 Vin from 0 8V to 2V at Voc 3 0V Table 6 DC Specifications Test Condition Value Symbol Parameter Voc 40 to 85 C 55 to 125 C Unit v Min Max Min Max Vin High Level Input 1 65 to 1 95 0 65Vcc 0 65Vcc Voltage 2 3 to 2 7 1 7 17 v 2 7 to 3 6 2 2 Vir Low Level Input 1 65 to 1 95 0 35Vcoc 0 35Voc Voltage 2 3 to 2 7 0 7 0 7 v 2 7 to 3 6 0 8 0 8 Von High Level Output 1 65 to 3 6 lo 100uA Vcc 0 2 Vcc 0 2 Voltage 1 65 lo 4 mA 1 2 1 2 2 3 lo 8 mA 1 7 1 7 2 7 lo 12 mA 2 2 2 2 3 0 lo 18 mA 2 4 2 4 3 0 lo 24 mA 2 2 2 2 VoL Low Level Output 1 65 to 3 6 lo 100 uA 0 2 0 2 Voltage 1 65 lo 4 mA 0 45 0 45 2 3
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8. z Output Disable Time 1 65 to 1 95 30 1000 2 0 9 0 11 7 2 3 to 2 7 30 500 2 0 7 8 10 1 se 2 7 50 500 2 5 2 6 8 8 2 3 0 to 3 6 50 500 2 5 2 6 5 7 8 tost4 Output To Output 2 7 to 3 6 1 1 ns tosHL z Time note1 1 Skew is defined as the absolute value of the difference between the actual propagation delay for any two outputs of the same device switch ing in the same direction either HIGH or LOW tosLH tPLHm tPLHnl tosHL tPHLm 7 tPHLnl 2 Parameter guaranteed by design Table 9 Capacitive Characteristics Test Condition Value Symbol Parameter Vec Ta 25 C Unit V Min Typ Max Cin Input Capacitance 4 pF Cpp Power Dissipation Capacitance 1 8 fin 10MHz 28 note 1 2 5 30 pF 3 3 34 1 Cpp is defined as the value of the IC s internal equivalent capacitance which is calculated from the operating current consumption without load Refer to Test Circuit Average operating current can be obtained by the following equation lcc opr Cpp X Voc X fin loo n per circuit 2 4 12 74LVC244A Figure 3 Test Circuit PULSE GENERATOR S01770 R7 Zour of pulse generator typically 500 Table 10 Test Circuit And Waveform Symbol Value Vcc Symbol 1 65 to 1 95V 2 3 to 2 7V 2 7V 3 0 to 3 6V CL 30pF 30pF 50pF 50pF RL R 10002 5000 5000 5000 Vs 2x Voc 2x Voc 6V
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ST 74LVC244A handbook