ST 74V1G07 handbook
Contents
1. 6 7 74V1G07 Information furnished is believed to be accurate and reliable However STMicroelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics Specification mentioned in this publication are subject to change without notice This publication supersedes and replaces all information previously supplied STMicroelectronics products are not authorized for use as critical components in life support devices or systems withoutexpress written approval of STMicroelectronics The ST logo is a registered trademark of STMicroelectronics 1999 STMicroelectronics Printed in Italy All Rights Reserved STMicroelectronics GROUP OF COMPANIES Australia Brazil China Finland France Germany Hong Kong India Italy Japan Malaysia Malta Morocco Singapore Spain Sweden Switzerland United Kingdom U S A http www st com 7172. 0 to 5 5 Input Voltage 0 to 5 5 Vo Output Voltage Operating Temperature 40 to 85 dt dv Input Rise and Fall Time see note 1 Vcc 3 3 0 3V 0 to 100 ns V Vcc 5 0 0 5V 0 to 20 ns V 1 Vin from 30 to 70 of Vcc 2 7 2 74V1G07 DC SPECIFICATIONS Parameter Test Conditions Value V High Level Input Voltage IH Vit Low Level Output Voltage High Impedance V Vin or Vit Output Leakage Vo Vcc or GND Current Veo Ci ETNEA Propagation Delay 330 5 70 97 1 33 so 9s 13 2 10 15 50 is Tas les 1 50 so ft 61 88 10 100 Voltage range is 3 3V 0 3V Voltage range is 5V 0 5V CAPACITIVE CHARACTERISTICS Parameter Test Conditions Cro Power Dissipation Capacitance note 1 1 Cro isdefined as the value of the IC sinternal equivalent capacitance which is calculated fromthe operating current consumption without load Referto Test Circuit Average operating current can be obtained by the following equation Icc opr Cro Voc fin lcc 3 7 74V1G07 TEST CIRCUIT PULSE GENERATOR C 15 50 pF or equivalent includes jig and probe capacitance Ri Ri 1KQ or equivalent Rr Zour of pulse generator typically 509 WAVEFORM PROPAGATION DELAYS f 1MHz 50 duty cycle C13910 4 7 74V1G07 SOT23 5L MECHANICAL DATA 74V1G07 SC 70 MECHANICAL DATA
3. O O 74 1607 0 U 47 74V1G07 SINGLE BUFFER OPEN DRAIN PRELIMINARY DATA L Cc HIGH SPEED tpp 6 1 ns TYP at Vcc 5V LOW POWER DISSIPATION lcc 1 uA MAX at Ta 25 C a HIGH NOISE IMMUNITY VNIH VNIL 28 Vcc MIN POWER DOWN PROTECTIONON INPUT OPERATING VOLTAGE RANGE Vcc OPR 2V to 5 5V a IMPROVED LATCH UP IMMUNITY DESCRIPTION The 74V1G07 is an advanced high speed CMOS SINGLE BUFFER OPEN DRAIN fabricated with sub micron silicon gate and double layer metal wiring C MOS technology The internal circuit is composed of 2 stages including buffer output which provide high noise immunity and stable output PIN CONNECTION AND IEC LOGIC SYMBOLS NC 1A GND 5013900 October 1999 SOT23 5L ORDER CODE 74V1G07S 74V1G07C SC 70 Power down protection is provided on input and 0 to 7V can be accepted on input with no regard to the supply voltage This device can be used to interface 5V to 3V 4 iy LC13740 1 7 74V1G07 INPUT EQUIVALENT CIRCUIT PIN DESCRIPTION SYMBOL NAME AND FUNCTION Nc Not Connected 1A Data Input N C 1A w GND ae E E Z High impedance ABSOLUTE MAXIMUM RATINGS o JBC Output Curent Absolute Maximum Ratings are those values beyond which damage to the device may occur Functional operation under these condition is not implied RECOMMENDED OPERATING CONDITIONS Symbol Parameter Value Unit Supply Voltage 2
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ST 74V1G07 handbook