ST 74VHC574 handbook
Contents
1. 0 173 0 0256 BSC 8 0 8 L 0 45 0 60 0 75 0 018 0 024 0 030 PIN 1 IDENTIFICATION 0087225C 2 10 14 74VHC574 Tape amp Reel SO 20 MECHANICAL DATA P 11 9 12 1 0 468 0 476 N e Y Y A A A EB Po Bo vuo NC QR Spes dor MU A Ko Ao P ml ini ei Note Drawing not in scale 11 14 74VHC574 Tape amp Reel TSSOP20 MECHANICAL DATA P 11 9 12 1 0 468 0 476 N de Y 1 A i i ER Po Bo NN EO Os E i Ko Ao Lok Note Drawing not in scale 12 14 ky Table 10 Revision History 74VHC574 Date Revision Description of Changes 12 Nov 2004 4 Order Codes Revision pag 1 13 14 74VHC574 Information furnished is believed to be accurate and reliable However STMicroelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics Specifications mentioned in this publica2. 3 Max number of data inputs n switching n 1 switching OV to 5 0V Inputs under test switching 5 0V to threshold Vj p OV to threshold Viup f 1MH Figure 4 z Test Circuit PULSE GENERATOR SC11700 TEST SWITCH tpLH tPHL Open tpz tpLz Vcc tpzH fpuz GND C 15 50pF or equivalent includes jig and probe capacitance RL R1 1KQ or equivalent Rr Zour of pulse generator typically 509 6 14 2 74VHC574 Figure 5 Waveform Propagation Delays Setup And Hold Times f 1MHz 50 duty cycle te feuL gt SC09251 SC09850 ky 7 14 74VHC574 Figure 7 Waveform Pulse Width f 1MHz 50 duty cycle SC09271 8 14 Esp 74VHC574 SO 20 MECHANICAL DATA ddd 0 100 0 004 hx45 o d i d U DA A SN J La C i B lt ddd SEATING 20 1 PLANE C 0 25 mm GAGE PLANE PIN 1 IDENTIFICATION 0016022D 9 14 74VHC574 TSSOP20 MECHANICAL DATA
3. SZA 74VHC574 OCTAL D TYPE FLIP FLOP WITH 3 STATE OUTPUTS NON INVERTING HIGH SPEED fmax 180 MHz TYP at Voc 5V LOW POWER DISSIPATION Icc 4 pA MAX at TA 25 C m HIGH NOISE IMMUNITY Vin Vni 28 Vec MIN POWER DOWN PROTECTION ON INPUTS SYMMETRICAL OUTPUT IMPEDANCE lloul lor 8 mA MIN m BALANCED PROPAGATION DELAYS tpLH ipHL m OPERATING VOLTAGE RANGE Vcc OPR 2V to 5 5V m PIN AND FUNCTION COMPATIBLE WITH 74 SERIES 574 m IMPROVED LATCH UP IMMUNITY m LOW NOISE Vo p 0 9V MAX DESCRIPTION The 74VHC574 is an advanced high speed CMOS OCTAL D TYPE FLIP FLOP with 3 STATE OUTPUTS NON INVERTING fabricated with sub micron silicon gate and double layer metal wiring C MOS technology These 8 bit D Type flip flop is controlled by a clock input CK and an output enable input OE On the positive transition of the clock the Q outputs will be set to the logic states that were setup at the D inputs While the OE input is low the 8 outputs will be in a normal logic state high or low logic level and Figure 1 Pin Connection And IEC Logic Symbols PC11880 November 2004 Table 1 Order Codes PACKAGE T amp R TAVHOSTANITR 74VHC574TTR while high level the outputs will be in a high impedance state The Output control does not affect the internal operation of flip flop that is the old data can be retained or the new data can be entered even while the outputs
4. loc Quiescent Supply E Current 5 5 VI Voc or GND 4 40 40 uA 2 4 14 74VHC574 Table 7 AC Electrical Characteristics Input t t 3ns Test Condition Value Symbol Parameter V C Ty 25 C 40 to 85 C 55 to 125 C Unit cc L V PF Min Typ Max Min Max Min Max tpLH Propagation Delay 3 30 15 85 13 2 1 0 15 5 1 0 15 5 tpa Time x CH to Q 3 30 50 11 0 16 7 1 0 19 0 1 0 19 0 5 00 15 5 6 8 6 1 0 10 0 1 0 10 0 5 00 50 7 1 10 6 1 0 12 0 1 0 12 0 tPzL Output Enable 3 30 15 8 2 12 8 1 0 15 0 1 0 15 0 tez Time 3 30 50 107 163 1 0 185 1 0 18 5 ns 5 00 15 5 9 9 0 1 0 10 5 1 0 10 5 5 00 50 7 4 11 0 1 0 12 5 1 0 12 5 tpiz Output Disable 3 30 50 11 0 15 0 1 0 17 0 1 0 17 0 ns tpuz Time 3 30 50 71 103 10 115 t0 11 5 tw Clock Pulse Width 3 30 5 0 5 0 5 0 HIGH or LOW zm ns a 5 00 5 0 5 0 5 0 ts Setup Time D to CK 3 30 3 5 3 5 3 5 HIGH or LOW rrr ns SoS 5 00 3 5 3 5 3 5 th Hold Time D to CK 3 3 1 5 1 5 1 5 ns HIGH or LOW 5 00 15 15 15 fmax Maximum Clock 3 300 15 80 125 65 65 F x requency 33 50 50 75 45 45 T z 509 15 130 180 110 110 5 0 50 85 115 75 75 tosL
5. mA Tstg Storage Temperature 65 to 150 C TL Lead Temperature 10 sec 300 C Absolute Maximum Ratings are those values beyond which damage to the device may occur Functional operation under these conditions is not implied Table 5 Recommended Operating Conditions Symbol Parameter Value Unit Voc Supply Voltage 2 to 5 5 V VI Input Voltage 0 to 5 5 V Vo Output Voltage 0 to Voc V Top Operating Temperature 55 to 125 C Input Rise and Fall Time note 1 Vcg 3 3 0 3V 0 to 100 quay Voc 5 0 0 5V 0 to 20 pay 1 Vin from 30 to 70 of Vec ky 3 14 74VHC574 Table 6 DC Specifications Test Condition Value Symbol Parameter Ta 25 C 40 to 85 C 55 to 125 C Unit Vcc V Min Typ Max Min Max Min Max Vin e Level Input 2 0 1 5 1 5 1 5 PIA 3 E us 07Vcc 07Vcc 07Vcc i Vu Low Level Input 2 0 0 5 0 5 0 5 Voltage 3 2D 03Vcc 03Vcc 03Vg V Vou High Level Output 2 0 lo 50 uA 1 9 2 0 1 9 1 9 Voltage 3 0 lo 50 pA 29 30 29 2 9 4 5 lo 50 uA 4 4 4 5 4 4 4 4 V 3 0 lo 4 mA 2 58 2 48 2 4 4 5 lo 8 mA 3 94 3 8 3 7 VoL Low Level Output 2 0 15250 uA 0 0 0 1 0 1 0 1 Voltage 3 0 lo 50 pA 0 0 0 1 0 1 0 1 4 5 15 50 uA 0 0 0 1 0 1 0 1 V 3 0 lo 4 mA 0 36 0 44 0 55 4 5 lo 8 mA 0 36 0 44 0 55 s Nd Gem 5 5 E i e 0 25 2 5 2 5 pA Current o7 CC I Input Leakage 0 to E C reni 55 Vi 5 5V or GND 04 1 sala
6. H Output to Output 3 80 50 1 5 1 5 1 5 tosHL Skew time note 1 5 00 50 1 0 1 0 1 0 NR Voltage range is 3 3V 0 3V Voltage range is 5 0V 0 5V Note 1 Parameter guaranteed by design tsoLH fot Hm tpLHnl tsoHL ltpHLm tpHunl Table 8 Capacitive Characteristics Test Condition Value Symbol Parameter Ty 25 C 40 to 85 C 55 to 125 C Unit Min Typ Max Min Max Min Max Cin Input Capacitance 7 10 10 10 pF Output Cour Capacitance pr Cpp Power Dissipation Capacitance 28 pF note 1 1 Cpp is defined as the value of the IC s internal equivalent capacitance which is calculated from the operating current consumption without load Refer to Test Circuit Average operating current can be obtained by the following equation lec opn Cpp X Voc X fin lcc 8 per Flip Flop r 5 14 74VHC574 Table 9 Dynamic Switching Characteristics Test Condition Value Symbol Parameter Voc Ta 25 C 40 to 85 C 55 to 125 C Unit Vv Min Typ Max Min Max Min Max Voip Dynamic Low 0 6 0 9 Voltage Quiet 5 0 V Votv Output note 1 2 0 9 0 6 Dynamic High Vinp Voltage Input 5 0 C 50 pF 3 5 V note 1 3 Dynamic Low Vip Voltage Input 5 0 1 5 V note 1 3 1 Worst case package 2 Max number of outputs defined as n Data inputs are driven OV to 5 0V n 1 outputs switching and one output at GND
7. are off Power down protection is provided on all inputs and 0 to 7V can be accepted on inputs with no regard to the supply voltage This device can be used to interface 5V to 3V All inputs and outputs are equipped with protection circuits against static discharge giving them 2KV ESD immunity and transient excess voltage LC12450 Rev 4 1 14 74VHC574 Figure 2 Input Equivalent Circuit Table 2 Pin Description PIN N SYMBOL NAME AND FUNCTION 1 OE 3 State Output Enable Input Active LOW 2 3 4 5 6 DO to D7 Data Inputs 7 8 9 12 13 14 Q0 to Q7 3 State Outputs 15 16 17 18 19 11 CK Clock Input LOW to HIGH Edge Triggered SEG 10 GND Ground 0V 20 Voc Positive Supply Voltage Table 3 Truth Table INPUTS OUTPUT OE CK D Q H X X Z L L X NO CHANGE L E L L L IT H H X Don t Care Z High Impedance Figure 3 Logic Diagram LC13500 This logic diagram has not be used to estimate propagation delays 2 2 14 Table 4 Absolute Maximum Ratings 74VHC574 Symbol Parameter Value Unit Voc Supply Voltage 0 5 to 7 0 V Vi DC Input Voltage 0 5 to 7 0 V Vo DC Output Voltage 0 5 to Voc 0 5 V lik DC Input Diode Current 20 mA lok DC Output Diode Current 20 mA lo DC Output Current 25 mA Icc or lenp DC Vec or Ground Current 75
8. tion are subject to change without notice This publication supersedes and replaces all information previously supplied STMicroelectronics products are not authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics The ST logo is a registered trademark of STMicroelectronics All other names are the property of their respective owners 2004 STMicroelectronics All Rights Reserved STMicroelectronics group of companies Australia Belgium Brazil Canada China Czech Republic Finland France Germany Hong Kong India Israel Italy Japan Malaysia Malta Morocco Singapore Spain Sweden Switzerland United Kingdom United States of America www st com 14 14 IST
Download Pdf Manuals
Related Search
ST 74VHC574 handbook