ST HCF4541B PROGRAMMABLE TIMER handbook
Contents
1. PIN No SYMBOL NAME AND FUNCTION 12 13 A B Time Select Input 4 11 NC Not Connected eee oa a External Resistor Con 3 Rs nection or External Clock Input 5 AR Auto Reset Input 6 MR Master Reset Input 10 MODE Mode Select Input 9 aie Output Selector 8 Q Output 7 Vss Negative Supply Voltage 14 Positive Supply Voltage TO CLOCK CKT HCF4541B FUNCTIONAL DIAGRAM AR MR MODE Q SELECT Vop PIN 14 VsszPIN 7 FREQUENCY SELECTION TABLE TRUTH TABLE A B N of Stages N Count 2N BR STATE L L 13 8192 L H L H 10 1024 5 Auto Reset On Auto Reset Disable H L 8 256 6 Master Reset Off Master Reset On H H 16 65536 9 Output Initially Low Output Initially High After Reset Q After Reset Q 10 Single Transition Mode Recycle Mode LOGIC DIAGRAM MANUAL RESET SC 0385 3 10 HCF4541B ABSOLUTE MAXIMUM RATINGS Symbol Parameter Value Unit Vpp Supply Voltage 0 5 to 22 V Vi DC Input Voltage 0 5 to Vpp 0 5 V lj DC Input Current t10 mA Pp Power Dissipation per Package 200 mW Power Dissipation per Output Transistor 100 mW Top Operating Temperature 55 to 4125 C Tstg Storage Temperature 65 to 150 Absolute Maximum Ratings are those values beyond which damage to the device may occur Functional operation under these conditions is not implied2. All voltage values are referred to Vgs pin voltage RECOMMENDED OPERATING CONDITIONS Symbol Parameter Value Unit Vpp Supply Voltage 3 to 20 V VI Input Voltage 0 to Vpp V Top Operating Temperature 55 to 125 C 4 10 ky DC SPECIFICATIONS HCF4541B Test Condition Value Symbol Parameter Vi Vo 25 40 to 85 C 55 to 125 Unit VY V A V min Typ Max Min Max Min Max I Quiescent Current 0 5 5 0 04 5 150 150 0 10 10 0 04 10 300 300 A 0 15 15 0 04 20 600 600 0 20 20 0 08 100 3000 3000 Vou High Level Output 0 5 lt 1 5 4 95 4 95 4 95 Voltage 0 10 lt 1 10 9 95 9 95 9 95 V 0 15 lt 1 15 14 95 14 95 14 95 Low Level Output 5 0 lt 1 5 0 05 0 05 0 05 Voltage 10 0 lt 1 10 0 05 0 05 0 05 V 15 0 lt 1 15 0 05 0 05 0 05 High Level Input 0 5 4 5 lt 1 5 3 5 3 5 3 5 Voltage 1 9 lt 1 10 7 7 7 V 1 5 13 5 1 15 11 11 11 Vit Low Level Input 4 5 0 5 lt 1 5 1 5 1 5 1 5 Voltage 9 1 lt 1 10 3 3 3 V 13 5 1 5 1 15 4 4 4 Output Drive 0 5 2 5 lt 1 5 1 55 3 1 1 08 1 08 Current os 46 lt 1 15 5 10 3 4 1 ai 0 10 9 5 lt 1 10 4 8 3 3 3 3 0 15 13 5 lt 1 15 10 20 8 4 8 4 lo Output Sink 0 5 0 4 lt 1 5 1 55 3 1 1 08 1 08 Current 0 10 0 5
3. S7 HCF4541B PROGRAMMABLE TIMER 16 STAGE BINARY COUNTER LOW SYMMETR OUTPUT RESISTANCE TYPICALLY 1000 at Vpp 15V m OSCILLATOR FREQUENCY RANGE DC to 100KHz AUTO OR MASTER RESET DISABLES OSCILLATOR DURING RESET TO REDUCE POWER DISSIPATION OPERATES WITH VERY SLOW CLOCK RISE AND FALL TIMES BUILT IN LOW POWER RC OSCILLATOR EXTERNAL CLOCK applied to pin 3 CAN BE USED INSTEAD OF OSCILLATOR OPERATES AS 2 FREQUENCY DIVIDER OR AS A SINGLE TRANSITION TIMER Q Q SELECT PROVIDES OUTPUT LOGIC LEVEL FLEXIBILITY CAPABLE OF DRIVING SIX LOW POWER TTL LOADS THREE LOW POWER SCHOTTKY LOADS OR SIX HTL LOADS OVER THE RATED TEMP RANGE 5V 10V AND 15V PARAMETRIC RATINGS m 100 TESTED FOR QUIESCENT CURRENT AT 20V MEETS ALL REQUIREMENTS OF JESD13B STANDARD SPECIFICATIONS FOR DESCRIPTION OF B SERIES CMOS DEVICES PIN CONNECTION ORDER CODES DiP HCF4541BM1 HCF4541M013TR DESCRIPTION The HCF4541B is a monolithic integrated circuit fabricated in Metal Oxide Semiconductor technology available in DIP and SOP packages This device is composed of a 16 stages binary counter an oscillator controlled by 2 external resistors and a capacitor an output control logic and an automatic power on reset circuit The counter varies on positive edge clock transition and it can be cleared by the MASTER RESET input The output from this timer is the Q or Q output from the 8t
4. 1 10 4 8 3 3 3 3 mA 0 15 1 5 lt 1 15 10 20 8 4 8 4 0 18 Input 18 1075 0 1 1 1 uA Input Capacitance Any Input 5 7 5 The Noise Margin for both 1 and 0 level is 1V min with Vpp 5V 2V min with Vpp 10V 2 5V min with Vpp 15V 5 10 HCF4541B DYNAMIC ELECTRICAL CHARACTERISTICS T mp 25 C C 50pF 200KQ t t 20 ns Test Condition Value Unit Symbol Parameter Vpp V Min Typ Max 28 Propagation Delay Time 5 3 5 10 5 tpi jj CLOCK to 10 1 25 3 8 us 15 0 9 2 9 216 Propagation Delay Time 5 6 18 PLH CLOCK to Q 10 3 5 10 us 15 2 5 7 5 tru Transition Time 5 100 200 10 50 100 ns 15 40 80 Transition Time 5 180 360 10 90 180 ns 15 65 130 Master Reset Clock Pulse 5 900 300 Width 10 300 100 ns 15 225 85 fo Maximum Clock Pulse 5 1 5 Input Frequency 10 4 MHz 15 6 tr tf Maximum Clock Pulse 5 Input Rise or Fall Time 10 Unlimited us 15 Typical temperature coefficient for all Vpp value is 0 3 C DIGITAL TIMER APPLICATION A positive MASTER RESET pulse clears the counter and latch The Output goes high and keeps up till the number of pulses selected by A and B are counted This circuit is retriggerable and is as accurate as the input frequency If a 6 10 more accurate circuit is desired an external
5. clock can be used on pin 3 A set up time equal to the width of the one shot output is required immediately following initial power up during which time the output will be high HCF4541B TEST CIRCUIT CS03770 C 50pF or equivalent includes jig and probe capacitance 200KQ Zour of pulse generator typically 500 ky 7 10 HCF4541B Plastic DIP 14 MECHANICAL DATA 8 10 ky SO 14 MECHANICAL DATA HCF4541B mm inch DIM MIN TYP MAX MIN TYP MAX A 1 75 0 068 al 0 1 0 2 0 003 0 007 a2 1 65 0 064 b 0 35 0 46 0 013 0 018 b1 0 19 0 25 0 007 0 010 0 5 0 019 ci 45 typ 8 55 8 75 0 336 0 344 E 5 8 6 2 0 228 0 244 7 62 0 300 F 3 8 4 0 0 149 0 157 4 6 5 3 0 181 0 208 L 0 5 1 27 0 019 0 050 0 68 0 026 S 8 max L cl z PO13G 9 10 HCF4541B Information furnished is believed to be accurate and reliable However STMicroelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics Specifications mentioned in this publication are subject to change without notice This publication supersedes and replaces all information previously supplie
6. d STMicroelectronics products are not authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics The ST logo is a registered trademark of STMicroelectronics 2002 STMicroelectronics Printed in Italy All Rights Reserved STMicroelectronics GROUP OF COMPANIES Australia Brazil Canada China Finland France Germany Hong Kong India Israel Italy Japan Malaysia Malta Morocco Singapore Spain Sweden Switzerland United Kingdom United States http www st com 10 10 ky
7. h 13th or 16th counter stage The choice of the stage depends on the time SELECT SL 0384 September 2002 1 10 HCF4541B select inputs A or B see frequency selection table The output is available in one of the two modes that can be selected via the MODE input pin 10 see truth table The output turns out as a continuos square wave with a frequency equal to the oscillator frequency divided by 2N when this MODE input is a logic 1 When it is a logic 0 and after a MASTER RESET is started and Q output has been selected the output goes up to a high state after 2 counts It remains in that state till another MASTER RESET pulse is apply or the mode input is a logic 1 The process starts by setting the AUTO RESET input pin 5 to logic INPUT EQUIVALENT CIRCUIT Vss C303790 RC OSCILLATOR CIRCUIT INTERNAL RESET 2 10 0 and switching power on If pin 5 is set to logic 1 the AUTO RESET circuit is not enabled and counting cannot start till a positive MASTER RESET pulse is applied returning to a low level The AUTO RESET consumes a remarkable amount of power and should not be used if low power operation is wanted The frequency of the oscillator depends on the RC network It can be calculated using the following formula f 1 2 3 where f is between 1KHz and 100KHz and RS gt 10 KQ and 2 PIN DESCRIPTION
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