ST SRT512 13.56 MHz short-range contactless memory chip with 512-bit EEPROM anticollision functions handbook
Contents
1. 14 Lockable EEPROM area addresses 0 to 4 15 Binary counter addresses 5 to 6 15 Count down example binary format 16 EEPROM addresses 7 to 15 17 System area 2 aa AND il daa P RR diab des 18 State transition diagram 22 SRT512 Chip ID description 23 Description of a possible anticollision sequence 24 Example of an anticollision sequence 26 Initiate request format 28 Initiate response format 28 Initiate frame exchange between reader and SRT512 28 Pcall16 request format 29 Pcall16 response format 29 Pcall16 frame exchange between reader and SRT512 29 Slot marker request format 30 Slot marker response format 0c cette eee 30 Slot marker frame exchange between reader and SRT512 30 Select request format 31 Se2. A Out of On field Ready Chip_IDgbits RND Initiate Initiate or Pcall16 or Slot_marker SN or Select wrong Chip ID Reset to inventory Select Chip ID Read block Write block Get UID Out of Out of field Select Chip ID Selected field Completion Deselected Deactivated Select Chip ID Al10794b Doc ID 13277 Rev 5 a SRT512 Anticollision 7 Anticollision The SRT512 provides an anticollision mechanism that searches for the Chip_ID of each device that is present in the reader field range When known the Chip_ID is used to select an SRT512 individually and access its memory The anticollision sequence is managed by the reader through a set of commands described in Section 5 SRT512 operation e Initiate e Pcall16 e Slot marker The reader is the master of the communication with one or more SRT512 device s It initiates the tag communication activity by issuing an Initiate Pcall16 or Slot marker command to prompt the SRT512 to answer During the anticollision sequence it might happen that two or more SRT512 devices respond simultaneously so causing a collision The command set allows the reader to handle the sequence to separate SRT512 transmissions into different time slots Once the anticollision sequence has completed SRT512 communication is fully under the control of the reader allowing only one SRT512 to transmit at
3. 57 SRT512 13 56 MHz short range contactless memory chip with 512 bit EEPROM and anticollision functions Features ISO 14443 2 Type B air interface compliant ISO 14443 3 Type B frame format compliant 13 56 MHz carrier frequency 847 kHz subcarrier frequency 106 Kbit second data transfer 8 bit Chip_ID based anticollision system 2 count down binary counters with automated anti tearing protection 64 bit unique identifier 512 bit EEPROM with write protect feature Read_block and Write_block 32 bits Internal tuning capacitor 1 million erase write cycles Unsawn wafer Bumped and sawn wafer 40 year data retention Self timed programming cycle 5 ms typical programming time Applications m Transport September 2011 Doc ID 13277 Rev 5 1 46 www st com Contents SRT512 Contents 1 Description sia Beatie cat A a AN 7 2 Signal description sde se chew in ee aca De cd 8 2 1 AG GU eee ee o OR A ara 8 3 Data transfer 24606045 o A A max x AA 9 3 1 Input data transfer from reader to SRT512 request frame 9 3 1 1 Character transmission format for request frame 9 3 1 2 Request start of frame uan an anana 10 3 1 3 Request end of frame 10 3 2 Output data transfer from SRT512 to reader answer frame 11 3 2 1 Character transmission format for answer frame 11 3 2 2 An
4. Response parameter e Chip ID of the SRT512 Figure 27 Pcall16 frame exchange between reader and SRT512 Reader SOF O6h 04h CRC CRCH EOF SRT512 lt to gt lt ty gt SOF Chip ID CRC CRCH EOF Al135085 Doc ID 13277 Rev 5 29 46 SRT512 commands SRT512 8 3 30 46 Slot_marker SN command Command code x6h The SRT512 must be in Inventory state to interpret the Slot_marker SN command The Slot_marker byte code is divided into two parts e b3 to bo 4 bit command code with fixed value 6 e b to b4 4 bits known as the Slot number SN They assume a value between 1 and 15 The value 0 is reserved by the Pcall16 command On receiving the Slot_marker command the SRT512 compares its Chip_slot_number value with the Slot_number value given in the command code If they match the SRT512 returns its Chip_ID value If not the SRT512 does not send any response The Slot_marker command used together with the Pcall16 command allows the reader to search for all the Chip_IDs when there are more than one SRT512 device in Inventory state present in the reader field range Figure 28 Slot_marker request format SOF Slot_marker CRCL CRCH EOF X6h 8 bits 8 bits Al07675b Request parameter e x Slot number Figure 29 Slot_marker response format SOF Chip_ID CRCL CRCH EOF 8 bits 8 bits 8 bits Al07671 Response parameters e Chip I
5. SRT512 List of figures List of figures Figure 1 Figure 2 Figure 3 Figure 4 Figure 5 Figure 6 Figure 7 Figure 8 Figure 9 Figure 10 Figure 11 Figure 12 Figure 13 Figure 14 Figure 15 Figure 16 Figure 17 Figure 18 Figure 19 Figure 20 Figure 21 Figure 22 Figure 23 Figure 24 Figure 25 Figure 26 Figure 27 Figure 28 Figure 29 Figure 30 Figure 31 Figure 32 Figure 33 Figure 34 Figure 35 Figure 36 Figure 37 Figure 38 Figure 39 Figure 40 Figure 41 Figure 42 Figure 43 Figure 44 Figure 45 Figure 46 Figure 47 Figure 48 ky Logic diagram scere d steve deren Seda Bhan bias E Sd a Rom a 7 Defloor pla e cesta a doce dons a Sakon NAG a ad Paha we oe eS ee one 8 10 ASK modulation of the received Wave 9 SRT512 request frame character format 9 Request start of frame 222 10 Request end of frame 10 Wave transmitted using BPSK subcarrier modulation 11 Answer start of frame 11 Answer end of frame narua n anana a naana 12 Example of a complete transmission frame 12 CRC transmission rules 13 SRT512 memory mapping
6. Memory mapping SRT512 16 46 Figure 15 Count down example binary format Initial data 1 unit decrement 1 unit decrement 1 unit decrement 8 unit decrement Increment not allowed b31 bO ai07661 Doc ID 13277 Rev 5 a SRT512 Memory mapping 4 3 EEPROM area The 9 blocks between addresses 7 and 15 are EEPROM blocks of 32 bits each 36 bytes in total See Figure 16 for a map of the area These blocks can be accessed using the Read_block and Write_block commands The Write_block command for the EEPROM area always includes an auto erase cycle prior to the write cycle Blocks 7 to 15 can be write protected Write access is controlled by the 9 bits of the OTP_Lock_Reg located at block address 255 see Section 4 4 1 OTP_Lock_Reg for details Once protected these blocks 7 to 15 cannot be unprotected Figure 16 EEPROM addresses 7 to 15 Block address 32 bit block b16 b15 b14 User area User area User area User area User area User area User area User area User area b8 b7 LSb bO Description Lockable EEPROM Ai12383b Doc ID 13277 Rev 5 17 46 Memory mapping SRT512 4 4 4 4 1 18 46 System area This area is used to modify the settings of the SRT512 It contains 3 registers OTP_Lock_Reg Fixed Chip_ID and ST Reserved See Figure 17 for a map of this area A Write_block command in this area
7. SOF described in Figure 8 is composed of e followed by 10 ETUs at logic 0 e followed by 2 ETUs at logic 1 Figure 8 Answer start of frame bo b1 b2 b3 b4 b5 b6 b7 b8 b9 b10 b11 ETU 0 0 0 0 0 0 0 0 0 0 1 1 ai07665 Doc ID 13277 Rev 5 11 46 Data transfer SRT512 3 2 3 Answer end of frame The EOF shown in Figure 9 is composed of e followed by 10 ETUs at logic 0 e followed by 2 ETUs at logic 1 Figure 9 Answer end bO b1 of frame b2 b3 b4 ai07665 3 3 Transmission frame Between the request data transfer and the answer data transfer all ASK and BPSK modulations are suspended for a minimum time of ty 128 fs This delay allows the reader to switch from Transmission to Reception mode It is repeated after each frame After to the 13 56 MHz carrier frequency is modulated by the SRT512 at 847 kHz for a period of t 128 f to allow the reader to synchronize After t4 the first phase transition generated by the SRT512 forms the start bit 0 of the answer SOF After the falling edge of the answer EOF the reader waits a minimum time to before sending a new request frame to the SRT512 Figure 10 Example of a complete transmission frame Sent by the 4 TT y MG Reader SOF Cmd Data eno CRG EOF SOF 12 bits Fil 10 bits 10 bits L
8. UID UID UID UID UID GRC CRCH O 0 1 2 3 4 5 6 74 F F Al13515b a Doc ID 13277 Rev 5 SRT512 Revision history Revision history Table 10 Document revision history Date Revision Changes 12 Dec 2006 0 1 Initial release 22 Feb 2007 4 Document status promoted from Target Specification to Preliminary Data Document status promoted from Preliminary Data to full Datasheet A3 A4 and A5 antennas added see Package mechanical on page 41 05 Apr 2007 2 6 bit IC code changed under Unique identifier UID on page 37 Crun min and max values removed typical value added in Table 7 DC characteristics Small text changes All antennas are ECOPACK compliant SRT512 products no longer delivered with A3 A4 and A5 antennas 28 Aug 2008 3 Table 5 Absolute maximum ratings and Table 9 Ordering information scheme clarified Small text changes Initial counter values corrected in Section 4 2 32 bit binary counters 28 Jul 2009 4 Small text changes Updated Section 1 Description 19 Sep 2011 a Lou 3 Modified disclaimer on last page Doc ID 13277 Rev 5 45 46 SRT512 Please Read Carefully Information in this document is provided solely in connection with ST products STMicroelectronics NV and its subsidiaries ST reserve the right to make changes corrections modifications or improvements to this document and the products and services described herei
9. calculation SRT512 AppendixA 19014443 type B CRC calculation include lt stdio h gt include lt stdlib h gt include lt string h gt include lt ctype h gt define BYTE unsigned char define USHORT unsigned short unsigned short UpdateCrc BYTE ch USHORT lpwCrc ch ch BYTE IpwCrc amp OxOOFF ch ch ch lt lt 4 lpwCrc lpwCrc gt gt 8 USHORT ch lt lt 8 USHORT ch 3 USHORT ch gt gt 4 return lpwCrc void ComputeCrc char Data int Length BYTE TransmitFirst BYTE TransmitSecond BYTE chBlock USHORTt wCrc wCrc OxFFFF ISO 3309 do chBlock Data UpdateCrc chBlock amp wCrc Il Il while Length wCre wCrc ISO 3309 TransmitFirst BYTE wCrc amp OxFF TransmitSecond BYTE wCrc gt gt 8 OxFF return int main void BYTE BuffCRC B 10 0x0A 0x12 0x34 0x56 First Second i printf Crc 16 G x x 16 x 12 x 5 1 printf CRC B of for i 0 i 4 i printf 502X BuffCRC Blil ComputeCrc BuffCRC B 4 amp First amp Second printf Transmitted 302X then 302X First Second return 0 42 46 Doc ID 13277 Rev 5 ky SRT512 SRT512 command brief Appendix B SRT512 command brief Figure 51 Initiate frame exchange between reader and SRT512 Reader SOF 06h 00h CRC CRCH EOF SRT512 lt to gt lt t4 gt SOF Chip ID CRC CRCH EO
10. command Figure 2 Die floor plan ACO AC1 Al09055 2 Signal description 2 1 AC1 ACO The pads for the antenna coil AC1 and ACO must be directly bonded to the antenna 8 46 Doc ID 13277 Rev 5 ky SRT512 Data transfer 3 3 1 Data transfer Input data transfer from reader to SRT512 request frame The reader must generate a 13 56 MHz sinusoidal carrier frequency at its antenna with enough energy to remote power the memory The energy received at the SRT512 s antenna is transformed into a supply voltage by a regulator and into data bits by the ASK demodulator For the SRT512 to decode correctly the information it receives the reader must 10 amplitude modulate the 13 56 MHz wave before sending it to the SRT512 This is represented in Figure 3 The data transfer rate is 106 Kbits s Figure 3 10 ASK modulation of the received wave DATA BITTO TRANSMIT TO THE SRT512 10 ASK MODULATION OF THE 13 56 MHz WAVE GENERATED BY THE READER a Transfer time for one data bit is 1 106 kHz Ai13503b Character transmission format for request frame The SRT512 transmits and receives data bytes as 10 bit characters with the least significant bit bo transmitted first as shown in Figure 4 Each bit duration an ETU elementary time unit is equal to 9 44 us 1 106 kHz These characters framed by a start of frame SOF and an end of fram
11. modification of the OTP_Lock_Reg bits it is necessary to send a Select command with a valid Chip_ID to the SRT512 in order to load the block write protection into the logic This bit is set by ST during production tests on customer request It cannot be modified by the user Doc ID 13277 Rev 5 SRT512 Memory mapping 4 4 2 Fixed Chip ID Option The SRT512 is provided with an anticollision feature based on a random 8 bit Chip ID Prior to selecting an SRT512 an anticollision sequence has to be run to search for the Chip ID of the SRT512 This is a very flexible feature however the searching loop requires time to run For some applications much time could be saved by knowing the value of the SRT512 Chip ID beforehand so that the SRT512 can be identified and selected directly without having to run an anticollision sequence This is why the SRT512 was designed with an optional mask setting used to program a fixed 8 bit Chip ID to bits bz to by of the system area When the fixed Chip ID option is used the random Chip ID function is disabled Doc ID 13277 Rev 5 19 46 SRT512 operation SRT512 5 20 46 SRT512 operation All commands data and CRC are transmitted to the SRT512 as 10 bit characters using ASK modulation The start bit of the 10 bits bg is sent first The command frame received by the SRT512 at the antenna is demodulated by the 10 ASK demodulator and decoded by the internal logic Prior to any opera
12. will not erase the previous contents Selected bits can thus be set from 1 to O All bits previously at O remain unchanged Once all the 32 bits of a block are at 0 the block is empty and cannot be updated any more Figure 17 System area MSB 32 bit block LSB Suc Description address La b16 b15 b14 b8 b7 bo 255 OTP_Lock_Reg 1 STreserved Fixed Chip_ID OTP Option ai13505b OTP_Lock_Reg The 16 bits b31 to b16 of the System area block address 255 are used as OTP_Lock_Reg bits in the SRT512 They control the write access to the 16 blocks 0 to 15 as follows When b16 is at 0 block 0 is write protected When b17 is at O block 1 is write protected When b18 is at 0 block 2 is write protected When b19 is at O block 3 is write protected When b20 is at 0 block 4 is write protected When b21 is at 0 block 5 is write protected When b22 is at 0 block 6 is write protected When b23 is at 0 block 7 is write protected When b24 is at 0 block 8 is write protected When b25 is at 0 block 9 is write protected When b26 is at 0 block 10 is write protected When b27 is at 0 block 11 is write protected When b28 is at 0 block 12 is write protected When b29 is at 0 block 13 is write protected When b30 is at 0 block 14 is write protected When b31 is at 0 block 15 is write protected The OTP_Lock_Reg bits cannot be erased Once write protected the blocks behave like ROM blocks and cannot be unprotected After any
13. 0 1000 1 Mil Std 883 Method 3015 Doc ID 13277 Rev 5 SRT512 DC and AC parameters 10 DC and AC parameters Table 6 Operating conditions Symbol Parameter Min Max Unit Ta Ambient operating temperature 20 85 C Table 7 DC characteristics Symbol Parameter Condition Min Typ Max Unit Voc Regulated voltage 2 5 3 5 V lcc Supply current active in read Voc 3 0 V 100 pA loc Supply current active in write Voc 3 0 V 250 pA VRET Backscattering induced voltage ISO10373 6 20 mV CTUN Internal tuning capacitor 13 56 MHz 64 pF Table 8 AC characteristics Symbol Parameter Condition Min Max Unit fec External RF signal frequency 13 553 13 567 MHz MIcarrier Carrier modulation index Ml A B A B 8 14 tarn tree 110 rise and fall times 0 8 2 5 us trese Minimum pulse width for start bit ETU 128 fcc 9 44 us tur ASK modulation data jitter Coupler to SRT512 2 2 us tes Minimum time from carrier 5 m generation to first data fs Subcarrier frequency fcc 16 847 5 kHz to Antenna reversal delay 128 fs 151 us ty Synchronization delay 128 fs 151 us to Answer to new request delay 14 ETU 132 us tor Time between request characters Coupler to SRT512 0 57 us tpA Time between answer characters SRT512 to coupler 0 us With no auto erase cycle 3 iis OTP tw Program
14. 10 bits 10 bits L10 bits at 106kb s tor fg 847 5KHz Sent by S SOF Date R CAC EOF SRT512 ye INN ata e C C EOF L to t ole 12 bits sla 10bits 10 bits 10 bits 12 bits 128 fs 128 fs te C Input data transfer using ASK Output data transfer using BPSK Ai13506b 12 46 Doc ID 13277 Rev 5 SRT512 Data transfer 3 4 CRC The 16 bit CRC used by the SRT512 is generated in compliance with the ISO14443 type B recommendation For further information please see Appendix A The initial register contents are all 1s FFFFh The two byte CRC is present in every request and in every answer frame before the EOF The CRC is calculated on all the bytes between SOF not included and the CRC field Upon reception of a request from a reader the SRT512 verifies that the CRC value is valid If it is invalid the SRT512 discards the frame and does not answer the reader Upon reception of an answer from the SRT512 the reader should verify the validity of the CRC In case of error the actions to be taken are the reader designer s responsibility The CRC is transmitted with the least significant byte first and each byte is transmitted with the least significant bit first Figure 11 CRC transmission rules LSByte MSByte LSbit MSbit LSbit MSbit CRC 16 8 bits CRC 16 8 bits ai07667 Doc ID 13277 Rev 5 13 46 Memory mapping SRT512 4 Memory mapping The SRT512 is organi
15. D of the SRT512 Figure 30 Slot marker frame exchange between reader and SRT512 Reader SOF X6h CRC CRCy EOF SRT512 pg lt gt SOF Chip ID CRC CRCH EOF Al13509b Doc ID 13277 Rev 5 ky SRT512 SRT512 commands 8 4 Select Chip_ID command Command code OEh The Select command allows the SRT512 to enter the Selected state Until this command is issued the SRT512 will not accept any other command except for Initiate Pcall16 and Slot_marker The Select command returns the 8 bits of the Chip_ID value An SRT512 in Selected state that receives a Select command with a Chip_ID that does not match its own is automatically switched to Deselected state Figure 31 Select request format SOF Select Chip_ID CRCL CRCH EOF OEh 8 bits 8 bits 8 bits Al07677b Request parameter e 8 bit Chip ID stored during the anticollision sequence Figure 32 Select response format SOF Chip ID CRC CRCH EOF 8 bits 8 bits 8 bits Al07671 Response parameters e Chip ID of the selected tag Must be equal to the transmitted Chip ID Figure 33 Select frame exchange between reader and SRT512 Reader SOF OEh Chip ID CRC CRCH EOF SRT512 ig lt t4 gt SOF Chip ID CRC CRCy EOF Al13510b Doc ID 13277 Rev 5 31 46 SRT512 commands SRT512 8 5 32 46 Completion command Command code OFh On receiv
16. F Al13507b Figure 52 Pcall16 frame exchange between reader and SRT512 Reader SOF 06h 04h CRC CRCH EOF SRT512 p lt t4 gt SOF Chip ID CRC CRC EOF Al13508b Figure 53 Slot_marker frame exchange between reader and SRT512 Reader SOF X6h CRC CRCH EOF SRT512 t lt t gt SOF Chip ID CRC CRCH EOF Al13509b Figure 54 Select frame exchange between reader and SRT512 Reader SOF OEh Chip ID CRC CRCy EOF SRT512 lt tg gt lt ty gt SOF Chip_ID CRC CRCH EOF Al135106 Figure 55 Completion frame exchange between reader and SRT512 Reader SOF OFh CRC CRCH EOF SRT512 No Response Al13511b Doc ID 13277 Rev 5 43 46 SRT512 command brief SRT512 44 46 Figure 56 Reset_to_inventory frame exchange between reader and SRT512 Reader SOF OCh CRC CRCY EOF SRT512 No Response Al13512b Figure 57 Read_block frame exchange between reader and SRT512 Reader SOF 08h Address CRC CRC EOF SRT512 lt to gt lt t4 gt SOF Data 1 Data 2 Data 3 Data 4 CRC CRC EOF Al13513c Figure 58 Write block frame exchange between reader and SRT512 Reader SOF 09h Address Data 1 Data2 Data3 Data4 CRC CRC EOF No response SRT512 Al13514d Figure 59 Get UID frame exchange between reader and SRT512 S E Reader O 0Bh CRC CRCHO F F S E SRT512 lt tg gt et o UID UID UID
17. N 1 Send Slot marker 15 Step 17 Slot 15 If no answer or collision is detected go to step18 If 1 answer is detected store the Chip ID Send Select and go to step18 All the slots have been generated and the Chip ID values should be stored into the reader memory Issue the Select Chip ID command and access each identified cu SRT512 one by one After accessing each SRT512 switch them into Deselected or tep 18 Deactivated state depending on the application needs If collisions were detected between Step2 and Step17 go to Step2 If no collision was detected between Step2 and Step17 go to Step1 After each Slot_marker command there may be several one or no answers from the SRT512 devices The reader must handle all the cases and store all the Chip_IDs correctly decoded At the end of the anticollision sequence after Slot_marker 15 the reader can start working with one SRT512 by issuing a Select command containing the desired Chip_ID If a collision is detected during the anticollision sequence the reader has to generate a new sequence in order to identify all unidentified SRT512 devices in the field The anticollision sequence can stop when all SRT512 devices have been identified Doc ID 13277 Rev 5 25 46 Doc ID 13277 Rev 5 Anticollision SRT512 Figure 21 Example of an anticollision sequence Tag1 Tag2 Tag3 Tag4 Tags Tag6 Tag7 Tag8 command Chip ID Chip ID Chip ID Chip ID Chi
18. NS NOR IN PRODUCTS OR SYSTEMS WHERE FAILURE OR MALFUNCTION MAY RESULT IN PERSONAL INJURY DEATH OR SEVERE PROPERTY OR ENVIRONMENTAL DAMAGE ST PRODUCTS WHICH ARE NOT SPECIFIED AS AUTOMOTIVE GRADE MAY ONLY BE USED IN AUTOMOTIVE APPLICATIONS AT USER S OWN RISK Resale of ST products with provisions different from the statements and or technical features set forth in this document shall immediately void any warranty granted by ST for the ST product or service described herein and shall not create or extend in any manner whatsoever any liability of ST ST and the ST logo are trademarks or registered trademarks of ST in various countries Information in this document supersedes and replaces all information previously supplied The ST logo is a registered trademark of STMicroelectronics All other names are the property of their respective owners 2011 STMicroelectronics All rights reserved STMicroelectronics group of companies Australia Belgium Brazil Canada China Czech Republic Finland France Germany Hong Kong India Israel Italy Japan Malaysia Malta Morocco Philippines Singapore Spain Sweden Switzerland United Kingdom United States of America www st com 46 46 Doc ID 13277 Rev 5 ky
19. R 3 43h Slot3 only one answer SELECT 43h 43h Tagl is identified All tags are identified ai07669 ky SRT512 SRT512 commands 8 SRT512 commands See the paragraphs below for a detailed description of the Commands available on the SRT512 The commands and their hexadecimal codes are summarized in Table 4 A brief is given in Appendix B Table 4 Command code Hexadecimal Code Command 06h 00h Initiate 06h 04h Pcall16 x6h Slot marker SN 08h Read block Addr 09h Write block Addr Data OBh Get UID OCh Reset_to_inventory OEh Select Chip ID OFh Completion Doc ID 13277 Rev 5 27 46 SRT512 commands SRT512 8 1 28 46 Initiate command Command code 06h 00h Initiate is used to initiate the anticollision sequence of the SRT512 On receiving the Initiate command all SRT512 devices in Ready state switch to Inventory state set a new 8 bit Chip_ID random value and return their Chip_ID value This command is useful when only one SRT512 in Ready state is present in the reader field range It speeds up the Chip_ID search process The Chip_slot_number is not used during Initiate command access Figure 22 Initiate request format SOF Initiate CRC CRCH EOF 06h 00h 8 bits 8 bits Al07670b Request parameter e No parameter Figure 23 Initiate response format SOF Chip ID CRC CRCH EOF 8 bits 8 b
20. a time The Anticollision scheme is based on the definition of time slots during which the SRT512 devices are invited to answer with minimum identification data the Chip ID The number of slots is fixed at 16 for the Pcall16 command For the Initiate command there is no slot and the SRT512 answers after the command is issued SRT512 devices are allowed to answer only once during the anticollision sequence Consequently even if there are several SRT512 devices present in the reader field there will probably be a slot in which only one SRT512 answers allowing the reader to capture its Chip ID Using the Chip ID the reader can then establish a communication channel with the identified SRT512 The purpose of the anticollision sequence is to allow the reader to select one SRT512 at a time The SRT512 is given an 8 bit Chip ID value used by the reader to select only one among up to 256 tags present within its field range The Chip ID is initialized with a random value during the Ready state or after an Initiate command in the Inventory state The four least significant bits boto bs of the Chip ID are also known as the Chip slot number This 4 bit value is used by the Pcall16 and Slot marker commands during the anticollision sequence in the Inventory state Figure 19 SRT512 Chip ID description b7 b6 b5 b4 b3 b2 b1 bO 8 bit Chip_ID b0 to b3 Chip slot number ai07668b Each time the SRT512 receives a Pcal
21. ad_block Address CRC CRCH EOF Al07684b Request parameter e Address block addresses from O to 15 or 255 Figure 41 Read block response format Data 3 Data 4 8 blts 8 blts 8 blts 8 blts 8 bits 8 blts Al07685b Response parameters e Data 1 Less significant data byte e Data 2 Data byte e Data 3 Data byte e Data 4 Most significant data byte Figure 42 Read block frame exchange between reader and SRT512 Reader SOF 08h Address CRC CRC EOF SRT512 lt to gt lt ty gt SOF Data 1 Data 2 Data 3 Data 4 CRC CRC EOF Al13513c Doc ID 13277 Rev 5 ky SRT512 SRT512 commands 8 8 Write_block Addr Data command Command code 09h On receiving the Write_block command the SRT512 writes the 4 bytes contained in the command to the addressed block provided that the block is available and not write protected Data bytes are transmitted with the least significant byte first and each byte is transmitted with the least significant bit first The address byte gives access to the 16 blocks of the SRT512 addresses 0 to 15 Write_block commands issued with a block address above 15 will not be interpreted and the SRT512 will not return any response except for the System area located at address 255 The result of the Write_block command is submitted to the addressed block See the following paragraphs for a complete description of the Write_block command e F
22. e EOF are put together to form a command frame as shown in Figure 10 A frame includes an SOF commands addresses data a CRC and an EOF as defined in the ISO 14443 3 Type B Standard If an error is detected during data transfer the SRT512 does not execute the command but it does not generate an error frame Figure 4 SRT512 request frame character format bO b1 b2 b3 b4 b5 b6 b7 b8 b9 ery pons LSb Information Byte MSb pu ai07664 Doc ID 13277 Rev 5 9 46 Data transfer SRT512 10 46 Table 2 Bit description Bit Do Description Start bit used to synchronize the transmission Value bo 0 by to bg Information byte command address or data The information byte is sent with the least significant bit first Dg Stop bit used to indicate the end of a character by 1 Request start of frame The SOF described in Figure 5 is composed of e one falling edge e followed by 10 ETUs at logic 0 e followed by a single rising edge e followed by atleast 2 ETUs and at most 3 at logic 1 Figure 5 Request start of frame bO b1 b2 b3 b4 b5 b6 ai07665 Request end of frame The EOF shown in Figure 6 is composed of e one falling edge e followed by 10 ETUs at logic 0 e followed by a single rising edge Figure 6 Request end of frame bO b1 b2 b3 b4 b5 b6 ai07666 Doc ID 13277 Rev 5 SRT512 Data tran
23. e will respond to the Pcall16 and Slot_marker SN anticollision commands A new SRT512 introduced in the field range during the anticollision sequence will not be taken into account as it will not respond to the Pcall16 or Slot_marker SN command Ready state To be considered during the anticollision sequence it must have received the Initiate command and entered the Inventory state Table 3 shows the elements of a standard anticollision sequence See Figure 27 for an example Table 3 Standard anticollision sequence Send Initiate If no answer is detected go to step1 Step 1 Init If only 1 answer is detected select and access the SRT512 After accessing the SRT512 deselect the tag and go to step1 If acollision many answers is detected go to step2 Send Pcall16 Step 2 SlotO If no answer or collision is detected go to steps If 1 answer is detected store the Chip_ID Send Select and go to step3 Send Slot marker 1 Step3 Slot1 If no answer or collision is detected go to step4 If 1 answer is detected store the Chip ID Send Select and go to step4 Send Slot marker 2 Step 4 Slot2 If no answer or collision is detected go to step5 If 1 answer is detected store the Chip ID Send Select and go to step5 Send Slot marker 3 up to 14 Step N Slop N If no answer or collision is detected go to stepN 1 If 1 answer is detected store the Chip ID Send Select and go to step
24. er rate between the SRT512 and the reader is 106 Kbit s in both reception and emission modes The SRT512 follows the ISO 14443 2 Type B recommendation for the radio frequency power and signal interface Figure 1 Logic diagram Power Supply Regulator 512 bit ASK User Demodulator EEPROM BPSK Load Modulator Al13502 The SRT512 is specifically designed for short range applications that need re usable products The SRT512 includes an anticollision mechanism that allows it to detect and select tags present at the same time within range of the reader Table 1 Signal names Signal name Description Aa col ACO Antenna coil ky Doc ID 13277 Rev 5 7 46 Signal description SRT512 The SRT512 contactless EEPROM can be randomly read and written in block mode each block containing 32 bits The instruction set includes the following nine commands e Read block Write block Initiate Pcall16 Slot marker Select Completion Reset to inventory Get UID The SRT512 memory is organized in three areas as described in Table 12 The first area is an EEPROM area where all blocks behave as User blocks The second area provides two 32 bit binary counters that can only be decremented from FFFF FFFFh to 0000 0000h and gives a capacity of 4 294 967 296 units per counter The last area is the EEPROM memory It is accessible by block of 32 bits and includes an auto erase cycle during each Write block
25. igure 13 Lockable EEPROM area addresses 0 to 4 e Figure 14 Binary counter addresses 5 to 6 e Figure 16 EEPROM addresses 7 to 15 The Write_block command does not give rise to a response from the SRT512 The reader must check after the programming time ty that the data was correctly programmed The SRT512 must have received a Select command and be switched to Selected state before any Write_block command can be accepted All Write_block commands sent to the SRT512 before a Select command is issued are ignored Figure 43 Write_block request format SOF Write block Address Data 1 Data 2 Data 3 Data 4 CRCL CRCH EOF 09h 8 bits 8 bits 8 bits 8 bits 8 bits 8 bits 8 bits A107687c Request parameters e Address block addresses from 0 to 15 or 255 Data 1 Less significant data byte Data 2 Data byte Data 3 Data byte Data 4 Most significant data byte Figure 44 Write block response format No response Al07680b Figure 45 Write block frame exchange between reader and SRT512 Reader SOF 09h Address Data1 Data2 Data3 Data4 CRC CRC EOF SRT512 Al13514d Doc ID 13277 Rev 5 35 46 SRT512 commands SRT512 8 9 36 46 Get_UID command Command code OBh On receiving the Get_UID command the SRT512 returns its 8 UID bytes UID bytes are transmitted with the least significant byte first and each byte is transmitted w
26. ing the Completion command an SRT512 in Selected state switches to Deactivated state and stops decoding any new commands The SRT512 is then locked in this state until a complete reset tag out of the field range Anew SRT512 can thus be accessed through a Select command without having to remove the previous one from the field The Completion command does not generate a response All SRT512 devices not in Selected state ignore the Completion command Figure 34 Completion request format SOF Completion CRCL CRCH EOF OFh 8 bits 8 bits Al07679b Request parameters e No parameter Figure 35 Completion response format No Response Al07680 Figure 36 Completion frame exchange between reader and SRT512 Reader SOF OFh CRC CRCy EOF SRT512 No Response Al13511b Doc ID 13277 Rev 5 ky SRT512 SRT512 commands 8 6 Reset_to_inventory command Command code 0Ch On receiving the Reset_to_inventory command all SRT512 devices in Selected state revert to Inventory state The concerned SRT512 devices are thus resubmitted to the anticollision sequence This command is useful when two SRT512 devices with the same 8 bit Chip_ID happen to be in Selected state at the same time Forcing them to go through the anticollision sequence again allows the reader to generates new Pcall16 commands and so to set new random Chip IDs The Reset to inventory command d
27. ith the least significant bit first The SRT512 must have received a Select command and be switched to Selected state before any Get_UID command can be accepted All Get_UID commands sent to the SRT512 before a Select command is issued are ignored Figure 46 Get_UID request format SOF Get UID CRC CRCH EOF OBh 8 bits 8 bits Request parameter e No parameter Figure 47 Get_UID response format Al07693b SOF UIDO UID1 UID 2 UID3 UID4 UID5 UID 6 UID7 CRCL 8 bits 8 bits 8 bits 8 bits 8 bits 8 bits 8blts 8blits 8 bits CRCH EOF 8 bits Al07694 Response parameters e UID 0 Less significant UID byte e UID 1 to UID 6 UID bytes e UID 7 Most significant UID byte Doc ID 13277 Rev 5 SRT512 SRT512 commands 8 10 Unique identifier UID Members of the SRT512 family are uniquely identified by a 64 bit unique identifier UID This is used for addressing each SRT512 device uniquely after the anticollision loop The UID complies with ISO IEC 15963 and ISO IEC 7816 6 It is a read only code and comprises as summarized in Figure 48 e an 8 bit prefix with the most significant bits set to DOh e an 8 bit IC manufacturer code ISO IEC 7816 6 AM1 set to 02h for STMicroelectronics e a6 bit IC code set to 00 1100b 12d for SRT512 e a42 bit unique serial number Figure 48 64 bit unique identifier of SRT512 Most significant bits Least significant bi
28. its 8 bits Al07671 Response parameter e Chip ID of the SRT512 Figure 24 Initiate frame exchange between reader and SRT512 Reader SOF 06h 00h CRC CRCy EOF SRT512 lt to gt lt ty gt SOF Chip ID CRC CRCy EOF Al13507b Doc ID 13277 Rev 5 ky SRT512 SRT512 commands 8 2 Pcall16 command Command code 06h 04h The SRT512 must be in Inventory state to interpret the Pcall16 command On receiving the Pcall16 command the SRT512 first generates a new random Chip_slot_number value in the 4 least significant bits of the Chip_ID Chip_slot_number can take on a value between 0 an 15 1111 The value is retained until a new Pcall16 or Initiate command is issued or until the SRT512 is powered off The new Chip slot number value is then compared with the value 00004 If they match the SRT512 returns its Chip_ID value If not the SRT512 does not send any response The Pcall16 command used together with the Slot_marker command allows the reader to search for all the Chip_IDs when there are more than one SRT512 device in Inventory state present in the reader field range Figure 25 Pcall16 request format SOF Pcall16 CRCL CRCH EOF 06h 04h 8 bits 8 bits Al07673b Request parameter e No parameter Figure 26 Pcall16 response format SOF Chip ID CRC CRCH EOF 8 bits 8 bits 8 bits A107671
29. l16 command the Chip slot number is given a new 4 bit random value If the new value is 0000 the SRT512 returns its whole 8 bit Chip ID in its answer to the Pcall16 command The Pcall16 command is also used to define the slot number 0 of the anticollision sequence When the SRT512 receives the Slot marker SN command it compares its Chip slot number with the Slot number parameter SN If they match the SRT512 returns its Chip ID as a response to the command If they do not the SRT512 does not answer The Slot marker SN command is used to define all the anticollision slot numbers from 1 to 15 Doc ID 13277 Rev 5 23 46 SRT512 Ision Anticoll Ision sequence Description of a possible anticoll Figure 20 68SE LIV aaa aia aa aaa ata at aaa eui uoisi oo JOMSUY T uoisi oo ON ON ISI109 ON juswwog Cy ha O a AI ha O AI ha 0 Gu ga gt lt gt lt gt s 9 4 P LYS St Ja 3 Jexew O O jos S S emm gt SL 1018 N10IS Z101S Jopeoy ID means a random hexadecimal character from 0 to F The value X in the answer Chip_ 1 Doc ID 13277 Rev 5 24 46 SRT512 Anticollision 7 1 Description of an anticollision sequence The anticollision sequence is initiated by the Initiate command which triggers all the SRT512 devices that are present in the reader field range and that are in Inventory state Only SRT512 devices in Inventory stat
30. lect response format 31 Select frame exchange between reader and SRT512 31 Completion request format 32 Completion response format 32 Completion frame exchange between reader and SRT512 32 Reset to inventory request format 33 Reset to inventory response format 33 Reset to inventory frame exchange between reader and SRT512 33 Read block request format 34 Read block response format 34 Read block frame exchange between reader and SRT512 34 Write block request format 35 Write block response format 35 Write block frame exchange between reader and SRT512 35 Get UID request format 36 Get UID response format anaana 36 64 bit unique identifier of SRT512 37 Doc ID 13277 Rev 5 5 46 List of figures SRT512 Figure 49 Figure 50 Figure 51 Figure 52 Figure 53 Figure 54 Figure 55 Figure 56 Figure 57 Fig
31. ming time for write With auto erase cycle 5 ime EEPROM Binary counter decrement T ms 1 All timing measurements were performed on a reference antenna with the following characteristics Number of turn 3 O a 0 4 mm Value of the coil 1 4 UH Tuning Frequency 14 4 MHz Doc ID 13277 Rev 5 39 46 DC and AC parameters SRT512 Figure 50 SRT512 synchronous timing transmit and receive ASK Modulated signal from the Reader to the Contactless device FRAME Transmission between the reader and the contactless device ti toa FRAME Transmitted by SRT512 in BPSK to Data jitter on FRAME Transmitted by the reader in ASK lr tur tur tur tyr START j l l l PAA terseL trese tress tress mrsBL Ai13516b 40 46 Doc ID 13277 Rev 5 a SRT512 Part numbering 11 Part numbering Table 9 Ordering information scheme Example SRT512 W4 1GE Device type SRT512 Package W4 180 um 15 um unsawn wafer SBN18 180 um 15 um bumped and sawn wafer on 8 inch frame Customer code 1GE generic product Xxx customer code after personalization Note Devices are shipped from the factory with the memory content bits erased to 1 For a list of available options speed package etc or for further information on any aspect of this device please contact your nearest ST sales office ky Doc ID 13277 Rev 5 41 46 1S01 4443 type B CRC
32. n at any time without notice All ST products are sold pursuant to ST s terms and conditions of sale Purchasers are solely responsible for the choice selection and use of the ST products and services described herein and ST assumes no liability whatsoever relating to the choice selection or use of the ST products and services described herein No license express or implied by estoppel or otherwise to any intellectual property rights is granted under this document If any part of this document refers to any third party products or services it shall not be deemed a license grant by ST for the use of such third party products or services or any intellectual property contained therein or considered as a warranty covering the use in any manner whatsoever of such third party products or services or any intellectual property contained therein UNLESS OTHERWISE SET FORTH IN ST S TERMS AND CONDITIONS OF SALE ST DISCLAIMS ANY EXPRESS OR IMPLIED WARRANTY WITH RESPECT TO THE USE AND OR SALE OF ST PRODUCTS INCLUDING WITHOUT LIMITATION IMPLIED WARRANTIES OF MERCHANTABILITY FITNESS FOR A PARTICULAR PURPOSE AND THEIR EQUIVALENTS UNDER THE LAWS OF ANY JURISDICTION OR INFRINGEMENT OF ANY PATENT COPYRIGHT OR OTHER INTELLECTUAL PROPERTY RIGHT UNLESS EXPRESSLY APPROVED IN WRITING BY TWO AUTHORIZED ST REPRESENTATIVES ST PRODUCTS ARE NOT RECOMMENDED AUTHORIZED OR WARRANTED FOR USE IN MILITARY AIR CRAFT SPACE LIFE SAVING OR LIFE SUSTAINING APPLICATIO
33. n this state until an Initiate command is issued Any other command will be ignored by the SRT512 Inventory state The SRT512 switches from the Ready to the Inventory state after an Initiate command has been issued In Inventory state the SRT512 will respond to any anticollision commands Initiate Pcall16 and Slot_marker and then remain in the Inventory state It will switch to the Selected state after a Select Chip ID command is issued if the Chip ID in the command matches its own If not it will remain in Inventory state Selected state In Selected state the SRT512 is active and responds to all Read_block Write_block and Get_UID commands When an SRT512 has entered the Selected state it no longer responds to anticollision commands So that the reader can access another tag the SRT512 can be switched to the Deselected state by sending a Select Chip_ID2 with a Chip_ID that does not match its own or it can be placed in Deactivated state by issuing a Completion command Only one SRT512 can be in Selected state at a time Deselected state Once the SRT512 is in Deselected state only a Select Chip_ID command with a Chip_ID matching its own can switch it back to Selected state All other commands are ignored Deactivated state When in this state the SRT512 can only be turned off All commands are ignored Doc ID 13277 Rev 5 21 46 SRT512 states SRT512 22 46 Figure 18 State transition diagram
34. oes not generate a response All SRT512 devices that are not in Selected state ignore the Reset to inventory command Figure 37 Reset to inventory request format SOF Reset to inventory CRC CRCH EOF OCh 8 bits 8 bits Al07682b Request parameter e No parameter Figure 38 Reset to inventory response format No Response Al07680 Figure 39 Reset to inventory frame exchange between reader and SRT512 Reader SOF OCh CRC CRCH EOF SRT512 No Response Al13512b Doc ID 13277 Rev 5 33 46 SRT512 commands SRT512 8 7 34 46 Read_block Addr command Command code 08h On receiving the Read_block command the SRT512 reads the desired block and returns the 4 data bytes contained in the block Data bytes are transmitted with the Least Significant byte first and each byte is transmitted with the least significant bit first The address byte gives access to the 16 blocks of the SRT512 addresses 0 to 15 Read_block commands issued with a block address above 15 will not be interpreted and the SRT512 will not return any response except for the System area located at address 255 The SRT512 must have received a Select command and be switched to Selected state before any Read_block command can be accepted All Read_block commands sent to the SRT512 before a Select command is issued are ignored Figure 40 Read_block request format SOF Re
35. p ID Chip ID Chip ID Chip Ip Comments READY State 28h 75h 40h 01h 02h FEh Agh 7Ch Each tag gets a random Chip ID Each tag get a new random Chip ID INITIATE 0 40h 13h 3Fh 4Ah 50h 48h 52h 7Ch All tags answer collisions 45h 12h 30h 43h 55h 43h 53h 73h All CHIP_SLOT_NUMBERs get PCALL16 anew random value 30h Slot0 only one answer SELECT 30h 30h Tag3 is identified SLOT_MARKER 1 Slot1 no answer SLOT_MARKER 2 12h Slot2 only one answer SELECT 12h 12h Tag2 is identified SLOT_MARKER 3 43h 43h 53h 73h Slot3 collisions SLOT_MARKER 4 Slot4 no answer SLOT_MARKER 5 45h 55h Slot5 collisions SLOT_MARKER 6 Slot6 no answer SLOT_MARKER N SlotN no answer SLOT_MARKER F SlotF no answer 40h 41h 53h 42h 50h 74h All CHIP SLOT NUMBERS get PCALL16 anew random value 40h 50h Slot0 collisions SLOT_MARKER 1 41h Slot1 only one answer SELECT 41h 41h Taga is identified SLOT_MARKER 2 42h Slot2 only one answer SELECT 42h 42h Tag6 is identified SLOT MARKER 3 53h Slot3 only one answer SELECT 53h 53h Tagb5 is identified SLOT MARKER 4 74h Slot4 only one answer SELECT 74h 74h Tag8 is identified SLOT MARKER N SlotN no answer 41h 50h All CHIP_SLOT_NUMBERs get PCALL16 anew random value 50h Slot0 only one answer SELECT 50h 50h Tag7 is identified SLOT_MARKER 1 Ath Slot1 only one answer but already found for tag4 SLOT_MARKER N SlotN no answer 43h All CHIP_SLOT_NUMBERs get PCALL16 a new random value Slot0 only one answer SLOT_MARKE
36. rs located at block addresses 5 and 6 respectively are used to count down from 232 4096 million to 0 The SRT512 uses dedicated logic that only allows the update of a counter if the new value is lower than the previous one This feature allows the application to count down by steps of 1 or more The initial value is FFFF FFFEh in counter 5 and FFFF FFFFh in counter 6 When the value displayed is 0000 0000h the counter is empty and cannot be reloaded The counter is updated by issuing the Write_block command to block address 5 or 6 depending on which counter is to be updated The Write_block command writes the new 32 bit value to the counter block address Figure 15 shows examples of how the counters operate The counter programming cycles are protected by automated antitearing logic This function allows the counter value to be protected in case of power down within the programming cycle In case of power down the counter value is not updated and the previous value continues to be stored Blocks 5 and 6 can be write protected using the OTP_Lock_Reg bits block 255 Once a block has been protected its contents cannot be modified A protected counter block behaves like a ROM block Figure 14 Binary counter addresses 5 to 6 Block MSb 32 bit block LSb Description address b31 b16 b15 b14 b8 b7 bO 5 aai 32 bit binary counter Count down 6 counter 32 bit binary counter ai12384b ky Doc ID 13277 Rev 5 15 46
37. sfer 3 2 3 2 1 3 2 2 Output data transfer from SRT512 to reader answer frame The data bits issued by the SRT512 use back scattering Back scattering is obtained by modifying the SRT512 current consumption at the antenna load modulation The load modulation causes a variation at the reader antenna by inductive coupling With appropriate detector circuitry the reader is able to pick up information from the SRT512 To improve load modulation detection data is transmitted using a BPSK encoded 847 kHz subcarrier frequency f as shown in Figure 7 and as specified in the ISO 14443 2 Type B standard Figure 7 Wave transmitted using BPSK subcarrier modulation NINENANNANA JUUUUU NUL 847 kHz BPSK Modulation Data Bit to be Transmitted to the Reader Generated by the SRT512 lt Q D BPSK Modulation at 847 kHz During a One bit Data Transfer Time 1 106 kHz Al13504b Character transmission format for answer frame The character format is the same as for input data transfer Figure 4 The transmitted frames are made up of an SOF data a CRC and an EOF Figure 10 As with an input data transfer if an error occurs the reader does not issue an error code to the SRT512 but it should be able to detect it and manage the situation The data transfer rate is 106 Kbits second Answer start of frame The
38. swer start of frame ees 11 3 2 3 Answer end of frame 12 3 3 Transmission frame 12 3 4 pA et aa he E 13 4 Memory mapping sus ua ee cc ss 0 mat mate RR OR Ranma 14 4 1 EEPROM area an Eben sia eset hae AAA 15 4 2 32 bit binary counters 24524 0025 2 a3 ace aa 15 4 3 EEPROM area iv isis ka ida R Ras DSR OEE 17 44 System arba 2340 LS NE VOL ibarra ER EE tirer 18 4 4 1 OTP Lok Beg eg ER ibe Menara stand 18 4 4 2 Fixed Chip ID Option 19 5 SRT512 operation XA arras XR wen WK WA WAG 20 6 SRT512 STATES issue dr da T REA es 21 6 1 Power ott State sois adria Voca ee d eX dte a 21 6 2 Ready State npa putero Edad auper NG 21 6 3 Inventory c Pcr 21 6 4 Selected A 21 6 5 Deselected state 21 2 46 Doc ID 13277 Rev 5 ky SRT512 Contents 6 6 Deactivated state orar ode wes ORES de 21 7 Anti collislOh 4 4e Row RUE a eres 23 7 1 Description of an anticollision sequence 25 8 SHT512 commands ssaecsosarkaund rao EAR RES E RRERR RA RE 27 8 1 Initiatet COMMAND s edes e E Peck e bep ick Pedes S bead tap s 28 8 2 Peall TOO command egreso A poo der os 29 8 3 Slot marker SN command 30 8 4 Select Chip ID command n naana 31 8 5 Completion command ee 32 8 6 Reset
39. tion the SRT512 must have been selected by a Select command Each frame transmitted to the SRT512 must start with a start of frame followed by one or more data characters two CRC bytes and the final end of frame When an invalid frame is decoded by the SRT512 wrong command or CRC error the memory does not return any error code When a valid frame is received the SRT512 may have to return data to the reader In this case data is returned using BPSK encoding in the form of 10 bit characters framed by an SOF and an EOF The transfer is ended by the SRT512 sending the 2 CRC bytes and the EOF Doc ID 13277 Rev 5 ky SRT512 SRT512 states 6 6 1 6 2 6 3 6 4 6 5 6 6 SRT512 states The SRT512 can be switched into different states Depending on the current state of the SRT512 its logic will only answer to specific commands These states are mainly used during the anticollision sequence to identify and to access the SRT512 in a very short time The SRT512 provides 6 different states as described in the following paragraphs and in Figure 18 Power off state The SRT512 is in Power off state when the electromagnetic field around the tag is not strong enough In this state the SRT512 does not respond to any command Ready state When the electromagnetic field is strong enough the SRT512 enters the Ready state After Power up the Chip_ID is initialized with a random value The whole logic is reset and remains i
40. to inventory command 33 8 7 Read_block Addr command 3 a cer Rr RR ERE RES 34 8 8 Write block Addr Data command 35 89 Gel UID command css cess rra RERO YR RE GR REOR A 36 8 10 Power on state sus sas sed e AUR KG bee RR ak put oC dor d 37 9 Maximum rating uisus ne ko Re rino ete DC RT a ent 6 38 10 DC and AC parameters sisi ec yn 39 11 Part numbering iio a RE REC TR ON NR ea eee ees 41 Appendix A ISO14443 type B CRC calculation 42 Appendix B SRT512 command brief 43 REVISION DISIOFV usd ka AA A eee ee Reese wwe 45 ky Doc ID 13277 Rev 5 3 46 List of tables SRT512 List of tables Table 1 Table 2 Table 3 Table 4 Table 5 Table 6 Table 7 Table 8 Table 9 Table 10 4 46 Signal names awa a bart a pum Peed A 7 BitOSCriptiOms 24522 tic a a oad SE kam oe ak eae 10 Standard anticollision sequence 25 Command code coo 27 Absolute maximum ratings e n 38 Operating conditions 39 DC characteristics 2 sus see sed ee ti KPA WAL VE EUR ee ee 39 AC characteristics pipron a s ai a ea k ha hr 39 Ordering information scheme 41 Document revision history 45 Doc ID 13277 Rev 5 ky
41. ts 63 55 47 1 0 4 Unique Serial Number Al14080 Figure 49 Get_UID frame exchange between reader and SRT512 S E lt p gt eto UID UID UID UID UID UID UID UID cnc CRCH O F0 1 2 3 4 5 6 7 E Al13515b S E Reader O 0Bh CRC CRCHO F F SRT512 Power on state After power on the SRT512 is in the following state e ltisinthe low power state e ltisin Ready state e lt shows highest impedance with respect to the reader antenna field e lt will not respond to any command except Initiate Doc ID 13277 Rev 5 37 46 Maximum rating SRT512 9 38 46 Maximum rating Stressing the device above the rating listed in the absolute maximum ratings table may cause permanent damage to the device These are stress ratings only and operation of the device at these or any other conditions above those indicated in the operating sections of this specification is not implied Exposure to absolute maximum rating conditions for extended periods may affect device reliability Refer also to the STMicroelectronics SURE Program and other relevant quality documents Table 5 Absolute maximum ratings Symbol Parameter Min Max Unit 15 25 C Tere Storage conditions big SIME terc kept in its antistatic bag 23 months lec Supply current on ACO AC1 20 20 mA Vmax Input voltage on ACO AC1 7 7 V Machine modell 100 100 Vesp Electrostatic discharge voltage Human body model 100
42. ure 58 Figure 59 6 46 Get UID frame exchange between reader and SRT512 37 SRT512 synchronous timing transmit and receive 40 Initiate frame exchange between reader and SRT512 43 Pcall16 frame exchange between reader and SRT512 43 Slot marker frame exchange between reader and SRT512 43 Select frame exchange between reader and SRT512 43 Completion frame exchange between reader and SRT512 43 Reset to inventory frame exchange between reader and SRT512 44 Read block frame exchange between reader and SRT512 44 Write block frame exchange between reader and SRT512 44 Get UID frame exchange between reader and SRT512 44 Doc ID 13277 Rev 5 ky SRT512 Description 1 Description The SRT512 is a contactless memory powered by an externally transmitted radio wave It contains a 512 bit user EEPROM The memory is organized as 16 blocks of 32 bits The SRT512 is accessed via the 13 56 MHz carrier Incoming data are demodulated and decoded from the received amplitude shift keying ASK modulation signal and outgoing data are generated by load variation using bit phase shift keying BPSK coding of a 847 kHz subcarrier The received ASK wave is 10 modulated The data transf
43. zed as 16 blocks of 32 bits as shown in Table 12 All blocks are accessible by the Read_block command Depending on the write access they can be updated by the Write_block command A Write_block updates all the 32 bits of the block Figure 12 SRT512 memory mapping Block MSB 32 bit block LSB Desciiation Addr lbs big bis b44 bg b bo 0 User area 1 User area lockable 2 User area EEPROM 3 User area 4 User area 5 32 bits binary counter Count down 6 32 bits binary counter counter 7 User area 8 User area 9 User area 10 User area Lockable 11 User area EEPROM 12 User area 13 User area 14 User area 15 User area 255 OTP Lock Reg 1 ST Reserved ier System OTP bits UIDO 64 bits UID area ROM UID1 14 46 Doc ID 13277 Rev 5 ky SRT512 Memory mapping 4 1 EEPROM area Blocks 0 to 4 define a User area They behave as standard EEPROM blocks like blocks 7 to 15 as described in Figure 13 Each block can be individually write protected using the OTP_Lock_Reg bits of the system area Once a block has been protected it can no longer be unprotected Figure 13 Lockable EEPROM area addresses 0 to 4 Block MSb 32 bit block LSb Description address 53 b16 b15 b14 b8 b7 bo 0 User area 1 User area Lockable 2 User area EEPROM User area User area ai12382b 4 2 32 bit binary counters The two 32 bit binary counte
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ST SRT512 13.56 MHz short range contactless memory chip with 512 bit EEPROM anticollision functions