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ST TDA2822D handbook

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1. 5 o v Gv N VR Cs HL 169 Ri 8Q HL 49 Rs 10kQ B Curve A Rs 10kQ_ B 22Hz to 22KHz Jf 3 6 TDA2822D Figure 3 Supply Voltage Rejection vs Fre quency ll Bill L laas IS N L IE G 6150 Has 10 10 104 Hz Figure 5 Total Power Dissipation vs Output Power Bridge Ptat N31TDR28220 84 4 6 Figure 4 Output Power vs Supply Voltage THD 10 f 1KHz Stereo M31TDA2822D 81 Figure 6 Total Power Dissipation vs Output Power Bridge Ptot N3ITDAZB 220 95 daie TT Fa KHZ Sllr SAH TDA2822D OUTLINE AND MECHANICAL DATA en G a rae I Tas foes ras oss oes oo Toa Ce oa ow Looe ao 0 19 0 25 0 007 0 010 0 25 0 5 0 010 0 020 45 typ ala p Tee fea Tan e se 62 Joze oz S e C HHH Tom Fajs Tao los Tos Poe ar one foo M 0 024 S 8 max 1 D and F do not include mold flash or protrusions Mold flash or potrusions shall not exceed 0 15mm 006inch TDA2822D Information furnished is believed to be accurate and reliable However STMicroelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use No license is granted by implication or otherwise under any patent or patent rights of STMicro
2. 177 TDA2822D DUAL LOW VOLTAGE POWER AMPLIFIER a SUPPLY VOLTAGE DOWN TO 1 8V a LOWCROSSOVER DISTORTION a LOW QUIESCENT CURRENT a BRIDGE OR STEREO CONFIGURATION DESCRIPTION The TDA2822D is a monolithic integrated circuit S08 in 8 lead SO 8 package It is intended for use as dual audio power amplifier in portable cassette ORDERING NUMBER TDA2822D players radios and CD players ABSOLUTE MAXIMUM RATINGS C APPLICATION CIRCUIT 32 16 0 HE ADPHONE 4 79 5 613271 September 2003 1 6 TDA2822D PIN CONNECTION Top view 8 input cn 7 llinpur u 6 JINPUT 2 s Jinput 2 THERMAL DATA Symbol Description Value Unit Thermal Resistance Junction ambient Max 200 Figure 1 Stereo Application and Test Circuit 2 6 4 TDA2822D ELECTRICAL CHARACTERISTICS Vs 6V Tamb 25 C unless otherwise specified STEREO Test circuit of fig 1 Symbol Test Condition V V G A e S Supply Voltage Total Quiescent Drain Current Quiescent Output Voltage Input Bias Current Output Power each channel f 1KHz d 10 300 120 60 20 5 110 Input Resistance f tKHz Jiof Br 30 50 E c 24 Cs Channel Separation fe KHz BRIDGE Test circuit of fig 2 Supply Voltage E ere 5 Total Quiescent Drain Current Output Offset Voltage between R 80 the outputs Input Bias Current Output Power f 1KHz d 10
3. electronics Specifications mentioned in this publication are subject to change without notice This publication supersedes and replaces all information previously supplied STMicroelectronics products are not authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics The ST logo is a registered trademark of STMicroelectronics All other names are the property of their respective owners 2003 STMicroelectronics All rights reserved STMicroelectronics GROUP OF COMPANIES Australia Belgium Brazil Canada China Czech Republic Finland France Germany Hong Kong India Israel Italy Japan Malaysia Malta Morocco Singapore Spain Sweden Switzerland United Kingdom United States www st com 6 6 G

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