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ST 54VCXH162245 Rad hard low voltage CMOS 16-bit bus buffer transceiver (3-state) with 3.6 V tolerant inputs outputs handbook

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1. Table 6 DC specifications Test condition Value Symbol Parameter Vec 55 to 125 C Unit v Min Max Vin High level input voltage 1 6 2 3 to 2 7 V Vit Low level input voltage 0 7 2 3 to 2 7 lo 100 pA Vec 0 2 lo 4 mA 2 0 Vou High level output voltage V 2 3 lo 6 mA 1 8 lo 8 mA 1 7 2 3 to 2 7 lo 100 uA 0 2 Vor Low level output voltage lo 6 mA 0 4 V 2 3 lo 8 mA 0 6 l Input leakage current 2 3 to 2 7 Vi Vcc or GND 5 HA kab Vi lt 0 7 V 45 l Input hold current 2 3 u KROES Ve1i7V 45 Power off leakage z loff current 0 VI or Vo 0to3 6V 10 uA High impedance output Vi Vin or Vit M loz leakage current ad Vo 0t03 6V HA i Vi Vec or GND 20 Icc Quiescent supply 23t027 LA current VI or Vo Voc to 3 6V 20 Doc ID 10632 Rev 9 9 19 Electrical characteristics 54VCXH162245 Ta 25 C Input t t 2 0 ns C 30 pF Ry 500 Q Table 7 Dynamic switching characteristics Test condition Value Symbol Parameter Voc Ta 25 C Unit Vv Min Typ Max v Dynamic peak low voltage 2 5 V OV 7 0 6 7 v OLP quiet output A to B 33 Vin Vcc 0 8 V Dynamic peak low voltage 2 5 V OV E 0 25 7 v OLP quiet output B to A 3 3 Vin Vcc 1035 v Dynamic valley low voltage 2 5 V OV 7 0 6 7 V OLV quiet output A to B 33 Vin Vcc i 0 8 R v Dynamic valley low voltage 2 5 Vit OV i 0 25 g v OLV
2. GI 54VCXH162245 Rad hard low voltage CMOS 16 bit bus buffer transceiver 3 state with 3 6 V tolerant inputs and outputs Features 1 65 to 3 6 V inputs and outputs m High speed A outputs tpp 3 4 ns at Vcc 3 0 to 3 6 V tpp 4 3 ns at Vcc 2 3 to 2 7 V R Symmetrical impedance A output lon lo 12mA Min at Voc 3 0V Iloyl lop 8 MA Min at Veg 2 3 V m High speed B outputs tpp 2 5 ns Max at Vcc 3 0 to 3 6 V tpp 3 2 ns Max at Vcc 2 3 to 2 7 V m Symmetrical impedance A output lon lo 24mA Min at Voc 3 0V lok lo 18 mA Min at Vec 2 3V m Power down protection on inputs and outputs m 260 serie resistors in A port output m Operating voltage range Vec Opr 1 65 V to 3 6 V m Pin and function compatible with 54 series H162245 m Bus hold provided on both sides m Cold spare function m Latch up performance exceeds 300 mA JESD 17 m ESD performance HBM gt 2000 V MIL STD 883 method 3015 MM gt 200 V m 300 krad Mil1019 6 condition A RHA QML qualification extension undergone m No SEL no SEU and no SET under 110 Mev cm2 mg LET heavy ions irradiation m QML qualified product m Device fully compliant with DSCC SMD 5962 02508 m 100 mV typical Input hysteresis July 2011 Flat 48 The upper metallic lid is not electrically connected to any pins nor to the IC die inside the package Description The 54VCXH1
3. 9 A 520350 4 19 Doc ID 10632 Rev 9 I 54VCXH162245 Pin settings 2 2 Pin description Table 1 Pin description Pin n Symbol Name and function 1 1DIR Directional control 2 3 5 6 8 9 11 12 1B1 to 1B8 Data inputs outputs 13 14 16 17 19 20 22 23 2B1 to 2B8 Data inputs outputs 24 2DIR Directional control 25 2G Output enable input 36 35 33 32 30 29 27 26 2A1 to 2A8 Data inputs outputs 47 46 44 43 41 40 38 38 1A1 to 1A8 Data inputs outputs 48 1G Output enable input 4 10 15 21 28 34 39 45 GND Ground 0 V 7 18 31 42 Voc Positive supply voltage 2 3 Truth table Table 2 Truth table Inputs Function Output G DIR A bus B bus Yn L output input A B L H input output B A H Z Z Z Note X Do not care Z High Impedance ky Doc ID 10632 Rev 9 5 19 Maximum rating 54VCXH162245 3 6 19 Maximum rating Stressing the device above the rating listed in the absolute maximum ratings table may cause permanent damage to the device These are stress ratings only and operation of the device at these or any other conditions above those indicated in the operating sections of this specification is not implied Exposure to absolute maximum rating conditions for extended periods may affect device reliability Table 3 Absolute maximum rati
4. quiet output US B to A 3 3 Vin Vcc l o35 v Dynamic y high voltage 2 5 Vit OV 7 1 9 7 v OHV quiet output 2 A to B 3 3 Vin Vcc i 22 v Dynamic valley high voltage 2 5 Vii OV 2 05 7 v OHV quiet output 2 B to A 3 3 Vin Voc 265 10 19 1 Number of outputs defined as n Measured with n 1 outputs switching from HIGH to LOW or LOW to HIGH The remaining output is measured in the LOW state Parameters guaranteed by design 3 Number of outputs defined as n Measured with n 1 outputs switching from HIGH to LOW or LOW to HIGH The remaining output is measured in the HIGH state Doc ID 10632 Rev 9 4 54VCXH162245 Electrical characteristics C 30 pF R 500 Q Input t tj 2 0 ns Table 8 AC electrical characteristics Test condition Value Symbol Parameter Vec 55 to 125 C Unit v Min Max E Propagation delay 2 3 to 2 7 1 0 4 0 S PLH PHL time A to B 3 0 to 3 6 08 36 id Propagation delay 2 3 to 2 7 1 0 4 9 m PLH PHL time B to A 3 01036 an ae n Output enable time 2 3 to 2 7 1 0 5 8 g P PZH A to B 3 0 to 3 6 0 8 43 sd Output enable time 2 3 to 2 7 1 0 6 8 SA pA PZH B to A 3 0 to 3 6 0 8 48 L Output disable time 2 3 to 2 7 1 0 4 8 m PE PHZ AtoB 3 0 to 3 6 0 8 56 Er Output disable time B 2 3 to 2 7 1 0 5 7 Fa PEE PHE to A 3 0 to 3 6 0 8 7 0 Output to output s
5. 04 2 Data on range 40 to 85 C removed on Tables 6 7 8 9 17 May 2005 3 Mechanical data has been updated 19 Jun 2006 4 300 Krad bullet updated new template mechanical data updated 11 Apr 2007 5 Updated coverpage features 27 Jul 2007 6 Typo in Table 12 on page 15 17 Sep 2008 7 Updated cover page 23 Sep 2009 8 Updated Table 13 on page 17 29 Jul 2011 9 Added Note on page 16 and in the Pin connections diagram on the coverpage Doc ID 10632 Rev 9 54VCXH162245 Please Read Carefully Information in this document is provided solely in connection with ST products STMicroelectronics NV and its subsidiaries ST reserve the right to make changes corrections modifications or improvements to this document and the products and services described herein at any time without notice All ST products are sold pursuant to ST s terms and conditions of sale Purchasers are solely responsible for the choice selection and use of the ST products and services described herein and ST assumes no liability whatsoever relating to the choice selection or use of the ST products and services described herein No license express or implied by estoppel or otherwise to any intellectual property rights is granted under this document If any part of this document refers to any third party products or services it shall not be deemed a license grant by ST for the use of such third party products or services or any intellectual property contai
6. 2 0 15 0 18 0 005 0 006 0 007 D 15 57 15 75 15 92 0 613 0 620 0 627 9 52 9 65 9 78 0 375 0 380 0 385 E2 6 22 6 35 6 48 0 245 0 250 0 255 E3 1 52 1 65 1 78 0 060 0 065 0 070 e 0 635 0 025 f 0 20 0 008 L 6 85 8 38 9 40 0 270 0 330 0 370 Q 0 66 0 79 0 92 0 026 0 031 0 036 S1 0 25 0 43 0 61 0 010 0 017 0 024 ky Doc ID 10632 Rev 9 15 19 Package mechanical data 54VCXH162245 Figure 7 Package dimension o E L A e N 2 Places gg r s1 v paras N K Des 24 25 E3 E2 E3 gt gt 7330585B Note The upper metallic lid is not electrically connected to any pins nor to the IC die inside the package Connecting unused pins or metal lid to ground or to the power supply will not affect the electrical characteristics 16 19 Doc ID 10632 Rev 9 ST 54VCXH162245 Order codes 8 Order codes Table 13 Ordering information ae Flight models Package oe i il ir tras Engineering model Packing voltage Inis eve QML V 48 pin flat 1 8 V kn q 300 krad RHFXH162245KO3V RHRXH162245K1 Conductive strip pack Doc ID 10632 Rev 9 17 19 Revision history 54VCXH162245 9 18 19 Revision history Table 14 Document revision history Date Revision Changes 06 Jul 2004 1 First release 19 Jul 20
7. 62245 is a low voltage CMOS 16 bit bus transceiver 3 state fabricated with sub micron silicon gate and five layer metal wiring C2MOS technology It is ideal for low power and very high speed 1 65 to 3 6 V applications it can be interfaced to 3 6 V signal environment for both inputs and outputs This IC is intended for two way asynchronous communication between data buses the direction of data transmission is determined by DIR input The two enable inputs nG can be used to disable the device so that the buses are effectively isolated The device circuits is including 26 Q series resistance in the A port outputs These resistors permit to reduce line noise in high speed applications Bus hold on data inputs is provided in order to eliminate the need for external pull up or pull down resistor All inputs and outputs are equipped with protection circuits against static discharge giving them 2 kV ESD immunity and transient excess voltage All floating bus terminals during high Z state must be held HIGH or LOW Doc ID 10632 Rev 9 1 19 www st com Contents 54VCXH162245 Contents 1 Logic symbols and I O equivalent circuit xs x x x e e e e ee 3 2 PIN SGUINGS 5253 XX RR R RRR R R NN NN RR RKR R TR ee R ee d 2 1 Pin conneetion lt u x ussa VAR lA heste veda keen ge KA Ara 4 2 2 Pin description s naga ene GE ere Mawes es 5 2 3 Trutht bl 2 she ke preke Jang ere Hae ekg Sak awe eee Kasias 5 3 Maximum rating sss
8. e e x x x x x x x x x K K see R 6 3 1 Recommended operating conditions nrk 7 4 Electrical characteristics 00 cece eee eee 8 5 Test ClheUll nsi Rg 0 NR N RN R N keen 12 6 Waveforms 5 05 ett eee n er wee a ra N aT EE REOT a 13 7 Package mechanical data 000 eee 15 8 Order codes sxs 560000 S RR RRR eR RR RRR N Ee RRR RRR ERE SE 17 9 Revision history asssssesssesssmnme sd ker ker ren 18 2 19 Doc ID 10632 Rev 9 ST 54VCXH162245 Logic symbols and I O equivalent circuit 1 Logic symbols and I O equivalent circuit Figure 1 IEC logic symbols 139 7 fo 1A1 al B1 3 5 6 8 9 11 12 LC13561 Figure 2 Input and output equivalent circuit Ver Oo 7 OVERVOLT An Bn Inputs CONTROL Control Inputs 1 0 O CH O I ESD A ESD 1 A La PROTEC PROTEC be GND GND GND GND GND GND 5C13700 Doc ID 10632 Rev 9 3 19 Pin settings 54VCXH162245 2 2 1 Pin settings Pin connection Figure 3 Pin connection top through view DIR 1 EE 00 Nm Al a DE l a N L BE F s 4 Vy all lA yy AA i
9. eplaces all information previously supplied The ST logo is a registered trademark of STMicroelectronics All other names are the property of their respective owners 2011 STMicroelectronics All rights reserved STMicroelectronics group of companies Australia Belgium Brazil Canada China Czech Republic Finland France Germany Hong Kong India Israel Italy Japan Malaysia Malta Morocco Philippines Singapore Spain Sweden Switzerland United Kingdom United States of America www st com ky Doc ID 10632 Rev 9 19 19
10. kew 2 3 to 2 7 0 5 tosLH tOSHL time 1 2 RT ns 1 Skew is defined as the absolute value of the difference between the actual propagation delay for any two outputs of the same device switching in the same direction either HIGH or LOW tog _y tprHm tPLhn tosHL tpHim tpHLnl 2 Parameter guaranteed by design Table 9 Capacitive characteristics Test condition Value Symbol Parameter Ta 25 C Unit y Vec A v Min Typ Max Cin Input capacitance 2 50r3 3 Vin 0 or Vec 4 pF Cour Output capacitance 2 50r3 3 Vin 0 or Vec 8 pF Power dissipation fin 10 MHz Cpp capacitance 2 0 0r 3 9 Vin 0 or Vec BF 1 Cpp is defined as the value of the IC s internal equivalent capacitance which is calculated from the operating current consumption without load Refer to test circuit Average operating current can be obtained by the following equation Icc opr Opp X Vcc X fin Icc 16 per circuit ky Doc ID 10632 Rev 9 11 19 54VCXH162245 Test circuit 5 Test circuit Figure 4 Test circuit Vcc O BV or 2Vec O OPEN PULSE O GND en SC11690 Table 10 Test circuit Test Switch tp tPHL Open tpzp tpLz Vec 3 0 to 3 6 V 6V Iez tpLz Vec 2 3 to 2 7 V 2Vcc tpzH Teuz GND C 30 pF or equivalent includes jig and probe capacitance R R4 500 2 or equivalent RY Z
11. ned therein or considered as a warranty covering the use in any manner whatsoever of such third party products or services or any intellectual property contained therein UNLESS OTHERWISE SET FORTH IN ST S TERMS AND CONDITIONS OF SALE ST DISCLAIMS ANY EXPRESS OR IMPLIED WARRANTY WITH RESPECT TO THE USE AND OR SALE OF ST PRODUCTS INCLUDING WITHOUT LIMITATION IMPLIED WARRANTIES OF MERCHANTABILITY FITNESS FOR A PARTICULAR PURPOSE AND THEIR EQUIVALENTS UNDER THE LAWS OF ANY JURISDICTION OR INFRINGEMENT OF ANY PATENT COPYRIGHT OR OTHER INTELLECTUAL PROPERTY RIGHT UNLESS EXPRESSLY APPROVED IN WRITING BY TWO AUTHORIZED ST REPRESENTATIVES ST PRODUCTS ARE NOT RECOMMENDED AUTHORIZED OR WARRANTED FOR USE IN MILITARY AIR CRAFT SPACE LIFE SAVING OR LIFE SUSTAINING APPLICATIONS NOR IN PRODUCTS OR SYSTEMS WHERE FAILURE OR MALFUNCTION MAY RESULT IN PERSONAL INJURY DEATH OR SEVERE PROPERTY OR ENVIRONMENTAL DAMAGE ST PRODUCTS WHICH ARE NOT SPECIFIED AS AUTOMOTIVE GRADE MAY ONLY BE USED IN AUTOMOTIVE APPLICATIONS AT USER S OWN RISK Resale of ST products with provisions different from the statements and or technical features set forth in this document shall inmediately void any warranty granted by ST for the ST product or service described herein and shall not create or extend in any manner whatsoever any liability of ST ST and the ST logo are trademarks or registered trademarks of ST in various countries Information in this document supersedes and r
12. ngs Symbol Parameter Value Unit Vcc Supply voltage 0 5 to 4 6 V VI DC input voltage 0 5 to 4 6 V Vo DC output voltage OFF state 0 5 to 4 6 V Vo DC output voltage high or low state 1 0 5 to Vcc 0 5 V lik DC input diode current 50 mA lox DC output diode current 50 mA lo DC output current 50 mA an DC Vec or ground current per supply pin 100 mA Pp Power dissipation 400 mW T stg Storage temperature 65 to 150 C TL Lead temperature 10 sec 260 C 1 lg absolute maximum rating must be observed 2 Vo lt GND Vo gt Vec Doc ID 10632 Rev 9 54VCXH162245 Maximum rating 3 1 al Recommended operating conditions Table 4 Recommended operating conditions Symbol Parameter Value Unit Voc Supply voltage 1 8 to 3 6 V VI Input voltage 0 3 to 3 6 V Vo Output voltage OFF state 0 to 3 6 V Vo Output voltage high or low state 0 to Vec V lok lot High or low level output current A side Vcc 3 0 to 3 6 V 12 mA lop lon High or low level output current A side Vcc 2 3 to 2 7 V 8 mA lor lot High or low level output current B side Vcc 3 0 to 3 6 V 24 mA lok lon High or low level output current B side Vec 2 3 to 2 7 V 18 mA Top Operating temperature 55 to 125 C dt dv Input rise and fall time 0 to 10 ns V 1 Vin from 0 8 V to 2 V at Voc 3 0 V Doc ID 10632 Rev 9 7 19 Electrical charac
13. our of pulse generator typically 50 0 ky 12 19 Doc ID 10632 Rev 9 54VCXH162245 Waveforms 6 Waveforms Table 11 Waveform symbol value Symbol nes ymbo 3 0 to 3 6 V 2 3 to 2 7 V Vin 2 7V Vec Vu 1 5V Vep2 Vx Vor 0 3V Vor 0 15V Vy Vau 0 3V Vau 0 15V Figure 5 Waveform propagation delay f 1 MHz 50 duty cycle 2 0ns 2 0ns nAn nBn nAn nBn C505160 ky Doc ID 10632 Rev 9 13 19 Waveforms 54VCXH162245 14 19 Figure 6 Waveform output enable and disable time f 1 MHz 50 duty cycle 2 0ns 2 0ns nAn nBn GND GND tea n n nBn gt VM 9 teLz SC13231 3 0V or Vec Vx Vor Doc ID 10632 Rev 9 54VCXH162245 Package mechanical data 7 Package mechanical data 54VCXH162245 Products are supplied into ceramic body metal lid hermetic Flat 48 pin space package In order to meet environmental requirements ST offers these devices in different grades of ECOPACKO packages depending on their level of environmental compliance ECOPACK specifications grade definitions and product status are available at www st com ECOPACK is an ST trademark Table 12 Flat 48 MIL STD 1835 mechanical data mm inch Dim Min Typ Max Min Typ Max A 2 18 2 47 2 72 0 086 0 097 0 107 b 0 20 0 254 0 30 0 008 0 010 0 012 C 0 1
14. teristics 54VCXH162245 4 Electrical characteristics 2 7 V lt Vcc lt 3 6 V unless otherwise specified Table 5 DC specifications Test condition Value Symbol Parameter v 55 to 125 C Unit cc Vv Min Max Vin High level input voltage 2 0 2 7 to 3 6 V Vii Low level input voltage 0 8 2 7 to 3 6 lo 100 pA Vec 0 2 High level output 27 lo 6 mA 22 VoH voltage V A outputs s lo 8 mA 2 4 lo 12 mA 2 2 2 7 to 3 6 lo 100 uA Vec 0 2 High level output 2 7 lo 12 mA 2 2 VoH voltage V B outputs s lo 18 mA 2 4 i lo 24 mA 2 2 2 7 to 3 6 lo 100 uA 0 2 Low level output 27 lo 6 mA 0 4 VoL voltage V A outputs 3 0 lo 8 mA 0 55 i lo 12 mA 0 8 2 7 to 3 6 lo 100 pA 0 2 Low level output 27 lo 12 mA 0 4 Vor voltage V i lo 24 mA 0 55 l Input leakage current 2 7 to 3 6 Vi 0 to 3 6 V 5 uA Vi 0 8 V 75 3 0 I HOLD Input hold current V 2Vv 75 pA 3 6 Vi 0 to 3 6 V 500 Power off leakage loff current 0 VI or Vo 0 to 3 6 V 10 uA High impedance output Vi Vin or Vi loz leakage current E 108 9 Vo 0 to 3 6 V ar pA i VI Vcc or GND 20 Icc a supply 271036 ak curren VI or Vo Vec to 3 6 V 20 Alec Icc incr per input 2 7 to 3 6 Vin Vcc 0 6 V 750 pA 8 19 Doc ID 10632 Rev 9 ky 54VCXH162245 Electrical characteristics d 2 3 V lt Vcc lt 2 7 V unless otherwise specified

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