ST ST1843 ST1845 handbook
Contents
1. Rr 10K C1 3 3nF Vrg 0V ISense OV Ta 25 C CX842 44 20 30 Vi V AMO2808v1 q Doc ID 019049 Rev 1 15 25 Test circuit ST1843 ST1845 Figure 15 Output waveform Figure 16 Output cross conduction 50ns DIV 100ns DIV AM02809v1 AM02810v1 Figure 17 Oscillator and output waveforms HAYV OUTPUT Ry OUTPUT LARGE R SMALL C4 TANG en Cy OUTPUT SMALL R LARGE Cr AM02811v1 16 25 Doc ID 019049 Rev 1 ky ST1843 ST1845 Test circuit Figure 18 Error amp configuration 2 5V AMO2812v1 ON OFF COMMAND TO REST OF IC loc UC3842B UC3843B UC3844B UC3845B ee je During UVLO the Output is low AMO2813v1 Figure 20 Current sense circuit p CURRENT SENSE COMPARATOR CURRENT SENSE AM02814v1 Peak current is is determined by the formula _1 0V Smax Rs A small RC filter may be required to suppress switch transients 4 Doc ID 019049 Rev 1 17 25 Test circuit ST1843 ST1845 Figure 21 Slope compensation techniques AM02815v1 Figure 22 Isolated MOSFET drive and current transformer sensing Vee Vin ISOLATION BOUNDARY Ves Waveforms ge 0 0 50 DC 25 DC _ Monn 14 Ns Ik 3Rs Np COMP LATCH AMO02816v1 q 18 25 Doc ID 019049 Rev 1 ST1843 ST1845 Test circuit Figure 23 Latched shutdown JL SCR2. ST1843 ky ST1845 Rad tolerant current mode PWM controller Features Oscillator frequency guaranteed at 250 kHz m Trimmed oscillator for precise frequency control m Current mode operation to 500 kHz automatic feed forward compensation m Latching PWM for cycle by cycle current limiting m Internally trimmed reference with undervoltage lockout High current totem pole output Undervoltage lockout with hysteresis Low start up and operating current Hermetic package 50 and 100 krad Si SEL free 120 MeV cm2 mg at 125 C Description The ST1843HR and ST1845HR ICs are rad tolerant current mode PWM controllers providing an industry standard solution for the implementation of provides the off line or DC to DC fixed frequency current mode control schemes with a minimal external parts count Its radiation hardness and hermetic packaging makes it an ideal choice for aerospace and other harsh environments Table 1 Device summary Order codes Duty cycle max Radiation level Quality level EPPL Package Lead finish Mass g ST1843FKG 100 50 krad Si According to ESCC Target Flat 8 Gold 0 45 ST1845K1 50 100 krad Si Engineering Model Flat 8 Gold 0 45 ST1845RKG 50 100 krad Si According to ESCC Target Flat 8 Gold 0 45 September 2011 Doc ID 019049 Rev 1 1 25 www st com Contents ST1843 ST1845 Contents 1 Block AGAM een ee te tee en
3. 1 R Cre lb 4001 Input bias current M NAT TK Or mA rB SV V 15V 0 Ry 10kQ Cy 3 3nF AVOL AVOL 2V V 4V 65 dB PSRR 4003 Power supply rejec ratio ids WS 29V Br 10KO Cr 60 dB i Vi 15V 1 Ry 10kQ Cy 3 3nF lo_sink Output sink current Vpin2 27V Vpn 11V 2 mA V 15V 0 Ry 10KQ Cz 3 3nF l Output source current l NU fu i 0 5 mA o_source p Venn 2 2V Vpi 5V 6 25 Doc ID 019049 Rev 1 q ST1843 ST1845 Electrical characteristics Table 5 Electrical characteristics continued MIL STD Values Symbol 883 test Parameter Test conditions Unit method Min Max Vj 15V 0 Ry 10kQ Cy 3 3nF Vou Vour high Vpinp 2 3V Ry 15kQ to GND 5 id V 15V 0 Ry 10kQ Cy 3 3nF VoL Vour low Vpin2 2 3V Ri 15kQ to GND depu N Current sense section E I R CH Gy 4004 Gain EE 566 Side VN 2 Re _ C V3 Maximum input signal M i je dr AOR Cr RS og 44 v PIN1 2 12 lt Vi lt 25V Rz 10kQ SVR Supply voltage rejection ad T 60 dB T 9 3nF lp 4001 Input bias current Vj 15V m Ry 10kQ Cr 3 3nF 10 mA Do 3003 Delay to output V 15V 0 Ry 10kQ C4 3 3nF 300 ns Output section Vi 2 15V 0 Ry 10kQ Cy 3 3nF Vans ieu 20mA 04 V 3007 Output low level 1 y V 15V 0 Ry 10kQ Cy 3 3nF ee y ol Isink 20
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5. ee 3 2 Maximum ratings neee een rn nebe ede he a eend 4 3 Thermal dala osrsrnsveveerrssverensnrarnsennnenssnntenderk 4 4 Pin connection uu sist Re aam E a uc ENNE D aa 5 5 Electrical characteristics lllleeeeeseeee 6 6 Radiation characteristics 0c cee eee eee 9 6 1 Total dOS6 ns aar tora arn daa aided Aa eran a eae RCRCR CR TRUE A 9 6 1 1 Bias conditions and total dose level for total dose radiation testing 9 6 1 2 Electrical measurements for total dose radiation testing 10 6 1 3 Heavy lons sanne a ven rende de art bee eee BEN eee ee Boe d 12 7 TEST Chel TTD rr 13 8 Package mechanical data selllleeeeess 22 9 Ordering information 2 000 e eee ee eee 23 10 Revision history iussus sein ERE eed eee en ene nen ee 24 2 25 Doc ID 019049 Rev 1 Ta ST1843 ST1845 Block diagram 1 Block diagram Figure 1 Block diagram toggle flip flop used only in UC3844B and UC3845B CURRENT SENSE COMPARATOR AMO2796v1 ky Doc ID 019049 Rev 1 3 25 Maximum ratings ST1843 ST1845 2 Maximum ratings Table 2 Absolute maximum ratings Symbol Parameter Value Unit Supply voltage low impedance source 30 V Supply voltage li 30mA Self limiting lo Output current 1 A Eo Output energy capacitive load 5 mJ Analog inputs pins 2 3 0 3 to 5 5 V Error amplifier ou
6. must be selected for a holding current of less than 0 5mA at T A min The simple two transistor circuit can be used in place of the SCR as shown All resistors are 10K AMO2817v1 Figure 24 Error amplifier compensation Error Amp compensation circuit for stabilizing any current mode topology except for boost and flyback converters operating with continuous inductor current D95IN351 Error Amp compensation circuit for stabilizing current mode boost and flyback topologies operating with continuous inductor current AMO2818v1 4 Doc ID 019049 Rev 1 19 25 Test circuit ST1843 ST1845 Figure 25 External clock synchronization VREF Cr EXTERNAL N SYNC INPUT 0 01uF Dn v4 A 470 The diode clamp is required if the Sync amplitude is large enough to cause the bottom side of Cy to go more than 300mV below ground AMO2819v1 Figure 26 External duty cycle clamp and multi unit synchronization O 0 0 N ajo e A C TO ADDITIONAL 1 44 _ Re UCX84XAs AM02820v1 q 20 25 Doc ID 019049 Rev 1 ST1843 ST1845 Test circuit Figure 27 Soft start circuit AM02821v1 Vee Vin O Q1 Ri Vetamp BR where 0 lt Voramp lt 1V pk max 1 Ro AMO2822v1 x Doc ID 019049 Rev 1 21 25 Package mechanical data ST1843 ST1845 8 Package mechanical data In order to meet environmental requirements ST offers these devices in dif
7. 0mA g Vi 15V 0 Ry 10kQ Cy 3 3nF Vort source 20mA s 3006 Output high level 7 V 2 15V 0 Ry 10kQ Cy 3 3nF T T Su IsouRcE 200mA _ ey 1 R CLL Vois UVLO saturation x S ot SR LE 11 V SINK 7 tr 3004 Rise time Vi 15V 1 Rr 10kQ Cr 3 3nF 150 ns ty Fall time C InF 150 ns Under voltage lockout section VIH Start threshold Vi 15V Ry 10kQ C7 3 3nF 78 9 V Vii Min operating voltage after us 45y 1 Rp 10kQ Cr 3 3nF 7 82 v turn on Max duty cycle for ST1843 47 50 DC max Vi 15V Rr 10kQ C1 3 3nF Max duty cycle for ST1845 94 100 DCMIN Min duty cycle V 15V 0 Ry 10kQ Cy 3 3nF 0 96 Total standby current lst Start up current Vi 15V 0 Ry 10kQ Cy 3 3nF 0 5 mA y Doc ID 019049 Rev 1 7 25 Electrical characteristics ST1843 ST1845 Table 5 Electrical characteristics continued MIL STD Values Symbol 883 test Parameter Test conditions Unit method Min Max V 15V 0 Ry 10kQ Cy 3 3nF li 3005 Operating supply current l 3 al 17 mA Vpin2 Veins OV V 15V 0 Ry 10kQ Cy 3 3nF Viz Zener voltage l T x 30 V li 25mA 1 Adjust Vi above the start threshold before setting at 15V 2 Parameter measured at trip point of latch with Vpiyo 0 3 Gain defined as AV pin4 A 30 SAVping 0 8V AV pins 8 25 Doc ID 019049 Rev 1 ky ST1843 ST1845 Radiation characteristics 6 6 1 6 1 1
8. 300K 500K fosc KHz 10K 20K 30K 50K 100K 200K 300K 500K fOSC KHz AMO2799v1 AMO2800v1 4 Doc ID 019049 Rev 1 13 25 Test circuit ST1843 ST1845 Figure 7 Oscillator discharge current vs Figure 8 Maximum output duty cycle vs temperature timing resistor Dmax 90 Idischg 7 5MA 80 Idischg 8 8MA 70 9 Vi 15V CT 3 3nF 50 Ta 25 C 40 08 1 2 3 5 Rr KQ AMO02801v1 AMO02802v1 Figure 9 Error amp open loop gain and Figure 10 Current sense input threshold vs phase vs frequency error amp output voltage VBV i MIL V WL vsv Vo 2V to 4V i RL 100K 1 0 E ein i 0 8 7 j BN 90 MELLLL jaan 120 mI T 180 0 0 VELIT 10 100 1K 10K 100K 1M f Hz 0 2 4 6 Vo V AM02803v1 AM02804v1 14 25 Doc ID 019049 Rev 1 ky ST1843 ST1845 Test circuit Figure 11 Reference voltage change vs source current Figure 12 Reference short circuit current vs temperature 80 100 Irer mA AMO2805v1 Figure 13 Output saturation voltage vs load current 100 TA C AMO2806v1 Figure 14 Supply current vs supply voltage Source Saturation Load to Ground 80us Pulsed Load 120Hz Rate n 1 __1__ Sink Saturation Load to Vi 0 200 400 600 lo mA AMO2807v1
9. 94 100 DCMIN Min duty cycle Vi 15V Ry 10kQ C1 3 3nF 0 Total stand by current Ist Start up current Vj 6 5V Rr 10kQ C4 3 3nF 0 5 mA Vi 15V Ry 10kQ Cy 3 3nF VPIN2 li Operating supply current VPIN3 OV 17 mA Viz Zener voltage Vi 15V Rp 10kQ Cy 3 3nF lj 25MA 30 V y Doc ID 019049 Rev 1 11 25 Radiation characteristics ST1843 ST1845 6 1 3 Heavy lons Both devices have been tested SEL free at 120 MeV cm2 mg at 125 C 12 25 Doc ID 019049 Rev 1 ST1843 ST1845 Test circuit 7 Test circuit Figure 4 Open loop test circuit 4 7KQ ERROR AMP ADJUST o GROUND AMO2798v1 High peak currents associated with capacitive loads necessitate careful grounding techniques Timing and bypass capacitors should be connected close to pin 5 in a single point ground The transistor and 5 KQ potentiometer are used to sample the oscillator waveform and apply an adjustable ramp to pin 3 Figure 5 Timing resistor vs oscillator Figure 6 Output dead time vs oscillator frequency frequency D951N333 50 Cr 2nF 30 Cr 5nF 20 Cr 1nF Cr 10nF 40 Cr 500pF Cr 200pF 5 T K Cr 100pF 3 p 2 Vi 15V Ta 25 C 1 10K 20K 30K 50K 100K 200K
10. Radiation characteristics Total dose The total dose results are provided in the following table Table 6 Total dose performance Device Total dose ST1843HR 50 krad Si ST1845HR 100 krad Si These results are obtained on the following conditions Bias conditions and total dose level for total dose radiation testing Continuous bias shall be applied during irradiation testing as specified below The total dose level applied shall be as specified in the component type variant information here in or in purchaser order Figure 3 Unbias conditions Doc ID 019049 Rev 1 9 25 Radiation ch aracteristics ST1843 ST1845 6 1 2 Electrical measurements for total dose radiation testing Prior to irradiation testing the devices shall have successfully met room temperature electrical measurements specified herein Unless otherwise stated the measurements shall be performed at T4 22 3 C The test methods and test conditions shall be as per the corresponding test defined in electrical measurements at room temperature The parameters to be measured during and on completion of irradiation testing are shown below Table 7 Electrical parameter during irradiation testing Values Symbol Parameter Test conditions Unit Min Max Reference section Output voltage for ST1843 4 95 5 15 VREF Vi 15V Rr 10kQ Cr 3 3
11. This is the reference output It provides charging current for capacitor CT through ref resistor RT Doc ID 019049 Rev 1 5 25 Electrical characteristics ST1843 ST1845 5 Electrical characteristics Maximum package power dissipation limits must be respected low duty cycle pulse techniques are used during test maintain Tj as close to T4 as possible Unless otherwise stated these specifications apply for TA 22 3 C V 15 V Adjust Vj above the start threshold before setting at 15 V Rr 10 KO Cy 3 3 nF Table 5 Electrical characteristics MIL STD Values Symbol 883 test Parameter Test conditions Unit method Min Max Reference section 1 R Cre VREF Output voltage em ee eges dg o IMA AVREF LINE Line regulation Sc er re 0 02 V AVREF LOAD Load regulation V 15V 1 Ry 10kQ Cy 3 3nF 25 V lec 3011 Output short circuit 1 lt lo lt 20mA 0 18 0 03 A Oscillator section i Frequency for ST1843 V 15V 1 Ry 10kQ Cy 3 3nF 49 55 kHz ae Frequency for ST1845 1 lt l 20mA 245 27 5 kHz Masc A Frequency change with 12V lt V lt 25V Rp 10kQ Cr _ 4 9 OSV voltage 3 3nF la Discharge current V 15V Ry 10kQ Cp 3 3nF 7 8 88 mA dischg 9 1 lt lo lt 20mA Vosc 2V 75 88 mA Error amp section V 15V 0 Ry 10kQ Cz 3 3nF Vo Input voltage Vent 2 5V 2 45 2 55 V
12. ferent grades of ECOPACK packages depending on their level of environmental compliance ECOPACK specifications grade definitions and product status are available at www st com ECOPACK is an ST trademark Table 8 Flat 8 mechanical data mm inch Dim Min Typ Max Min Typ Max A 2 24 2 44 2 64 0 088 0 096 0 104 b 0 38 0 43 0 48 0 015 0 017 0 019 C 0 10 0 13 0 16 0 004 0 005 0 006 D 6 35 6 48 6 61 0 250 0 255 0 260 E 6 35 6 48 6 61 0 250 0 255 0 260 E2 4 32 4 45 4 58 0 170 0 175 0 180 E3 0 88 1 01 1 14 0 035 0 040 0 045 e 1 27 0 050 L 6 51 7 38 0 256 0 291 Q 0 66 0 79 0 92 0 026 0 031 0 036 S1 0 92 1 12 1 32 0 036 0 044 0 052 N 08 08 Figure 29 Package dimensions N Places D N 2 Places Y 1 4 places 22 25 Doc ID 019049 Rev 1 ky ST1843 ST1845 Ordering information 9 Ordering information Table 9 Ordering information Order codes Quality level EPPL Package Lead finish Marking Packing ST1843K1 Engineering Model Flat 8 Gold ST1843K1 Strip pack ST1843FKG According to ESCC Target Flat 8 Gold ST1843FKG Strip pack ST1845K1 Engineering Model Flat 8 Gold ST1845K1 Strip pack ST1845RKG According to ESCC Target Flat 8 Gold ST1845RKG Strip pack Doc ID 019049 Rev 1 23 25 Revision history ST1843 ST1845 10 24 25 Revis
13. h Republic Finland France Germany Hong Kong India Israel Italy Japan Malaysia Malta Morocco Philippines Singapore Spain Sweden Switzerland United Kingdom United States of America www st com ky Doc ID 019049 Rev 1 25 25
14. ion history Table 10 Document revision history Date 12 Sep 2011 Revision 1 First revision Changes Doc ID 019049 Rev 1 ST1843 ST1845 Please Read Carefully Information in this document is provided solely in connection with ST products STMicroelectronics NV and its subsidiaries ST reserve the right to make changes corrections modifications or improvements to this document and the products and services described herein at any time without notice All ST products are sold pursuant to ST s terms and conditions of sale Purchasers are solely responsible for the choice selection and use of the ST products and services described herein and ST assumes no liability whatsoever relating to the choice selection or use of the ST products and services described herein No license express or implied by estoppel or otherwise to any intellectual property rights is granted under this document If any part of this document refers to any third party products or services it shall not be deemed a license grant by ST for the use of such third party products or services or any intellectual property contained therein or considered as a warranty covering the use in any manner whatsoever of such third party products or services or any intellectual property contained therein UNLESS OTHERWISE SET FORTH IN ST S TERMS AND CONDITIONS OF SALE ST DISCLAIMS ANY EXPRESS OR IMPLIED WARRANTY WITH RESPECT TO THE USE AND
15. nF lo 1mA V Output voltage for ST1845 4 85 5 15 AVREF LINE Line regulation 12V lt Vi lt 25V Rr 10kQ Cr 3 3nF 0 02 V VI 15V Rr 10kQ Cr 3 3nF AVreF_Loap Load regulation 1 lt 1 lt 20mA 0 025 V Isc Output short circuit current Vi 15V Rr 10kQ C4 3 3nF 0 18 0 03 A Oscillator section Fosc Frequency Vi 15V Rr 10kQ C4 3 3nF 49 65 kHz AFoso Av Frequency change with jay lt y lt 25V Ry 10KO Cy 3 3nF 1 1 voltage IDISCHG Discharge current Vi 15V Rr 10kQ Cr 3 3NF Vosc 2V 0 0078 0 0088 A Error amp section Input voltage for ST1843 2 45 2 6 Vo VI 15V RT 10kQ Cr 3 3nF VPIN1 2 5V V Input voltage for ST1845 2 45 2 55 Input bias current ST1843 2 75 lp VI 15V Rr 10kQ Cr 3 3nF Vrp 5V UA Input bias current ST1845 2 8 AVOL for ST1843 B pi _ 60 AVOL Vi 15V Ry 10kQ C1 3 3nF aV EV dB AVOL for ST1845 4V 62 PSRR Power supply rejection ratio 12V lt Vj lt 25V Rz 10kQ Cy 3 3nF 60 dB V 15V Ry 10kQ C4 3 3nF VPIN2 IO SINK Output sink current 2 7V VPIN1 1 1V 2 mA V 15V Ry 10kQ Cy 3 3nF VPIN2 lO SOURCE Output source current 2 3V VPIN1 5V 0 5 mA V 15V Rz 10kQ Cr 3 3nF VPIN2 Von VOUT high 2 3V RL 15K to GND V 15V Ry 10kQ Cy 3 3nF VPIN2 VoL VOUT low 2 3V Ry 15kQ to pin WEM 10 25 Doc ID 019049 Rev 1 q ST1843 ST1 845 Radiation characte
16. ristics Table 7 Electrical parameter during irradiation testing continued Values Symbol Parameter Test conditions Unit Min Max Current sense section Gy Gain Vi 15V Ry 10kQ C7 3 3nF 2 85 3 15 V V V3 Maximum input signal ze siye ORE Carr lee VEN 0 9 1 1 V SVR Supply voltage rejection 12V lt Vi lt 25V Ry 10kQ Cy 3 3nF 60 dB Input bias current ST1843 V 15V Rp 10kQ C4 3 3nF 50 A H p Input bias current ST1845 45 Do Delay to output Vi 15V Ry 10kQ Cy 3 3nF 300 ns Output section VI 15V Rr 10kQ Cr 3 3nF IsiNK Vou Output low level 20mA 0 4 V VI 15V Rr 10kQ Cr 3 3nF IsiNK Voio Output low level 200mA 2 2 V VI 15V Ry 10kQ C1 3 3nF IsoURCE Vout Output high level 20mA 13 V VI 15V Rr 10kQ Cr 3 3nF source Vous Output high level 200mA 12 V Vois UVLO saturation Vi 15V Rr 10kO Cr 3 3nF lgiy 1mA 1 1 V TR Rise time Vi 15V Rr 10kQ C4 3 3nF C 1nF 180 ns Tr Fall time Vi 15V Rp 10kQ C4 3 3nF C InF 180 ns Under voltage lockout section Start threshold for ST1843 7 8 9 5 Viu lV 15V Rr 10kQ Cy 3 3nF V Start threshold for ST1845 7 8 10 5 Min operating voltage after 7 8 6 turn on for ST1843 f VMIN VI 15V Rr 10kQ Cr 3 3nF V Min operating voltage after 7 9 turn on for ST1845 DCMAX Max duty cycle Vi 15V Rp 10kQ C7 3 3nF
17. tput sink current 10 mA Piot Power dissipation at Ta lt 25 C SO8 800 mW Tstg Storage temperature range 65 to 150 C Ty Junction operating temperature 40 to 150 C Note All voltages are with respect to pin 5 all currents are positive into the specified terminal 3 Thermal data Table 3 Thermal data Symbol Description Flat 8 Unit Thermal resistance Junction ambient max 4 25 Doc ID 019049 Rev 1 ST1843 ST1845 Pin connection 4 4 Pin connection Figure 2 Pin connection DIP 8 SO8 VREF Vi OUTPUT GROUND AM02797v1 Table 4 Pin functions No Function Description 1 COMP _ This pin is the error amplifier output and is made available for loop compensation This is the inverting input of the error amplifier It is normally connected to the switching power supply output through a resistor divider 3 A voltage proportional to inductor current is connected to this input The PWM uses SENSE this information to terminate the output switch conduction The oscillator frequency and maximum output duty cycle are programmed by 4 R C connecting resistor RT to Vref and capacitor CT to ground Operation to 500 kHz is possible 5 GROUND This pin is the combined control circuitry and power ground This output directly drives the gate of a power MOSFET Peak currents up to 1A are 6 OUTPUT E sourced and sunk by this pin 7 Vee This pin is the positive supply of the control IC 8 V
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