TSC TS34118 handbook
Contents
1. Parameter Symbol Min Typ Max Unit Attenuators continued T 25 C TXI input resistance TXI lt 350mVrms Rrx 7 0 10 14 KQ Gain tracking Grx Gtx Tx Idle Rx Grr 0 1 dB Attenuator Control Ta 25 C Cr voltage pin 14 Vs Rx model Vic Vs 240 Idle model Ver 0 mV Tx model 240 Cy source current switching to Rx mode lotr 85 60 40 HA C sink current switching to Tx mode lott 40 60 85 HA Cr slow idle current lets 0 uA Cr fast idle internal resistance Re 1 5 2 0 3 6 KQ Microphone Amplifier T j 25 C Vurs0 8V Ayc_ 31dB unless otherwise noted Output offset Vuco Vp feedback R 180KQ MCOvos 50 0 50 mV Open loop gain f lt 100Hz Avom 70 80 dB Gain bandwidth GBWm 1 0 MHz Output High voltage lout 1 0mA Vcc 5 0V VmMcoH 3 7 V Output Low voltage lout 1 0mA Veco 200 mV Input bias current MCI lam 40 nA Muting AGain f 1 0KHz Vyut 2 0V 55 300Hz lt f lt 10KHz id 68 a MUT input resistance Vcc Vut 6 5V Ruut 50 90 KQ MUT Input High VMuTH 2 0 Vcc V MUT Input Low VMuTL 0 0 8 V Hybrid Amplifiers Ts 25 C HTO offset Vito Ve Feedback R 51KQ Hyos 20 0 20 mV HTO to HTO offset Feedback R 51KQ HByos 30 0 30 mV Open loop gain HTI to HTO f lt 100Hz AvoLH 60 80 dB Gain bandwidth GBWy 1 0 MHz Closed loop gain HTO to HTO AvciH 0 35 0 0 35 dB Input bias current2. The Final Analysis Proper operation of a speakerphone is a combination of proper mechanical acoustic design as well as proper electronic design The acoustics of the enclosure must be considered early in the design of a speakerphone In general electronics cannot compensate for poor acoustics low speaker quality or any combination of the two Proper acoustic separation of the speaker and microphone as described in the Design Equations is essential The physical location of the microphone along with the characteristics of the selected microphone will play a large role in the quality of the transmitted sound The microphone and speaker vendors can usually provide additional information on the use of their products In the final analysis the circuits shown in this datasheet will have to be fine tuned to match the acoustics of the enclosure the specific hybrid and the specific microphone and speaker selected The component values shown in this datasheet should be considered as starting points only The gains of the transmit and receive paths are easily adjusted at the microphone and speaker amplifiers respectively The switching response can then be fine turned by varying in small steps the components at the level detector inputs until satisfactory operation is obtained for both long and short lines TS34118 19 20 2004 09 rev B SOP 28 Mechanical Drawin SOP 28 DIMENSION MILLIMETERS INCHES MIN MAX MIN MAX 17 70 18 0
3. B Application Information Volume Control If a potentiometer with a standard linear taper is used for the volume control In situations where this may be objectionable a potentiometer with an audio taper commonly used in radio volume controls will provide a more linear relationship as indicated in Figure 12 The slight non linearity at each end of the graph is due to the physical construction of the potentiometer and will vary among different manufactures 10 a Gain dB Toca Tee RRRRGEEP Ae Eee Aaaee aa PETA PA viet ale aa G 40 BU 320 JBD 200 240 0 320 Degrees Of Rotation Figure 12 Receive Attenuator Gain versus Potentiometer Position Using Audio Taper RFI Interference Potential radio frequency interference problems should be addressed early in the electrical and mechanical design of the speakerphone RFI may enter the circuit through Tip and Ring through the microphone wiring to the microphone amplifier or through any of the PC board trances The most sensitive pins on the TS34118 are the inputs to the level detectors RLI1 RLI2 TLI1 TLI2 since when there is no speech present the inputs are high impedance and these op amps are in a near open loop condition The board traces to these pins should be kept short and the resistor and capacitor for each of these pins should be physically close to the pins Any other high impedance input pin MCI HTI Fl VLC should be considered sensitive to RFI signals
4. and the capacitor discharges to VB through the external resistor RT with a time constant RT x CT To Attenuators Control ae Circuit ee Vol Control Dial Tone Det AGC Figure 6 CT Attenuator Control Block Circuit Microphone Amplifier The microphone amplifier pins 10 11 has the non inverting input internally connected to Vg while the inverting input and the output are pinned out Unlike most op amps the amplifier has an all NPN output stage which maximizes phase margin and gain bandwidth This feature ensures stability at gains less than unity as well as with a wide range of reactive loads The open loop gain is typically 80dB f lt 100Hz and the gain bandwicth is typically 1 0MHz see Figure 16 The maximum p p output swing is typically 1 0 volt less than Vcc with an output impedance of lt 10 Q until current limited is reached typically 1 5mA Input bias current at MCI is typically 40nA out of the pin The muting function Pin 12 when activated will reduce the gain of the amplifier to 39dB with RMI 5 0KQ by shorting output to the inverting input see Figure 7 The mute input has a threshold of 1 5 volts and the voltage at this pin must be kept within the range of ground and Vcc see Figure 17 If the mute function is not used the pin should be grounded TS34118 11 20 2004 09 rev B Mute Figure 7 Microphone Amplifier and Mute Hybrid Amplifiers The two hybrid amplifiers at HTO HTO and H
5. to the attenuator control block Grounding CPT does the same for the transmit path Additionally the receive background noise monitor is automatically disabled by the dial tone detector whenever the receive signal exceeds the detector s threshold Transmit Receive Detection Priority Although the TS34118 was designed to have an idle mode such that the attenuators are halfway between their full on and full off positions the idle mode can be biased towards the transmit or the receive side With this done gaining control of the circuit from idle will be easier for that side towards which it is biased since that path will have less attenuation at idle By connecting a resistor from Cy pin 14 to ground the circuit will be biased towards the transmit side The resistor value is calculated from AV Where R is the added resistor Ry is the resistor normally between pins 14 and 15 typically 120Q and AV is the R R 1 difference between Vs and the voltage at C7 at idle C refer to Figure 10 By connecting a resistor from Cy pin 14 to Vcc the circuit will be biased towards the transmit side The resistor value is calculated from Vec T Vp R R AV r R Ry and AV are the same as above Switching time will be somewhat affected in each case due to the different voltage excursions required to get to transmit and receive from idle For practical considerations the AV shift should not exceed 100mV TS34118 18 20 2004 09 rev
6. 20ms If the circuit switches directly from receive to transmit or vice versa the total switching time would be 40ms The switching time from either receive or transmit to idle depends on which type of idle mode is in effect If the circuit is going to fast idle the time constant is determined by the Cy capacitor and the internal 2 0KQ resistor Figure 6 With C7 5 0uF the time constant is 30ms for 95 change Fast idle is an infrequent occurrence however occurring when both speakers are talking and competing for control of the circuit The switching time from idle back to either transmit or receive is described above TS34118 13 20 2004 09 rev B TSC S Switching Time If the circuit is switching to slow idle the time constant is determined by the Cy capacitor and Rz the external resistor see Figure 6 With C 5 0uF and Rr 120KQ the time constant is 600ms giving a switching time of 1 8 seconds for 95 change The switching period to slow idle begins when both speakers have stopped talking The switching time back to the original mode will depend on how soon that speaker begins speaking again The sooner the speaking time starts during the 1 8 seconds period the quicker the switching time since a smaller voltage excursion is required That switching time is determined by the internal current sources as described above The above switching times occur however after the level detectors have d
7. 8 2 1 2 4 Vs output resistance lyg 1 0mA Rovs 400 Q Vp power supply rejection ratio Cyg 220uF f 1 0KHz PSRR 54 dB Attenuators T 25 C Receive attenuator gain f 1 0KHz Vic Vs Rx model RXl 150mVrms Vcc 5 0V Grx 4 0 6 0 8 0 Rx model RXI 150mVrms Vcc 3 5V Grx 4 0 6 0 8 0 Gain change Vcc 3 5V versus Vcc 5 0V AGrxt 0 5 0 0 5 dB AGC gain change Vcc 2 8V versus Vcc 5 0V AGrx2 25 15 Idle model RXI 150mVrms Grxt 22 20 17 Range Rx to Tx model AGRx3 49 52 54 Volume control range Rx model 0 3Vs lt VLc lt VsB Ver 27 35 dB RXO DC voltage Rx model Vrxo Z VB V ARXO DC voltage Rx to Tx model AVRxo 10 150 mV RXO high voltage lout 1 0mA RXI Vg8 1 5V VRxoH 3 7 V RXO low voltage lout 1 0mA RXI Vs 1 0 V 7 45 10 V Output measured with respect to Vs iisi RXI input resistance RXI lt 350mVrms Rex 7 0 10 14 KQ Transmit attenuator gain f 1 0KHz Tx model TXl 150mVrms Grx 4 0 6 0 8 0 dB Idle model TXl 150mVrms Grx 22 20 17 Range Tx to Rx model AGrx 49 52 54 TXO DC voltage Tx model VrIxo Ve V ATXO DC voltage Tx to Rx model AVtxo 30 150 mV TXO High voltage lout 1 0mA TXI V5 1 5V VtxoH 3 7 V TXO Low voltage lout 1 0mA TXI Vg 1 0V VxoL _ 415 10 V Output measured with respect to Vg TS34118 2 20 2004 09 rev B
8. HT1 IBH 30 nA HTO High voltage lout 5 0mA VHT H 3 7 V HTO Low voltage lout 5 0mA VHT L 250 mV HTO High voltage lout 5 0mA VHT H 3 7 V HTO Low voltage lout 5 0mA Vue 450 mV Distortion 300Hz lt f lt 10KHz see Figure 1 THDy 0 3 Level Detectors and Background Noise Monitors T 25 C Transmit Receive switch threshold Ratio of current at RLI1 RLI2 to 20UA IH 0 8 1 0 1 2 at TLI1 TLI2 to switch from Tx to Rx Source current at RLO1 RLO2 TLO1 TLO2 lLso 2 0 mA Sink current at RLO1 RLO2 TLO1 TLO2 ILsk 4 0 HA CPR CPT output resistance lout 1 5mA Rcp 35 Q CPR CPT leakage current lcPLk 0 2 uA Filter Ta 25 C Voltage offset at FO Veo Vp 220KQ from Ve to FI FOvos 200 90 0 mV FO sink current leo 150 260 400 uA FI bias current ley 50 nA TS34118 3 20 2004 09 rev B Parameter Symbol Min Typ Max Unit System Distortion T 25 C f 1 0KHz Rx mode from FI to RXO FO connected to RX THDR i 0 5 3 0 Tx mode from MCI to HTO HTO includes THD 0 8 3 0 Tx attenuator 1 All currents into a device pin are positive those out of a pin are negative Algebraic convention rather than magnitude is used to define limits Simplified Block Diagram Tx Attenuator re Background Lev i Noise Monitor Detect el Attenuator pinid Control rai Background Noise Monitor
9. T Gir X Gro X Gry X T Equation 4 Where the terms in the brackets are the V V gain terms The speaker amplifier gain is divided by two since Gsa is the differential gain of the amplifier and V3 is obtained from one the side of the output The current 11 coming from the microphone circuit is defined by _ Yu X Gua Rl Where Vm is the microphone voltage Since the switching threshold occurs when 1 13 combining the above two 11 Equation 5 equations yields RI Gi x Gro X Grx Gsa Vm V x M JEO R3 Gy x2 Equation 6 TS34118 15 20 2004 09 rev B To Attenuator Acoustic Coupling Speaker ra Rx Attenuator Figure 10 Basic Block Diagram For Design Purpos This is the general equation defining the microphone voltage necessary to switch comparator C1 when a received signal V is present The highest Vm occurs when the receive attenuator is at maximum gain 6 0dB Using the typical numbers for Equation 6 yields Vm 0 52VL Equation 7 To switch comparator C2 currents 12 and 14 need to be determined With sound applied to the microphone a voltage Vy is creased by the microphone resulting in a current I2 into TLI1 V G 12 si Gya X Gig X T Equation 8 Since Gy is the differential gain of the hybrid amplifiers it is divided by two to obtain the voltage V2 applied to R2 Comparator C2 switches when 14 12 14 is defined by Ni R4 Setting 14 12 and combining the above equations r
10. are complementary in function i e when one is at maximum gain 6 0dB the other is at maximum attenuation 4 5dB and vice verse They sum of their gains remains constant within a nominal error hand of 0 1dB at a typical value of 40dB see Figure 10 Their purpose is to control the transmit and receive paths to provide the half duplex operation required in a speakerphone The attenuators are non inverting and have a 3 0dB from max gain frequency of 100KHz The input impedance of each attenuator TXI and RXI is nominally 10KQ see Figure 3 and the input signal should be limited to 350mVrms 990mVp p to prevent distortion That maximum recommended input signal is independent of the volume control setting The diode clamp on the inputs the input swing and therefore the maximum negative output swing This is the reason for Vrxo and VTxo_ specification being defined as they are in the Electrical Characteristics The output impedance is 100 until the output current limit typically 2 5mA is reached VB 10K TXI To Attenuator RXI 4 0K 96K Unput Figure 3 Attenuator Input Stage TS34118 7 20 2004 09 rev B TSC Attenuators The attenuators are controlled by the single output of the Control Block which is measurable at the C pin pin 14 When the C pin is at 240 millivolts with respect to Vp the circuit is in the receive mode receive attenuator is at 6 0dB When the C voltage is at 240 millivolts with r
11. has ceased in both transmit and receive paths The attenuators are then slowly switched 1 second to the idle mode 5 Switch to the full transmit or receive modes from any other mode is at the fast rate 30ms A summary of the truth table is as follows 1 The circuit will switch to transmit if a both transmit level detectors sense higher signal levels relative to the respective receive level detectors TLI1 versus RLI1 TLI2 versus RLI2 and b the transmit background noise monitor indicates the presence of speech 2 The circuit will switch to receive if a both receive level detectors sense higher signal levels relative to the respective transmit level detectors and b the receive background noise monitor indicates the presence of speech 3 The circuit will switch to the fast idle mode if the level detectors disagree on the relative strengths of the signal levels and at least one of the background noise monitors indicates speech For example referring to the Block Diagram Figure 2 if there is sufficient signal at the microphone amp output TLI2 to override the speaker signal RLI2 and there is sufficient signal at the receive input RLI1 to override the signal at the hybrid output TLI1 and either or both background monitors indicate speech then the circuit will be in the fast idle mode Two conditions which can cause the fast idle mode to occur are a when both talkers are attempting to gain control of the system by talking at th
12. i al Attenuator Power Amp L e MMiMiii ii ii ii i External I Level Detectors L Temperature Characteristics Parameter Veo supply current CD 0 8V Vcc supply current CD 2 0V Ve output voltage Veo 5 0V Attenuator gain Max Gain Attenuator gain Max attenuation Attenuator input resistance TXI RX Dial tone detector threshold CT source sink current Microphone Hybrid amplifier offset Transmit Receive switching threshold Sink current at RLO1 RLO2 TLO1 TLO2 Closed loop gain HTO to HTO TS34118 4 20 2004 09 rev B p Y N HA Pin Function Description Filter output Output impedance is less than 50 ohms Name FO FL Filter input Input impedance is greater than 1 0Mohm Chip Disable A logic low lt 0 8V sets normal operation A logic high gt 2 0V disables the IC to co conserve power Input impedance is norminally 90KQ A supply voltage of 2 8 to 6 5 volts is required at 5 0mA As Vcc falls from 3 5 to 2 8volts vee an AGC circuit reduces the receive attenuator gain by 25dB when in the receive mode Output of the second hybrid amplifier The gain is internally set at 1 0 to provide a differential output in conjunction with HTO to the hybrid transformer Output of the first hybrid amplifier The gain of the amp is set by external resistors M Input and summing node for the first hybrid amplifier
13. it would appear that the resulting power to the speaker is extremely low However Equation 1 does not consider the peaks in normal speech which can be 10 to 15 times the rms value Considering the peaks the overall average power approaches 20 30mV on long lines and much more on short lines Referring to Figure 10 the gain from Tip Ring to the filter input was measured at 0 833V V 1 6dB the filter s gain is unity and the receive attenuator s gain is 2 0V V 6 0dB at maximum volume The speaker amplifier s gain is set at 22VIN 26 8dB which puts the overall gain at 31 2dB Ill Loop Gain The total loop gain must add up to less than zero dB to obtain a stable circuit This can be expressed as GyatGrxt Guat Ggtt Grot Gaxt GgatGac lt 0 Equation 2 Using the typical numbers mentioned above and knowing that Grx Gprx 40dB the required acoustic coupling can be determined Gac lt 31 20 1 15 0 40 26 8 22 9dB Equation 3 An acoustic loss of at least 23 dB is necessary to prevent instability and oscillations commonly referred to as singing However the following equations show that greater acoustic loss is necessary to obtain proper level detection and switching IV Switching Threshold To switch comparator C1 currents 11 and 13 need to be determined Referring to Figure 11 with a receive signal VL applied to Tip Ring a current 13 will flow through R3 into RLI2 according to the following equation V G I3
14. 0 0 697 0 709 7 41 7 59 0 292 0 299 10 15 10 55 0 400 0 415 2 37 2 63 0 093 0 104 1 27BSC 0 05BSC 0 40REF 0 016REF 0 10 0 30 0 004 0 012 0 60 1 00 0 024 0 040 0 25BSC 0 010BSC 0 254TYP 0 5 AlCl JLIO TMIM V O wW gt y gt DIP 28 DIMENSION MILLIMETERS INCHES MIN MAX MIN MAX 36 95 37 21 1 455 1 465 13 76 14 02 0 542 0 552 3 81 4 06 0 15 0 160 0 38 0 015 2 54TYP 0 100TYP 0 45TYP 0 018TYP 1 27TYP 0 050TYP 0 119 0 14 3 04 0 31 5 344 0 210 14 986 15 49 0 59 0 61 TS34118 20 20 2004 09 rev B WWW ALLDATASHEET COM Copyright Each Manufacturing Company All Datasheets cannot be modified without permission This datasheet has been download from www AllDataSheet com 100 Free DataSheet Search Site Free Download No Register Fast Search System www AllDataSheet com
15. 2 a low pass filter or a band pass filter As a high pass filter with the components shown in Figure 8 the filter will keep out 60Hz and 120Hz hum which can be picked up by the external telephone lines p 0_305Hs ines 30 7N 4700pF 4700pFl l m j4 PE ant RIR iNeed 18 for Ci C2 Figure 8 High Pass Filter TS34118 12 20 2004 09 rev B TSC S5 Filter As a low pass filter Figure 9 it can be used to roll off the high end frequencies in the receive circuit which aids in protecting against acoustic feedback problems With an appropriate choice of an input coupling capacitor to the low pass filter is formed o 40K 20K Sa o k gt 30 aN Ri L cil N 13K ae lite MC34118 SS Oe ae an J R C1C2 Vin for Ri kR2 Figure 9 Low Pass Filter Power Supply Vg and Chip Disable The power supply voltage at Vcc pin 4 is to be between 3 5 and 6 5 volts for normal operation with reduced operation possible down to 2 8 volts The power supply current is shown in Figure 18 for both the power up and power down mode The output voltage at Vg pin 15 is Vcc 0 7 2 and provides the ac ground for the system The output impedance at Vs is 4000 and in conjunction with the external capacitor at Vg forms a low pass filter for power supply rejection with different capacitors The choice of capacitor is application dependent base on whether the circuit is powered by the telephone line or a pow
16. 2 0 6 0dB and the gain through the hybrid normally 0 4 8 0dB Therefore a gain of 357V V is required of the microphone and hybrid amplifiers It is desirable to have the majority f that gain in the microphone amplifier for three reasons 1 The low level signals from the microphone should be amplifier as soon as possible to minimize signal noise problems TS34118 14 20 2004 09 rev B TSC S Design Equations 2 To provide a reasonable signal level to the TLI2 level detector and 3 to minimize any gain applied to broadband noise generated within the attenuator However to cover the normal voice band the microphone amplifiers gain should not exceed 48dB For the circuit of Figure 10 the gain of the microphone amplifier was set at 35V V 31dB and the differential gain of the hybrid amplifiers was set at 10 2V V 20 1dB Il Receive Gain The overall receive gain depends on the incoming signal level and the desired output power at the speaker Normal receive levels independent of the peaks at Tip Ring can be 35mVrms 27dBm Although on long lines That level can be down to 8 0mVrms 40dBm The speaker power is _ 10dBm 10x0 6 Rs Where Rg is the speaker impedance and the dBm term is the incoming signal level increased by the gain of the receive PSPK Equation 1 path Experience has shown that 30dB gain is a satisfactory amount for the majority of applications Using the above numbers and Equation 1
17. DC level is Vs T Output of the transmit attenuator DC level is approximately Vg Input to the transmit attenuator Max Signal level is 350m Vrms Input impedance is 10KQ Output of the microphone amplifier The gain of the amplifier is set by external resistors i ifier 3 FO FI CD Vcc HTI XO TXI CO MCI Input and summing node of the microphone amplifier DC level is Vg MUT VLC Cr Ve CPT RXI RXO CPR ND Volume control input When VLC Vg the receive attenuator is at maximum gain when in the receive mode When VLC 0 3Vz the receive gain is down 35dB Does not affect the transmit mode Mute input A logic low lt 0 8V sets normal operation A logic high gt 2 0V mutes the microphone amplifier without affecting the rest of the circuit Input impedance is norminally 90KQ OoOo An RC at this pin sets the response time for the circuit to switch modes TLI2 Input to the transmit level detector on the mike speaker side TLO2 Output of the transmit level detector on the mike speaker side and input to the transmit background monitor RLO2 Output of the receive level detector on the mike speaker side RLI2 Input to the receive level detector on the mike speaker side Input to the receive attenuator and dial tone detector Max input level is 350mV RMS Input An output voltage Vcc 2 This voltage is a system ac ground and biases the volume control A filter cap is required An RC at this pin sets the time constant for
18. O 0 TSA 0 O TS34118 Voice Switched Speakerphone Circuit Supply Voltage Range 1 0 V to 7 0V lve Current 500nA Microphone Amplifier amp Hybrid Amplifier Gain 40 dB General Description The TS34118 Voice Switched Speakerphone Circuit incorporates the necessary amplifiers attenuators level detectors and control algorithm to form the heart of a high quality hands free speakerphone system Included are a microphone amplifier with adjustable gain and MUTE control Transmit and Receive attenuators which operate in a complementary manner level detectors at both input and output of both attenuators and background noise monitors for both the transmit and receive channels A Dial Tone Detector prevents the dial being attenuated by the Receive background noise monitor circuit Also included are two line drive amplifiers which can be used to form a hybrid network in conjunction with an external coupling transformer A high pass filter can be used to filter out 60HzZ noise in the receive channel or for other filtering functions A Chip Disable pin permits powering down the entire circuit to conserve power on long loops where loop current is at a minimum The TS34118 may be operated from a power supply or it can be powered from the telephone line requiring typically 5 0mA The TS34118 can be interfaced directly to Tip and Ring through a coupling transformer for stand alone operation or it can be used in conjunction with a handset speech network
19. TI in conjunction with an external transformer provide the two to four wire converter for interfacing to the telephone line The gain of the first amplifier HTI to HTO is set by external resistors gain Ry Py in Figure 2 and its output drives the second amplifier the gain of which is internally set at 1 0 Unlike most op amps the amplifiers have all NPN output stage which maximizes phase margin and gain bandwidth This feature ensures stability at gains less than unity as well as with a wide range of reactive loads The open loop gain of the first amplifier is typically 80dB and the gain bandwidth of each amplifier is 1 0MHz see Figure 16 The maximum p p output swing of each amplifier is typically 1 2 volts less than Vcc with an output impedance of lt 10Quntil current limiting is reached typically 8 0mA The output current capability is guaranteed to be a minimum of 5 0mA The bias current at HTI is typically 30nA out of the pin The connections to the coupling transformer are shown in the Block Diagram Figure 2 The block labeled Zbal is the balancing network necessary to match the line impedance The operation of the filter circuit is determined by the external components The circuit within the TS34118 from pins FI to FO is a buffer with a high input impedance gt 1 0MQ and a low output impedance lt 50Q The configuration of the external components determines whether the circuit is a high pass filter as shown in Figure
20. a is the gain of the microphone amplifier measured from the microphone output to TXI typically 35V V or 31dB Gyx is the gain of the transmit attenuator measured from TXI to TXO Gua is the gain of hybrid amplifiers measured from TXO to the HTO HTO differential output typically 10 2V V or 20 1dB Gpr is the gain from HTO HTO to Tip Ring for transmit signals and includes the balance network measured at 0 4V V or 8 0cB Ggz is the side tone gain measured from HTO HTO to the filter input measured at 0 18V V or 15dB Gpr is the gain from Tip Ring to the filter input for receive signals measured at 0 833V V or 1 6dB Geo is the gain of the filter stage measured from the input of the filter to RXI typically OdB at 1 0KHz Gprx is the gain of the receive attenuator measured from RXI to RXO Gsa is the gain of the speaker amplifier measured from RXO to the differential output of the TS34119 typical 22V V or 26 8dB Gac is the acoustic coupling measured from the speaker differential voltage to the microphone output voltage I Transmit Gain The transmit gain from the microphone output Vm to tip and Ring is determined by the output characteristics of the microphone and the desired transmit level For example a typical electret microphone will produce 0 35mVrms under normal speech conditions To achieve 100mVrms at Tip Ring an overall gain of 285V V is necessary The gain of the transmit attenuator is fixed at
21. and or other features of a feature phone Features Microphone amplifier gain set by external resistors mute function included Chip disable for active standby operation On board filter pinned out for user defined function Dial tone detector to inhibit receive idle mode during dial tone presence Compatible with TS34119 speaker amplifier Improved attenuator gain range 52dB between transmit and receive Low voltage operation for line powered applications 3 0 6 5V 4 point signal sensing for improved sensitivity Back ground noise monitors for both transmit and receive paths Standard 28 pin plastic DIP package and SOP package available Ordering Information Part No Operating Temp Package TS34118CD DIP 28 20 70 C TS34118CS SOP 28 Absolute Maximum Rating TS34118 1 20 2004 09 rev B Description Min Typ Max Units Supply voltage pin 4 see Text CD input pin 3 MUT input pin 12 lyg Current pin 15 VLC pin 13 Attenuator input signal voltage pin 9 21 Microphone amplifier Hybrid amplifier gain Load current RXO TXO pins 8 22 MCO pin 10 on HTO pin 6 5 oii Power Supply Vcc supply current Vcc 6 5V CD 0 8V lcc 5 5 8 0 mA Vcc 6 5V CD 2 0V 600 800 HA CD input resistance Vcc Vc p 6 5V Rep 50 90 KQ CD input voltage High VepH 2 0 Vcc V Low Vooi 0 0 8 V Vs output voltage Vcc 3 5V V 1 3 v Vcc 5 0V j 1
22. e R1 R3 ratio and Equation 10 can be used to determine the R4 R2 ratio In Figure 10 R1 R4 each represent the combined impedance of the resistor and coupling capacitor at each level detector input The magnitude of each RC s impedance should be kept within the range of 2 0K 15KQ in the voice band due to the typical signal levels present to obtain the best performance from the level detectors The specific R and C at each location will determine the frequency response of that level detector TS34118 17 20 2004 09 rev B TSC S Application Information Dial Tone Detector The threshold for the dial tone detector is internally set at 15mV 10mVrms below Vs see Figure 5 That threshold can be reduced by connecting a resistor from RXI to ground The resistor value is calculated from V R 10K gt 1 AV Where Vs is the voltage at Pin 15 and AV is the amount of threshold reduction By connecting a resistor from Vcc to RXI the threshold can be increased The resistor value is calculated from R 10K Me AV Where AV is the amount of threshold increase Background Noise Monitors For testing or circuit analysis purposes the transmit or receive attenuators can be set to the on position by disabling the background noise monitors and applying a signal so as to activate the level detectors Grounding the CPR pin will disable the receive background noise monitor thereby indicating the presence of speech
23. e same time and b when one talker is in a very noisy environment forcing the other talker to continually override that noise level In general the fast idle mode will occur infrequently TS34118 10 20 2004 09 rev B Attenuator Control Block 4 The circuit will switch to the slow idle mode when a both talkers are quiet no speech present or b when one talker s speech level is continuously overridden by noise at the other speaker s location The time required to switch the circuit between transmit receive fast idle and slow idle is determined in part by the components at the CT pin pin 14 see the section on Switch Time for a more complete explanation of the switching time components A schematic of the CT circuitry is shown in Figure 6 and operates as follows RT is typically 120KQ and CT is typically 5 0uF To switch to the receive mode 11 is turned on I2 is off charging the external capacitor to 240mV above VB An internal clamp prevents further charging of the capacitor To switch to the transmit mode 12 is turned on 11 is off bringing down the voltage on the capacitor to 240mV with respect to VB To switch to idle quickly fast idle the current sources are turned off and the internal 2 0KQ resistor is switched in discharging the capacitor to VB with a time constant 2 0KxCT To switch to idle slowly slowly idle the current sources are turned off the switch at the internal 2 0KQ resistor is open
24. er supply Since Vg biases the microphone and hybrid amplifiers the amount of supply rejection at their outputs is directly related to the rejection at Vg as well as their respective gains Depicts this graphically The Chip Disable pin 3 permits powering down the IC to conserve power and or for muting purposes With CDs0 8 volts normal operation is in effect With CD 2 2 0 volts and lt Vcc the IC is powered down In the powered down mode the microphone and the hybrid amplifiers are disable and their outputs go to a high impedance state Additionally the bias is removed from the level detectors The bias is not removed from the filter pins 1 2 The attenuators pin 8 9 21 22 or from pin 13 14 and 15 the attenuators are disabled however and will not pass a signal The input impedance at CD is typically 90KQ has a threshold of 1 5 volts and the voltage at this pin must be kept within the range of ground and Vcc If CD is not used the pin should be grounded Switching Time The switching time of the TS34118 circuit is dominated by the components at Cy pin 14 refer to Figure 6 and secondarily by the capacitors at the level detector outputs RLO1 RLO2 TLO1 TLO2 The time to switch to receive or to transmit from idle is determined by the capacitor at Cy together with the internal current sources refer to Figure 6 The switching time is AT AV x C7 For the typical cause where AV 240mV I 60pA And C is 50uF AT
25. espect to Vg the circuit is in the transmit mode transmit attenuator is at 6 0dB The circuit is in an idle mode when the Cy voltage is equal to Vg Causing the attenuators gain to be halfway between their fully on and fully off positions 20dB each Monitoring the C voltage with respect to Vs is the most direct method of monitoring the circuit s mode The inputs to the Control Block are seven 2 from the comparators operated by the level detectors 2 from the background noise monitors the volume control the dial tone detector and the AGC circuit These seven inputs are described below Level Detectors There are four level detectors two on the receive side and two on the transmit side Refer to Figure 4 The terms in parentheses from one system and the other terms from one system Each level detector is a high gain amplifier with back to bank diodes in the feedback path resulting in non linear gain which permits operation over a wide dynamic range of speech levels The sensitivity of each level detector is determined by the external resistor and capacitor at each input TLI1 TLI2 RLI1 and RLI2 Each output charge an external capacitor through a diode and limiting resistor thus providing a do representation of the input as signal level The outputs have a quick rise time determined by the capacitor and an internal 3500 resistor and a slow decay time set by an internal current source and the capacitor The capacitors on the fo
26. esults in I4 Gur x Gro Equation 9 R4 Gua x Grx x Gua R2 Gig xG x2 This equation defines the line voltage at Tip Ring necessary to switch comparator C2 in the presence of a microphone voltage The highest V occurs when the circuit is in the transmit mode Grx 6 0dB Using the typical numbers for Equation 10 yields VL Vn Equation 10 V_ 840V y or Vy 0 0019 V_ Equation 11 At idle where the gain of the two attenuators is 20dB 0 1V V Equations 6 and 10 yield the same result Vm 0 024V Equation 12 Equations 7 11 and 12 define the thresholds for switching and are represented in the following graph TS34118 16 20 2004 09 rev B TSC S Design Equations YM Mtx p Figure 11 Switching Threshold YL The M terms are the slopes of the lines 0 52 0 024 and 0 0019 which are the coefficients of the three equations The Mrx line represents the receive to transmit threshold in that it defines the microphone signal level necessary to switch to transmit in the presence of a given receive signal level The Myx line represents the transmit to receive threshold The M line represents the idle condition and defines the threshold level on one side transmit or receive necessary to overcome noise on the other Some comments on the above graph Acoustic coupling and side tone coupling were not included in Equations 7 and 12 Those couplings will affect the actual performance of
27. etected the appropriate signal levels since their outputs operate the Attenuator Control Block Referring to Figure 4 the rise time of the level detector s outputs to new speech is quick by comparison 1 0ms determined by the internal 350Qresistor and the external capacitor typically 2 0UF The output s decay time is determined by the external capacitor and an internal 4 0uF current source giving a decay rate of 60ms for 120mV excursion at RLO or TLO However the overall response time of the circuit is not a constant since it depends on the relative strength of the signals at the different level detectors as well as the timing of the signals with respect to each other The capacitors at the four outputs RLO1 RLO2 TLO1 TLO2 must be equal value 10 to prevent problems in timing and level response The rise time of the level detector s outputs is not significant since it is so short The decay time however provides a significant part of the hold time necessary to hold the circuit during the normal pauses in speech The components at the inputs of the level detectors RLI1 RLI2 TLI1 TLI2 do not affect the switching time but rather affect the relative signal levels required to switch the circuit as well as the frequency response of the detectors Design Equations Referring to Figure 10 the coupling capacitors have been omitted for simplicity the following definitions will be used all measurements are at 1 0KHz Gm
28. ld have the tendency to switch to the idle mode By disabling the receive idle mode the dial tone remains at the normally expected full level To Rx Attenuator To Attenuator Control Block Figure 5 Dial Tone Detectors TS34118 9 20 2004 09 rev B The Attenuator Control Block has the seven inputs described above The output of the comparator operated by RLO2 and TLO2 microphone speaker side designated C1 The output of the comparator operated by RLO1 and TLO1 TIP Ring side designated C2 The output of the transmit background noise monitor designated C3 The output of the receive background noise monitor designated C4 The volume control The dial tone detector The AGC circuit The single output of the Control Block controls the two attenuators The effect of C1 C4 is as follows X Don t Care y C3 and C4 are not both 0 A definition of the above terms 1 Transmit means the transmit attenuator is fully on 6 0dB and the receive attenuator is at max attenuation 46dB 2 Receive means both attenuators are controlled by the volume control At max Volume the receive attenuator is fully on 6 0dB and the transmit attenuator is at max attenuation 46dB 3 Fast Idle means both transmit and receive speech is present in approximately equal levels The attenuators are quickly switched 30ms to idle until one speech level dominates the other 4 Slow Idle means speech
29. pin 13 is sensed as a voltage with respect to Vg The volume control affects the attenuators only in the receive mode It has no effect in the idle or transmit modes When in the receive mode the gain of the receive attenuator will be 6 0dB and the gain of the transmit attenuator will be 46dB only when VLC is equal to Vg As VLC is reduced below Vz the gain of the receive attenuator is reduced see Figure 14 and the gain of the transmit attenuator is increased such that their sum remains constant Changing the voltage at VLC changes the voltage at Cy see the Attenuator Control Block section which in turn controls the attenuators The volume control setting does not affect the maximum attenuator input signal at which noticeable distortion occurs The bias current at VLC is typically 60nA out of the pin and does not vary significantly with the VLC voltage or with Vcc Dial Tone Detectors The dial tone detector is a comparator with one side connected to the receive input RXI and the other input connected to Vp with a 15mV offset see Figure 5 If the circuit is in the receive mode and the incoming signal is greater than 15mV 10mVrms the comparator s output will change disabling the receive idle mode The receive attenuator will then be at a setting determined solely by the volume control The purpose of this circuit is to prevent the dial tone which would be considered as continuous noise from fading away as the circuit wou
30. pling speaker to microphone The only practical and economical solution used to data is to design the speakerphone to function in a half duplex mode i e only one person speaks at a time while the other listens To achieve this required a circuit which can detect who is talking switch on the appropriate path transmit or receive and switch off attenuate the other path In this way the loop gain is maintained less than unity When the talkers exchange function the circuit must quickly detect this and switch the circuit appropriately By providing speech level detectors the circuit operates in a hands free mode eliminating the need for a push to talk switch The handset by the way has the same loop as the speakerphone But since the gains are considerably lower and since the acoustic compiling from the earpiece to the mouthpiece is almost non existent the receiver is normally held against a person s eat oscillations don t occur The TS341118 provides the necessary level detectors attenuators and switching control for a properly operating speakerphone The detection sensitivity and timing are externally controllable Additionally the TS34118 provides background nodule monitor s which make the circuit insensitive to room and line noise hybrid amplifier and other associated functions please refer to the Block Diagram Figure 2 when reading the following sections Attenuators The transmit and receive attenuators
31. the final speakerphone due to their interaction with speech at the microphone and the receive signal coming in at Tip Ring The effects of those couplings are difficult to predict due to their associated phase shifts and frequency response In some cases the coupling signal will add and other times subtract from the incoming signal The physical design of the speakerphone enclosure as well as the specific phone line to which it is connected will affect the acoustic and side tone couplings respectively The Mpx line helps define the maximum acoustic coupling allowed in a system which can be found from the following equation G Equation 13 AC MAX Z T quation 2 x R3 x Gua Equation 13 is independent of the volume control setting Conversely the acoustic coupling of a designed system helps determine the minimum slope of that line Using the component values in Equation 13 yields a Gacmax of 37qB Experience has shown however that an acoustic coupling loss of gt 40dB is desirable The Mzx line helps define the maximum side tone coupling Gs allowed in the system which can be found from the following equation Gst n Equation 14 ST 2x R2x G q Using the component values in Equation 14 yields a maximum side tone of OdB Experience has shown however that a minimum of 6 0dB loss is preferable The above equations can be used to determine the resistor values for the level detector inputs Equation 6 can be used to determine th
32. the transmit background monitor impedance is 10KQ RXO Output of the receive attenuator DC level is approximately Vg TLI1 Input to the transmit level detector on the line side TLO1 Output of the transmit level detector on the line side RLO1 Output of the receive level detector on the line side and input to the receive background monitor RLI1 Input to the receive level detector on the line side CPR An RC at this pin sets the time constant for the receive background monitor Ground pin for the entire IC 1 2 3 4 5 7 10 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 TS34118 5 20 2004 09 rev B 51K 0 1 w f X1 Instr 10K HTI Amplifier To Dist Analyzer Vee CPTI Background Noise Monitor Background CPR T L i ee ost Alternator z Control __ sl a 21 es a TLOL Figure 2 TS34118 Block Diagram TS34118 6 20 2004 09 rev B TSC Introduction The fundamental difference between the operation of a speakerphone and a handset is that of half duplex versus full duplex The handset is full duplex since con version can occur in both directions transmit and receive simultaneously A speakerphone has higher gain levels in both paths and attempting to converse full duplex results in oscillatory problems due to the loop that exists within the system The loop is formed by the receive and transmit paths the hybrid and the acoustic cou
33. und Noise Monitors The purpose of the background noise monitors is to distinguish speech which consists of bursts from background noise a relatively constant signal level There are two background noise monitors one for the receive path and one for the transmit path Referring to Figure 4 the receive background noise monitor is operated on by the RLI1 PLO1 level detector while the transmit background noise monitor is operated on by the TLI2 TLO2 level detector They monitor the background noise by storing a dc voltage representative of the respective noise levels in capacitors at CPR and CPT The voltages at these pins have slow rise times determined by the external RC but fast decay times If the signal at RLI1 or TLI2 changes slowly the voltage at CPR or CPT will remain more positive than the voltage at the non inverting input of the monitor s output comparator When speech is present the voltage on the non inverting input of the comparator will rise quicker than the voltage at the inverting input due to the burst characteristic of speech causing its output to change This output is sensed by the Attenuator Control Block The 36mV offset at the comparator s input keeps the comparator from changing state unless the speech level exceeds the background noise by 4 0dB The time constant of the external RC 4 7 seconds determines the response time to background noise variations Volume Control The volume control input at VLC
34. ur outputs should have the same value 10 to prevent timing problems Referring to Figure 2 on the receives side one level detector RLI1 is at the receive input receiving thus same signal as at Tip and Ring and the other PLI2 is at the output of the speaker amplifier On the transmit side one level detector TLI2 is at the output of the microphone amplifier while the other TLI1 is at the hybrid output Outputs RLO1 and TLO1 feed a comparator the output of which goes to the Attenuator Control Block Likewise outputs RLO2 and TLO2 feed a second comparator which also goes to the Attenuator Control Block The touch table for the effects of the level detectors on the Control Block is given in the section describing the Control Block Roce eo ee NE Tite se cot ce CPR REN I as Level Detector Background LCCPT 100K TLI2 T Noise Monitor P H ovce 3502 LA eT BAK Five presan 7 rr Signal RLO1 umn l 36m l Input LoTR J TLO2 F H 0 1uF 2 0uF T I Aral ie age J ful an a anor a ie em I Signal Ona a Se ee _YB____J Input a a a a a a ee P otu IC S Level Detector 7 C4 F 641kf I i C3 To Attenuator I 3502 a Control Block T le 1 A l m oe RLI2 ee TLO1 7 I Comparator LASN J3 RLO2 l ee E E E ee E E 2 0uF I 40 T l aL ual Note External Component Values are I 7 application dependent L Figure 4 Level Detectors TS34118 8 20 2004 09 rev B TSC Backgro
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