UNITRODE UC3173A handbook
Contents
1. 0 4 0 100 200 10 100 Output Current mA Output Current mA PRKDRV Current vs VL Supply PWROK vs VL Supply RL 30005 to 2V VC 0V VIN OV T T E E 5 5 5 5 0 0 2 0 4 06 0 8 10 12 1 4 1 6 1 8 20 0 02 0 4 0 6 0 8 1 0 1 2 1 4 1 6 1 8 2 0 VL Supply Voltage Volts VL Supply Voltage Volts VL Current vs PRKDRV Current VL Current vs PWROK Current VL 5V VL 5V VC 1 6V VC 1 6V VL Supply Current mA VL Supply Current mA 50 100 5 10 15 Parking Drive Output Current mA Power OK Output Current mA APPLICATION INFORMATION cont IL Reg Vs Rea AVcs Rs GM Figure 1 Typical application Design Procedure for Application of the UC3173A The following is a simple design flow that can be used to configure the UC3173A Full Bridge Power Amplifiers as shown in Fig 1 Definitions fap the closed loop 3dB bandwidth AyB Bamplifier closed loop gain R6 R5 AyCS current sense amplifier gain 0 5 in high range and 2 0 in low range fepwA gain bandwidth product of the A amplifier GmHR closed loop transconductance in high rangemode closed loop transconductance in low range mode L load inductance RL load resistance A Current Sense Resistor Choose Rs to be as2. UC3173ADWI UC3173A mmm UNITRODE Full Bridge Power Amplifier FEATURES DESCRIPTION e Precision Current Control This full bridge power amplifier rated for continuous output current of e 500 Load Current 0 55A is intended for use in demanding servo applications such as head positioning for high density disk drives This device includes a precision cur e 1 3V Typical Total at 550mA rent sense amplifier that senses load current with a single resistor in series with the load The UC3173A is optimized to consume a minimum of supply current and is designed to operate in both 5V and 12V systems The power e Precision Dual Supply Monitor with output stages have a low saturation voltage and are protected with current Indicator limiting and thermal shutdown When inhibited the device will draw less than 1 5mA of total supply current e Controlled Velocity Head Parking Range Control for 4 1 Gain Change Auxiliary functions on this device include a dual input undervoltage com orl elias fa Pin for parator which can monitor two independent supply voltages and activate E HUS the built in head park function when either is below minimum The park cir e Inhibit Input and UVLO cuitry allows a programmable retract voltage to be applied to the load for limiting maximum head velocity A separate low side parking drive pin per SV 12V Operation mits a series impedance to be inserted to control maximum retract current
3. 5 2 0 if only the low range mode of operation is used F Using The Comp Pin When the range change feature of the UC3173A is used the closed loop bandwidth of the power amplifier will change according to 7 In other words the band width would be four times larger during the low range mode when 5 is equal to 2 than during the high range mode when AyCS is equal to 0 5 unless the value of Rc is adjusted to compensate The COMP pin on the UC3173A can be used to do this The COMP pin acts as a simple switch that allows a par allel compensation network to be applied around the A amplifier during low range operation A simple network as shown here will keep the loop response constant in dependent of the range condition To maintain the same 3dB bandwidth in both the high and low range modes set Rca and Coa to R 9 Roa Cca i APPLICATION INFORMATION cont UDG 94041 The COMP pin switches in a parallel compensation network to stabilize the small signal bandwidth with range changes Head Parking In Fig 2 the UC3173A is shown configured to force a programmed voltage at the A amplifier output upon the activation of a park condition A pair of feedback resistors R1 and R2 set this voltage as defined by VPARK R2 is typically chosen the range of 10 to 100kQ 10 R1 Re The B amplifier output is tri stated during park this side of the load is driven low by the PRKDRV pin
4. A series re sistor RP in the figure can be inserted in series with the load to limit the peak current if required The UV thresholds for the supply monitors are set by picking R4 and R6 values in the 10kQ to 100kQ range and then calculating R3 and R5 according to UV1 UV2 Ra SV anans ne 21 01 13 1 3 10 UC3173A During park supply to the load and the UC3173A is typically recovered from the back EMF of the spindle motor When the supply voltage at the VL supply pin drops below the UVLO voltage 2 3V high to low the output of the A amplifier is forced high over riding the programmed park voltage The UC3173A will maintain drive to the load down to low supply levels For example with 1 5 volts of recovered back EMF the UC3173A can still deliver 50mA of drive to a 10Q load Parking With Very Low Back EMF The UC3173A can also be configured to get parking drive to the load with very low recovered back EMF Fig 3 illustrates how the PWROK pin can be used to drive an external PNP device to achieve very low parking drive Vsar losses With this configuration the UC3173A will be able to force approximately one volt across the load with a recovered back EMF voltage of 1 3V During system commanded parking with the supplies present the VPARK pin is still used to set the maximum voltage to the load The logic function of the PWROK pin is still available since the external PNP will provide isola tion to this
5. 12mA Quiescent Supply Current The parking drive function can be configured to operate with supply volt ages as low as 1 2V PLCC SOIC and Low Profile Quad Flat Pack Packages The closed loop transconductance of the configured power amplifier can be switched between a high and low range with a logic input The 4 1 change in gain can be used to extend the dynamic range of the servo loop Band width variations that would otherwise result with the gain change can be controlled with a compensation adjust pin BLOCK DIAGRAM AOUT BOUT 11 12 14 15 8 AN IN Bias Off Bias Off Tri Stated AIN 9 Enable 13V REFIN 18 Current Sense 16k Amplifier L L P z COMPARATOR is Bias Supply gt Logic Supply L UDG 94039 04 99 ABSOLUTE MAXIMUM RATINGS Note 1 Input Supply Voltage VIN VC 20V UV Comparator Maximum Forced Voltage 0 3V to 10V Maximum Forced t10mA B Amplifier Inverting Input 0 3V to VIN 1 0 A Amplifier Inverting Inputs Aux and Normal 0 3V to VC 1 0V Open Collector Output 20V A and B Output Currents Continuous SOUICE uia Internally Limited Sin er EM DE 0 6A Parking Drive Output C
6. 50 100 150 200 A or B Amplifier High Side Vga Increase mVolts UC3173A by any one of the following four conditions 1 a low con dition on either of the UV inputs 2 a high input level at the Park input 3 a UVLO condition at the VL supply pin and 4 activation of the TSD thermal shutdown protec tion circuit During a UVLO condition at the VL pin the auxiliary inputs to the A amplifier are over ridden and the A amplifier output is forced to its high state UV1 amp 2 Inputs to the UV comparator these inputs are high impedance sensing points used to monitor external supply conditions Either of the inputs going low will force the device into a park condition and force the PWROK output to an active low state If either of these inputs is not used it should be connected to a voltage greater than 1 3V A and B Amplifier Total Total Volts 100 200 300 400 Output Current mA PWROK Saturation Voltage Power OK Va Volts 15 Power OK Output Current mA UC3173A APPLICATION INFORMATION cont A Amplifier High Side V amp 4 in Park Mode PRKDRV Saturation Voltage 1 2 VIN 0V VC 2 VL 2V 1 1 1 0 0 9 0 8 0 7 Parking Drive Volts 0 6 0 5 A Amp High Side SAT VC to AOUT Volts
7. information regarding any third party s products or services does not constitute Tl s approval warranty or endorsement thereof Copyright 1999 Texas Instruments Incorporated
8. large as head room will tolerate this is the series current sense resistor B Select Feedback Resistance Choose a value of Rfg to be less than the peak current sense amplifier swing divided by 1mA A value in the range of 3k to 10k is suggested C Set Transconductance Calculate Rea according to UC3173A AVcs Current Sense Amplifier Gain 2 0 Low Range 0 5 High Range UDG 94040 Res 1 0 5 Rs Gmun Rea If the range change option is not going to be used it is recommended that the device be set in the low range mode and RFA be calculated by R Rep 2 FA R 2e S e D Optimize Voltage Swing In order to assure that maximum voltage drive to the load is achievable there are some precautions that should be taken In a standard configuration the B am plifier is slaved to the A amplifier The bias point of the and the gain of the B amplifier as well as the saturation voltages of the power output stages will affect the volt age available to the load There are two simple procedures to follow either will insure that the capabilities of the device are fully utilized The first is to set the REFIN voltage at the center of the available voltage swing at the output of the power amplifiers This optimum reference is defined by equation 3 APPLICATION INFORMATION cont VIN Vus sar Vis sar 3 VneriN Optimum 5 Where Vusysat high side Vsar at maximum load Vis sar low si
9. 7 V High Side lour 300mA Note 5 0 8 V High Side lout 550mA Note 5 0 95 V Low Side lout 100mA 0 2 V Low Side lout 300mA 0 25 V Low Side lout 550mA 0 35 V Total Vsat lout 100mA 0 9 1 2 V Total VsAr lout 300mA 1 05 1 4 V Total Vsat lout 550mA 1 3 1 7 V VC to VIN Headroom Volts below VIN delta High Side Vsat 100mV 0 23 0 4 V 550mA Note 5 High Side Diode Vr Ip 550mA 1 0 V Low Side Diode Vr Ip 550mA INH Activated B Amplifer Only 1 0 V UC3173A ELECTRICAL CHARACTERISTICS Unless otherwise stated these specifications apply for TA 0 to 70 VIN 5V VC VIN VL REFIN VIN 2 RANGE PARK and INH OV and TA Ty PARAMETER TEST CONDITIONS MIN TYP MAX UNITS Current Sense Amplifier Input Offset Voltage Vom 2 5V Low range mode 2 0 mV Vom 2 5V High range mode 4 0 mV Input Offset Change with Common Vom 1V to 13V Supplies 12V Low Range Mode 2000 uV V Mode Input Vom 1V to 13V Supplies 12V High Range Mode 4000 uV V Voltage Gain Vpirr 41 0 to 1 0 Vom 2 5V High Range Mode 0 485 0 50 0 515 V V Vpirr 1 0 to 1 0V Vom 2 5V Low Range Mode 1 95 2 0 2 05 V V Saturation Voltage Low Side lout 1mA 0 1 0 3 V High Side lout 1mA Referenced to VIN 0 1 0 3 V Parking Function Park Input Threshold Voltage 0 6 1 1 1 7 V Park Input Threshold Current Internal Pull
10. C supply pin can operate about 400mV below the VIN supply input without affecting the performance PIN DESCRIPTIONS AIN Inverting input to the A amplifier Used as the sum ming node to close the loop on the overall power ampli fier AOUT Output for the A power amplifier providing one end of the differential drive to the load during normal op eration and during park During a UVLO condition at the VIN supply pin this output is forced to a high source only state When the UC3173A is inhibited this output will be set high in a source only state BIN Inverting input to the B amplifier Used to program the gain of the B amplifier to guarantee maximum volt age swing to the load BOUT Output for the B power amplifier providing one end of the differential drive to the load during normal op eration During park and while inhibited this pin is tristated COMP The compensation adjust pin allows the user to provide an auxiliary compensation network for the A am plifier that is only active when the current sense amplifier is in the low range With this option the user can control the change in bandwidth that would otherwise result from the gain change in the feedback loop CS The inverting input to the current sense amplifier is typically tied to the load side of the series current sense resistor This pin can be pulled below ground during an abrupt load current change with an inductive load Proper operation of the current sen
11. IN VIN 2 RANGE PARK and INH OV and TA Ty PARAMETER TEST CONDITIONS MIN TYP MAX UNITS Input Supply VIN Supply Current 10 13 mA VC Supply Current lout 0A 1 2 2 0 mA VL Supply Current 0 65 1 0 mA Total Supply Current Supplies 5V loyt 0A 12 16 mA Supplies 12V lour 0A 13 18 mA VL UVLO Threshold Low to High 2 6 2 8 V UVLO Threshold Hysteresis 300 mV Under Voltage UV Comparator Input Bias Current Max at Either UV Input 0 25 1 0 uA UV Thresholds Low to High Other Input 5V 1 28 1 3 1 32 V UV Threshold Hysteresis 19 24 29 mV PWROK Vsat lout 5mA UV Input Low 0 15 0 45 V PWROK Leakage Vout 20V 5 uA Power Amplifiers A and B Input Offset Voltage A Amplifier Vom 2 5V 4 mV B Amplifier Vom 2 5V 12 mV Input Bias Current Vom 2 5V Inverting Inputs Only 150 500 nA Input Bias Current at Ref Input REFIN CS 48kQ Ty 25 C 15 21 27 CMRR Vom 1V to 10V Supplies 12V 70 90 dB PSRR VIN 4V to 15V 1 5V 70 90 dB Large Signal Voltage Gain Supplies 12V Vout 1V lout 300mA to 3 0 15 0 V mV Vout 11V lout 300mA Gain Bandwidth Product A Amplifier Note 4 2 0 MHz B Amplifier Note 4 1 0 MHz Slew Rate Note 4 1 0 V us High Side Current Limit Low Range Mode 0 6 0 8 A High Range Mode 1 1 1 6 A Output Saturation Voltage High Side lour 100mA Note 5 0
12. Up VIN 0 6V 50 75 uA Park Drive Saturation Voltage lout 50mA 0 15 0 35 V Park Drive Leakage Vout 20V 50 uA Regulating Voltage at Park Volts Input 1 275 1 30 1 325 V Amplifier A Auxiliary Input Bias Current 300 750 nA Amplifier A Parking High Side lout 50mA VIN OV VC VL 5V PARK Open 0 8 0 95 V Saturation Voltage VC to Vout Minimum Parking Supply At VC and VL VIN OV 1 4 1 7 V A Amplifier Out Vsar PRKDRV gt 0 5V Ipark 50mA Minimum Supply for Parking Drive and At VL VC VIN OV Vsar lt 0 5V 1 1 1 4 V Power OK Operation lout PRKDRV 50mA RI 300 to 2V lout PWROK 5mA RI 300Q to 2V 1 2 1 6 V VL Parking Supply Current PARK Open VL 5V VC 1 6V VIN OV 1 6 3 0 mA PWROK lout 5mA PRKDRV lour 50mA Auxiliary Functions Inhibit Input Threshold 0 6 1 1 1 7 V Inhibit Input Current INH 1 7V 0 5 1 0 uA Range Input Threshold 0 6 1 1 1 7 V Range Input Current RANGE 1 7V 50 100 uA Comp Adjust Pin Saturation Voltage RANGE OV Pin Current 500uA 0 02 0 1 V Referenced to Aout Comp Adjust Leakage Current RANGE 1 7V Supplies 12V 5 uA Aout Vcomp 6V Total Supply Current when Inhibited VIN VC and VL currents 1 0 1 5 mA Thermal Shutdown Temperature Note 4 165 Note 4 Guaranteed by design Not 100 tested in production Note 5 The high side saturation performance of the UC3173A is referenced to the VIN supply pin The V
13. de Vsar at maximum load A second approach is to raise the gain of the B amplifier to insure maximum swing For a given REFIN voltage the gain of the B amplifier set by the ratio of the feedback resistors can be made greater than unity as given by VIN Vus sar VREF 4 A vB Or VngriN Vis sat VngriN Vis sar VIN Vus sar VREF whichever is greater than unity For a typical case where Vperin has been set at VIN 2 the required gain for a 5 volt system will be about 1 5 and for a 12 volt system 1 2 It is worth noting that when using this method the B am plifier will saturate before the A amplifier on one polarity of the voltage swing During the time when the B ampli fier is saturated and the A amplifier is not the small sig nal bandwidth of the loop will be reduced by a factor of AyB 1 E Loop Compensation The normal configuration for compensation of the power amplifier is shown in Fig 1 A simple Rc network around the A amplifier is all that is required The value of the RcCc time constant is typically chosen to correspond to the electrical time constant of the load given by Rj L The bandwidth of the closed loop amplifier can be set by choosing the value of Rc Calculate according to _ __ ml e fag Peg 5 1 AJBJACS Rg Use AyCS 0 5 if range changing is to be used and AyCS 2 0 if only the low range mode of operation is to be used The compensation
14. il able to the load This supply pin provides drive to the power amplifiers during a parking operation VIN Provides bias supply to both the power amplifiers and the current sense amplifiers The high side drive to the power stages on both the A and B amplifiers is refer enced to this pin The high side saturation voltages are specified and measured with respect to this supply pin The parking function of the device is fully operational in dependent of the voltage at this pin PIN DESCRIPTIONS cont VL Logic portions of the UC3173A are powered by this supply pin including the reference UVLO the UV com parators and the PRKDRV and PWROK outputs This pin is a low current supply that would normally be tied to the VC pin or to a parking hold up capacitor for ex tended parking operation with very low recovered back emf VPARK The auxiliary inverting input to the A amplifier activated during park conditions on the UC3173A An in ternal auxiliary non inverting input is connected to the 1 3V reference When the auxiliary inputs are activated the A amplifier will force a programmed voltage at its out put for a maximum back emf velocity retract of the head The park condition on the UC3173A is always activated APPLICATION INFORMATION A and B Amplifier High and Low Vs4rs 1 HIGH SIDE LOW SIDE 100 200 300 400 500 Output Current mA VIN to VC Headroom 0 25 125 0
15. ingement and limitation of liability TI warrants performance of its semiconductor products to the specifications applicable at the time of sale in accordance with Tl s standard warranty Testing and other quality control techniques are utilized to the extent TI deems necessary to support this warranty Specific testing of all parameters of each device is not necessarily performed except those mandated by government requirements CERTAIN APPLICATIONS USING SEMICONDUCTOR PRODUCTS MAY INVOLVE POTENTIAL RISKS OF DEATH PERSONAL INJURY OR SEVERE PROPERTY OR ENVIRONMENTAL DAMAGE CRITICAL APPLICATIONS TI SEMICONDUCTOR PRODUCTS ARE NOT DESIGNED AUTHORIZED OR WARRANTED TO BE SUITABLE FOR USE IN LIFE SUPPORT DEVICES OR SYSTEMS OR OTHER CRITICAL APPLICATIONS INCLUSION OF TI PRODUCTS IN SUCH APPLICATIONS IS UNDERSTOOD TO BE FULLY AT THE CUSTOMER S RISK In order to minimize risks associated with the customer s applications adequate design and operating safeguards must be provided by the customer to minimize inherent or procedural hazards Tl assumes no liability for applications assistance or customer product design TI does not warrant or represent that any license either express or implied is granted under any patent right copyright mask work right or other intellectual property right of TI covering or relating to any combination machine or process in which such semiconductor products or services might be or are used Tl s publication of
16. l 60 C W Thermal Resistance Junction to Ambient 110 120 C W QP Package Thermal Resistance Junction to Leads 6jl 15 C W Thermal Resistance Junction to Ambient 60ja 30 40 C W Note 2 The above numbers for 0jl are maximums for the limiting thermal resistance of the package in a standard mounting con figuration The numbers are meant to be guide lines for the thermal performance of the device pc board system All of the above numbers assume no ambient airflow Note 3 Consult Packaging Section of Unitrode Integrated Cir cuits databook for thermal specifications and limitations of pack ages SOIC 24 Top View DW Package INH GND UV2 CSOUT UV1 VL PARK PRKDRV RANGE PWROK 5 cS COMP VPARK AIN Vc PLCC 28 Top View QP Package INH UV2 UV1 PARK GND CSOUT 432 1282726 RANGE 25 PRKDRV CS4 24 PWROK COMP 1 23 8 VPARKH 22 REFIN 21 VC 20 VIN AOUT t1 9 BOUT 1 12 13 14 15 16 17 18 PGND PGND PGND PGND PGND PGND PGND UC3173A ELECTRICAL CHARACTERISTICS Unless otherwise stated these specifications apply for TA 0 to 70 VIN 5V VC VIN VL REF
17. ng parking in place of the B amplifier A series resistor can be added between this pin and the load to limit current during park PWROK Indicates with an active low condition that ei ther of the UV inputs are low or that the supply voltage at the VL input to the UC3173A has dropped below the UVLO threshold This output will remain active low until the VL supply has dropped to below approximately 1 2V RANGE When this pin is open or at a logic low poten tial the current sense amplifier will be in its low range mode In this mode the voltage gain of the amplifier will be 2 If this pin is brought to a logic high the gain of the current sense amplifier will change into its high range value of 0 5 This factor of four change in gain will vary the overall transconductance of the power amplifier by the same ratio with the transconductance being the highest in the high mode This feature allows improved dynamic range of load current control for a given control input range and resolution REFIN Reference for input control signals to the power amplifier as well as the noninverting inputs to the A and B amplifiers and the output level shift for the CS ampli fier VC High current supply to the collectors of the high side NPN output devices on the A and B amplifiers This sup ply should be powered whenever the A or B amplifiers are activated This pin can operate approximately 400mV below the VIN supply without affecting the voltage ava
18. output when it is high Base drive to the PRKDRV and PWROK pins are pro vided by the VL supply pin By using a hold up capacitor the drive can be maintained to the load as the back EMF drops to below 1V A variation on this ap proach is to add a connection between the VL pin and the recovered back EMF this will eliminate the need for the holdup capacitor and provide operation down to about 1 2V of back EMF recovery Care with this ap proach should be taken in case the 5V supply hangs at just below the programmed UV threshold In this situa tion large currents could flow from this supply through the external PNP and into the A output which until the supply drops below a certain level is forcing a pro grammed voltage UV COMPARATOR Figure 3 Head parking with low back EMF UNITRODE CORPORATION 7 CONTINENTAL BLVD MERRIMACK NH 03054 TEL 603 424 2410 FAX 603 424 3460 11 UC3173A UDG 94042 UDG 94043 IMPORTANT NOTICE Texas Instruments and its subsidiaries TI reserve the rightto make changes to their products or to discontinue any product or service without notice and advise customers to obtain the latest version of relevant information to verify before placing orders that information being relied on is current and complete All products are sold subject to the terms and conditions of sale supplied at the time of order acknowledgement including those pertaining to warranty patent infr
19. se amplifier will result if this pin does not go below ground by an amount greater than REFIN 2 0 3V in low range mode and 2 REFIN 0 9V in high range mode CS The noninverting input to the current sense ampli fier is typically tied to the connection between the A am plifier output and the current sense resistor connected in series with the load CSOUT The output of the current sense amplifier has a 1 5mA current source pull up and an active NPN pull down The output will pull to within 0 3V of either rail with a load current of less than 1mA GND Reference point for the internal reference UV comparator and other low level circuitry INH A high impedence logic input that disables the A and B power amplifiers as well as the Current Sense amplifier The UV comparators and logic functions of the UC3173A remain active This input has an internal pull up that will inhibit the device if the input is left open The Inhibit function is overridden by any condition that forces the Park function to be activated UC3173A PARK Input that forces the park condition on the UC3173A This input has an internal pull up that will force the park condition if the pin is left open PGND Current return for all high level circuitry this pin should be connected to the same potential as GND PRKDRV A 100mA drive output that is active low during a park operation This pin is normally used to supply the lowside drive to the load duri
20. urrent CODLlDUOUS 150 pulsed E d DM EL EE A E e ery 1A Output Diode Current 0 6A Power OK Output Current Continuous 30mA Operating Junction Temperature 55 C to 150 C Storage Temperature 65 to 150 C Lead 300 Note 1 Unless otherwise indicated voltages are referenced to ground and currents are positive into negative out of the speci fied terminals Pulsed is defined as a less than 10 duty cycle pulse with a maximum duration of 500us CONNECTION DIAGRAMS TQFP 48 Top View FQ Package N C N C REFIN cS 34 PWROK PRKDRV 48 47 46 45 44 43 42 41 40 39 38 37 1 O 36 35 34 32 31 29 28 27 26 25 13 14 15 16 17 18 19 20 21 22 23 24 UC3173A THERMAL DATA DW Package Thermal Resistance Junction to Leads 0jl 35 C W Thermal Resistance Junction to Ambient 60 70 C W FQ Package Thermal Resistance Junction to Leads 6j
21. zero is typically set to coincide with the L R time constant of the Load Cc can then be calcu lated by TAPER RN 6 Rc Rs In the closed loop transconductance amplifier the A am UC3173A plifier operates at the highest noise gain Noise gain is a measure of the feedback ratio at which the amplifier is operating For the configuration of the A amplifier in Fig 1 the noise gain is given by the impedance ratio of the Rc Cc series network to the parallel combination of Rea and Rep For the A amplifier to operate at its expected closed loop gain the noise gain at any frequency must not exceed its Gain Bandwidth Product GBW divided by that frequency Applying this to the expression above will yield a result for the maximum 3dB bandwidth that can be achieved for a given configuration saB MAX 7 fag A 1 AJB e AJCS Rg eR 1 2 e Reg Rep 2 Where fagwA is the GBW of the A amplifier In the UC3173A to accommodate wider power amplifier bandwidths the GBW Product of the A amplifier has been extended to 2MHz Care should be taken that the A amplifier gain bandwidth product is not limiting the closed loop performance of the configured power ampli fier This is easily checked by making sure that is less than a critical value Remax as given by 8 fopwA e2nL e Rea 1 1 5 5 Rgg 2 Again use AyCS 0 5 if range changing is used and
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UNITRODE UC3173A handbook