ST 74V1T00 handbook
Contents
1. 8 9 74V1T00 Information furnished is believed to be accurate and reliable However STMicroelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics Specifications mentioned in this publication are subject to change without notice This publication supersedes and replaces all information previously supplied STMicroelectronics products are not authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics The ST logo is a registered trademark of STMicroelectronics All other names are the property of their respective owners 2004 STMicroelectronics All Rights Reserved STMicroelectronics GROUP OF COMPANIES Australia Belgium Brazil Canada China Czech Republic Finland France Germany Hong Kong India Israel Italy Japan Malaysia Malta Morocco Singapore Spain Sweden Switzerland United Kingdom United States http www st com ky 9 92. CS03600 4 9 574 74V1T00 SOT23 5L MECHANICAL DATA gt D gt e we e e e 7049676C SI 5 9 74V1T00 SOT323 5L MECHANICAL DATA mm mils DI z lt U gt x IN TYP MAX A 0 80 RS 1 10 31 5 43 3 Ai e 0 10 0 0 39 A2 0 80 ie 1 00 31 5 39 4 b 0 15 og 0 30 5 9 11 8 C 0 10 dd 0 18 3 9 7 1 D 1 80 e 2 20 70 9 86 6 E 1 80 a 2 40 70 9 94 5 E1 1 15 1 35 45 3 53 1 e 0 65 25 6 el 1 3 51 2 L 0 10 0 30 3 9 11 8 A el C e e mj ja ja A A1 a E1 E Li L Y i aP D di gt Tape amp Reel SOT23 xL MECHANICAL DATA 74V1T00 inch i Ao Note Drawing not in scale 7 9 74V1T00 Tape amp Reel SOT323 xL MECHANICAL DATA inch 1 i N e Y Y A i i U aot Po Bo E AY Oh 2 U nj IL Ko cel AQ e Note Drawing not in scale
3. SZA 74V1T00 SINGLE 2 INPUT NAND GATE HIGH SPEED tpp 5 0ns TYP at Voc 5V LOW POWER DISSIPATION Icc 1HA MAX at Ta 25 C m COMPATIBLE WITH TTL OUTPUTS Vin 2V MIN Vi 0 8V MAX m POWER DOWN PROTECTION ON INPUTS m SYMMETRICAL OUTPUT IMPEDANCE oni lot 8mA MIN at Voc 4 5V m BALANCED PROPAGATION DELAYS tpLH ipHL m OPERATING VOLTAGE RANGE Vec OPR 4 5V to 5 5V m IMPROVED LATCH UP IMMUNITY DESCRIPTION The 74V1T00 is an advanced high speed CMOS SINGLE 2 INPUT NAND GATE fabricated with sub micron silicon gate and double layer metal wiring CZMOS technology The internal circuit is composed of 3 stages including buffer output which provide high noise immunity and stable output PIN CONNECTION AND IEC LOGIC SYMBOLS 1B GND SC12240 April 2004 e SOT23 5L SOT323 5L ORDER CODES PACKAGE T amp R SOT23 5L 74V1TOOSTR SOT323 5L 74V1TOOCTR Power down protection is provided on all inputs and 0 to 7V can be accepted on inputs with no regard to the supply voltage This device can be used to interface 5V to 3V 1 she LC13610 1 9 74V1T00 INPUT AND OUTPUT EQUIVALENT CIRCUIT PIN DESCRIPTION PIN N SYMBOL NAME AND FUNCTION 1 1A Data Input 2 1B Data Input 3 GND Ground 0V 4 1Y Data Output 5 Voc Positive Supply Voltage TRUTH TABLE A B Y L L H SC1194
4. 0 L H H H L H H H L ABSOLUTE MAXIMUM RATINGS Symbol Parameter Value Unit Voc Supply Voltage 0 5 to 7 0 V VI DC Input Voltage 0 5 to 7 0 V Vo DC Output Voltage 0 5 to Vcc 0 5 V lik DC Input Diode Current 20 mA lok DC Output Diode Current 20 mA lo DC Output Current 25 mA Icc or lanp DC Vec or Ground Current 50 mA Tstg Storage Temperature 65 to 150 C TL Lead Temperature 10 sec 300 C Absolute Maximum Ratings are those values beyond which damage to the device may occur Functional operation under these conditions is not implied RECOMMENDED OPERATING CONDITIONS Symbol Parameter Value Unit Voc Supply Voltage 4 5 to 5 5 V VI Input Voltage 0 to 5 5 V Vo Output Voltage 0 to Vec V Top Operating Temperature 55 to 125 C dt dv Input Rise and Fall Time note 1 Vcc 5 0 0 5V 0 to 20 ns V 1 Vin from 0 8V to 2V 2 9 2 DC SPECIFICATIONS 74V1T00 Test Condition Value Symbol Parameter Vec Ta 25 C 40 to 85 C 55 to 125 C Unit v Min Typ Max Min Max Min Max Vin High Level Input 4 5to 2 2 2 V Voltage 5 5 Vit Low Level Input 4 5 to 0 8 0 8 0 8 V Voltage 5 5 Von High Level Output 4 5 lo 50 pA 44 45 4 4 4 4 V Voltage 45 lo 8 mA 3 94 3 8 3 7 VoL Low Level Output 4 5 lo 50
5. LA 0 0 0 1 0 1 0 1 V Voltage 45 lo 8 mA 0 36 0 44 0 55 I Input Leakage 0 to V 5 5V or GND 0 1 1 0 1 0 uA Current 5 5 loc Quiescent Supply 5 5 Vi Voc or GND 1 10 20 LA Current tlec Additional Worst One Input at 3 4V 1 35 1 5 1 5 mA Case Supply 5 5 other input at Voc Current or GND AC ELECTRICAL CHARACTERISTICS Input t ty 3ns Test Condition Value Symbol Parameter v c Ta 25 C 40 to 85 C 55 to 125 C Unit cc L V PF Min Typ Max Min Max Min Max tPLH Propagation Delay 5 0 15 5 0 7 0 1 0 8 0 1 0 9 0 ni tpp Time 5 0 50 5 5 8 0 1 0 9 0 1 0 10 0 Voltage range is 5 0V 0 5V CAPACITIVE CHARACTERISTICS Test Condition Value Symbol Parameter Ta 25 C 40 to 85 C 55 to 125 C Unit Min Typ Max Min Max Min Max Cin Input Capacitance 4 10 10 10 pF Cpp Power Dissipation Capacitance 13 pF note 1 1 Cpp is defined as the value of the IC s internal equivalent capacitance which is calculated from the operating current consumption without load Refer to Test Circuit Average operating current can be obtained by the following equation lec opr Cpo X Vec X fin loc KT 3 9 74V1T00 TEST CIRCUIT SC12220 C 15 50pF or equivalent includes jig and probe capacitance R7 Zour of pulse generator typically 500 WAVEFORM PROPAGATION DELAY f 1MHz 50 duty cycle
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ST 74V1T00 handbook