FAIRCHILD NC7S00 handbook
Contents
1. o _ DETAIL X DETAIL X h w SCALE 3X P lt Wo Tape A B c D N w1 w2 w3 Size SA 7 0 0 059 0 512 0 795 2 165 0 331 0 059 0 000 0 567 W1 0 078 0 039 177 8 1 50 13 00 20 20 55 00 8 40 1 50 0 00 14 40 W1 2 00 1 00 www fairchildsemi com 00SZ N NC7S00 Physical Dimensions inches millimeters unless otherwise noted SYMM J 0 95 aly 0 95 2 60 1 00 0 50 0 30 Aroen A 0 70 LAND PATTERN RECOMMENDATION a SEE DETAIL A f NOTES UNLESS OTHERWISE SPECIFIED A THIS PACKAGE CONFORMS TO JEDEC MO 178 ISSUE B VARIATION AA GAGE PLANE DATED JANUARY 1999 wer B ALL DIMENSIONS ARE IN MILLIMETERS 0 55 0 35 0 60 REF SEATING PLANE MAO5BRevC DETAIL A 5 Lead SOT23 JEDEC MO 178 1 6mm Package Number MA05B www fairchildsemi com 6 Physical Dimensions inches millimeters unless otherwise noted Continued 2 00 0 20 CE 1 252010 2 1020 10 os jp ae 0 4 min LAND PATTERN RECOMMENDATION SEE DETAIL A 0 95 0 15 RO0 14 0 30 f 0 20 gt 6 00 i 0 45 0 10 Ja 0 425 NOMINAL DETAIL A NOTES A CONFORMS TO EIAJ REGISTERED OUTLINE DRAWING SC88A B DIMENSIONS DO NOT INCLUDE BURRS OR MOLD FLASH MAAOSARevC C DIMENSIONS ARE IN MILLIMETERS 5 Lead SC70 EIAJ SC 88a 1 25mm2. C Figure Symbol Parameter Units Conditions V Min Typ Max Min Max Number PLh Propagation Delay 5 0 3 5 15 ns C _ 15 pF tPHL 2 0 19 100 125 l 3 0 10 5 27 35 Figures ns Cr S0pF 1 3 4 5 7 5 20 25 6 0 6 5 17 21 try Output Transition Time 5 0 3 0 10 ns C_ 15 pF try 2 0 25 125 155 3 0 16 35 45 Figures ns C 50pF 1 3 4 5 11 25 31 6 0 g 21 26 Cin Input Capacitance Open 2 10 10 pF Cpp Power Dissipation Capacitance 5 0 6 pF Note 3 Figure 2 Note 3 Cpp is defined as the value of the internal equivalent capacitance which is derived from dynamic operating current consumption I cp at no output loading and operating at 50 duty cycle See Figure 2 Cpp is related to Iggp dynamic operating current by the expression Icen Cpp Vec fin ecstatic AC Loading and Waveforms OUTPUT E INPUT INPUT C includes load and stray capacitance Input PRR 1 0 MHz ty 500 ns FIGURE 1 AC Test Circuit OUTPUT FIGURE 3 AC Waveforms Input AC Waveform PRR variable Duty Cycle 50 FIGURE 2 Iccp Test Circuit 3 www fairchildsemi com 00SZON NC7S00 Tape and Reel Specification TAPE FORMAT for SC70 and SOT23 Package Tape Number Cavity Cover Tape Designator Section Cavities Status Status Leader Start End 125 typ Empty Sealed M5X P5X Carrier 3000 Filled Sealed
3. O O0 NC7SOOL6X j 9 0 ee October 1995 FAIRCHILD Revised May 2003 SEMICONDUCTOR Tm NC7S00 TinyLogic HS 2 Input NAND Gate General Description Features The NC7S00 is a single 2 Input high performance CMOS E Space saving SOT23 or SC70 5 lead package NAND Gate Advanced Silicon Gate CMOS fabrication W Ultra small MicroPak leadless package assures high speed and low power circuit operation over a broad Vcc range ESD protection diodes inherently guard both inputs and output with respect to the Vog and GND M Low Quiescent Power Icc lt 1 HA rails Three stages of gain between inputs and output E Balanced Output Drive 2 mA Io 2 MA loH assures high noise immunity and reduced sensitivity to E Broad Ve Operating Range 2V 6V input edge rate E High speed tpp 3 5 ns typ E Balanced Propagation Delays E Specified for 3V operation Ordering Code Package Product Code ar i Order Number Package Description Supplied As Number Top Mark NC7S00M5X MA05B 7S00 5 Lead SOT23 JEDEC MO 178 1 6mm 3k Units on Tape and Reel NC7S00P5X MAAO5A S00 5 Lead SC70 ElAJ SC 88a 1 25mm Wide 3k Units on Tape and Reel NC7SOOL6X MACO6A A3 6 Lead MicroPak 1 0mm Wide 5k Units on Tape and Reel Logic Symbol Connection Diagrams IEEE IEC Pin Assignments for SC70 and SOT23 y AGO B B Pin Descriptions GND Pin Names Description A B Input Top View Y Output Pad Assignme
4. Trailer Hub End 75 typ Empty Sealed TAPE DIMENSIONS inches millimeters 0 06140 002 TYP 1 5540 05 0 157 TYP ang jo 0 07940 002 TYP rea 7 ar 0 069 __ B 2 040 05 4 i 1 75 aa ma RE A s E Tapas Sit GY See a _ Wy ay ay D f 3 Wat B AT TIP A eats Foo TANGENT f w gt POINTS io DREIE le i j i i Y ll 1 a H Pt TYP SECTION B B A TYP TANGENT POINTS CAVITY rije SYMM 3 MAX TYP DIRECTION OF FEED _____ R 1 181 MIN 30 SECTION A A N BEND RADIUS NOT TO SCALE Package Tape Size DIM A DIM B DIM F DIM K DIM P1 DIM W 0 093 0 096 0 138 0 004 0 053 0 004 0 157 0 315 0 004 C70 5 8mm 2 35 2 45 3 5 40 10 1 35 0 10 4 8 0 1 0 130 0 130 0 138 0 002 0 055 0 004 0 157 0 315 40 012 SOT23 5 8mm 3 3 3 3 3 5 0 05 1 4 0 11 4 8 0 3 www fairchildsemi com Tape and Reel Specification continued TAPE FORMAT for MicroPak Package Tape Number Cavity Cover Tape Designator Section Cavities Status Status Leader Start End 125 typ Empty Sealed L6X Carrier 5000 Filled Sealed Trailer Hub End 75 typ Empty Sealed 1 75 0 10 5 MAX 3 50 0 05 1 15 0 05 SECTION B B DIRECTION OF FEED _ gt SCALE 10X 0 254 0 020 0 70 0 05 SECTION A A SCALE 10X REEL DIMENSIONS inches millimeters TAPE SLOT
5. Wide Package Number MAA05A 7 www fairchildsemi com 00SZON NC7S00 TinyLogic HS 2 Input NAND Gate Physical Dimensions inches millimeters unless otherwise noted Continued C4 0 10 C BL 1 4540 05 es gnc 0 5 6 5 4 0 78 i i i d 08 Sa Che oh ame Bape be 4 00 0 05 m me PEO PO 1X 0 52 Eas Hp pR 1 2 3 6X 0 3 TOP VIEW RECOMMENDED 0 55 MAX LAND PATTERN 0 10 C 0 15 A BE CE 1 z 0 05 6X o4 Detail A 0 15 0 3 0 25 X N 7 oes ae 0 35 0 6 H 2x 5X025 ie L ihe L 0 13 09 075 x 452 4x CHAMFER BOTTOM VIEW DETAIL A a PIN 1 LEAD Notes 1 JEDEC PACKAGE REGISTRATION IS ANTICIPATED 2 DIMENSIONS ARE IN MILLIMETERS 3 DRAWING CONFORMS TO ASME Y14 5M 1994 MACO6ARevB 6 Lead MicroPak 1 0mm Wide Package Number MACO6A Fairchild does not assume any responsibility for use of any circuitry described no circuit patent licenses are implied and Fairchild reserves the right at any time without notice to change said circuitry and specifications LIFE SUPPORT POLICY FAIRCHILD S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD SEMICONDUCTOR CORPORATION As used herein 1 Life support dev
6. ices or systems are devices or systems which a are intended for surgical implant into the body or b support or sustain life and c whose failure to perform when properly used in accordance with instructions for use provided in the labeling can be rea sonably expected to result in a significant injury to the user 2 A critical component in any component of a life support device or system whose failure to perform can be rea sonably expected to cause the failure of the life support device or system or to affect its safety or effectiveness www fairchildsemi com www fairchildsemi com
7. ions should be met with Lead Temperature TL out exception to ensure that the system design is reliable over its power Soldering 10 seconds 260 C supply temperature and output input loading variables Fairchild does not nay recommend operation of circuits outside the databook specifications Power Dissipation Po 85 C Note 2 Unused inputs must be held HIGH or LOW They may not float SOT23 5 200 mW C70 5 150 mW DC Electrical Characteristics Vec Ta 25 C Ta 40 C to 85 C me Symbol Parameter Units Conditions V Min Typ Max Min Max Vin HIGH Level Input Voltage 2 0 1 50 1 50 v 3 0 6 0 0 7 Vcc 0 7Vce Vit LOW Level Input Voltage 2 0 0 50 0 50 v 3 0 6 0 0 3Vcc 0 3 Voc Vou HIGH Level Output Voltage 2 0 1 90 2 0 1 90 3 0 2 90 3 0 2 90 Y lop 20 pA 4 5 4 40 4 5 4 40 Vin V 6 0 5 90 6 0 5 90 Vin Vit 3 0 2 68 2 85 2 63 y 0H 1 3 mA 4 5 4 18 4 35 4 13 lop 2 MA 6 0 5 68 5 85 5 63 lop 2 6 mA VoL LOW Level Output Voltage 2 0 0 0 0 10 0 10 3 0 0 0 0 10 0 10 7 lop 20 pA 45 0 0 0 10 0 10 Vin Vin 6 0 0 0 0 10 0 10 Vin Vin 3 0 0 1 0 26 0 33 y lov 1 3mA 4 5 0 1 0 26 0 33 lol 2 mA 6 0 0 1 0 26 0 33 lol 2 6 mA lin Input Leakage Current 6 0 0 1 1 0 HA Vin Vcc GND loc Quiescent Supply Current 6 0 1 0 10 0 uA Vin Voc GND www fairchildsemi com 2 AC Electrical Characteristics Vec Ta 25 C Ta 40 C to 85
8. nts for MicroPak NC No Connect At Aje vcc Function Table Y AB s 2 L s xe Inputs Output A B Y cnp 3 j4 Y L L H L H H Top Thru View H L H H H L H HIGH Logic Level L LOW Logic Level TinyLogic is a registered trademark of Fairchild Semiconductor Corporation MicroPak is a trademark of Fairchild Semiconductor Corporation 3129 GNVN INdul Z SH 91607AUIL 00SZ N 2003 Fairchild Semiconductor Corporation DS012138 www fairchildsemi com NC7S00 Absolute Maximum Ratingsvnote 1 Recommended Operating Supply Voltage Vcc 0 5V to 7 0V Conditions Note 2 DC Input Diode Current lik Supply Voltage Vcc 2 0V 6 0V V lt 0 5V 20 mA Input Voltage Vix 0V Voc Vin 2 Voc 0 5V 20mA Output Voltage Vout 0V Voc DC Input Voltage Vin 0 5V to Vcc 0 5V Operating Temperature T 40 C to 85 C DC Output Diode Current lox Input Rise and Fall Time t t Vout lt 0 5V 20 mA Vcc 2 0V 0 1000 ns Vout gt Vcc 0 5V 20 mA Vcc 3 0V 0 750 ns DC Output Voltage Vout 0 5V to Vcc 0 5V Voc 4 5V 0 500 ns DC Output Source Voc 6 0V 0 400 ns or Sink Current lour 12 5mA Thermal Resistance 6 j DC Vec or Ground Current SOT23 5 300 C W per Output Pin Icc or lenp 25 mA SC70 5 425 C W Storage Temperature Tstg 65 C to 150 C Junction Temperature Ty 150 C Note 1 Absolute maximum ratings are those values beyond which damage to the device may occur The databook specificat
Download Pdf Manuals
Related Search
FAIRCHILD NC7S00 handbook