FAIRCHILD FST3257 handbook
Contents
1. its safety or effectiveness instructions for use provided in the labeling can be rea sonably expected to result in a significant injury to the www fairchildsemi com user 5 www fairchildsemi com c peno ZSZELSS YOUMS sng 1exojdnjnuieg 1exoejdnin w L2. 6 0 384 s 9 804 10 00 s 19 14 13 12 m 10 9 0 228 0 244 aps 5 781 6 198 TYP D LEAD NO 1 f IDENT 0 010 wax 0 254 0 150 0 157 8103 98 0 010 0 020 0 053 0 069 0 254 d 505 9 1 346 1 753 0 004 0 010 8 MAX TYP Y 0 102 0 254 L n d EE aT ata m T SENING i PLANE 0 014 0 020 typ 0 355 0 508 0 203 0 254 Mod 0 406 1 270 TYP ALL LEADS 0 004 TYP ALL LEADS Toons TYP 10 102 10 203 MBA REV H ALL LEAD TIPS 16 Lead Small Outline Integrated Circuit SOIC JEDEC MS 012 0 150 Narrow Package Number M16A 9 m 0 23640 008 0 150 0 157 09 89 I E E 1 pem Lean E H 0 02540 005 PLANE 1 8 DETAIL A TYPICAL SCALE 40 0 057 0 002 45 x0 013 n 0 06340 005 TYP i End i x zi 0 025 TYP N 0 004 0 010 TYP js 0 007 0 010 TYP lt 0 01040 002 TYP SEE DETAIL A 0 007 clAa DIMENSIONS ARE IN INCHES MQA18 REV A 16 Lead Quarter Size Outline Package QSOP JEDEC MO 137 0 150 Wide Package Number MQA16 www fairchildsemi com 4 Physical Dimensions inches millimeters unless otherwise noted Continued RN PEE TH ope DIMENSIONS METRIC ONLY o DUMI LAND PATTERN RECOMMENDATION GAGE PLANE 2 HE EE TE gt Ji A SEATING PLA
3. NE 0 8 lal 0 6 0 1 sez Te e 4 TYPICAL SCALE 40X PIN 1 IDENT ALL LEAD TIPS SEE DETAIL A 0 90 ae a o 1 c ALL LEAD i c i H 0 65 TYP Ea 10 0 05 TYP 0 09 0 20 MI 0 19 0 30 TYP ese so cO 16 Lead Thin Shrink Small Outline Package TSSOP JEDEC MO 153 4 4mm Wide Package Number MTC16 MIC16 REV C Technology Description The Fairchild Switch family derives from and embodies Fairchild s proven switch technology used for several years in its 74LVX3L384 FST3384 bus switch product Fairchild does not assume any responsibility for use of any circuitry described no circuit patent licenses are implied and Fairchild reserves the right at any time without notice to change said circuitry and specifications LIFE SUPPORT POLICY FAIRCHILD S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD SEMICONDUCTOR CORPORATION As used herein 1 Life support devices or systems are devices or systems 2 A critical component in any component of a life support which a are intended for surgical implant into the device or system whose failure to perform can be rea body or b support or sustain life and c whose failure sonably expected to cause the failure of the life support to perform when properly used in accordance with device or system or to affect
4. OO FST22541 0 0 ere FAIRCHILD aan oe eel SEMICONDUCTOR FST3257 September 1997 Revised December 1999 Quad 2 1 Multiplexer Demultiplexer Bus Switch General Description The Fairchild Switch FST3257 is a quad 2 1 high speed CMOS TTL compatible multiplexer demultiplexer bus switch The low on resistance of the switch allows inputs to be connected to outputs without adding propagation delay or generating additional ground bounce noise When OE is LOW the select pin connects the A Port to the selected B Port output When OE is HIGH the switch is OPEN and a high impedance state exists between the two ports Features E 4Q switch connection between two ports W Minimal propagation delay through the switch W Low lcc W Zero bounce in flow through mode W Control inputs compatible with TTL level Ordering Code Order Number Package Number Package Description FST3257M M16A 16 Lead Small Outline Integrated Circuit SOIC JEDEC MS 012 0 150 Narrow FST3257QSC MQA16 16 Lead Quarter Size Outline Package QSOP JEDEC MO 137 0 150 Wide FST3257MTC MTC16 16 Lead Thin Shrink Small Outline Package TSSOP JEDEC MO 153 4 4mm Wide Device also available in Tape and Reel Specify by appending suffix letter X to the ordering code Logic Diagram Pin Descriptions Pin Name Description OE Bus Switch Enable S Select Input A Bus A B Bo Bus B Connection Diag
5. bserved Note 3 Unused control inputs must be held HIGH or LOW They may not float DC Electrical Characteristics y Ta 7 40 C to 85 C Symbol Parameter v e Typ FE Units Conditions Note 4 Vik Clamp Diode Voltage 4 5 1 2 V lin 18mA Vin HIGH Level Input Voltage 4 0 5 5 2 0 V Vi LOW Level Input Voltage 4 0 5 5 0 8 V li Input Leakage Current 5 5 1 0 HA Ox Vin x5 5V loz OFF STATE Leakage Current 5 5 1 0 uA 0 xA B lt Vec Ron Switch On Resistance 4 5 4 7 Q Vin OV lin 64mA Note 5 45 4 7 Q Vw OV ly 30mA 4 5 8 15 Q Vin 2 4V ly 15mA 4 0 1 20 Q Vw 24V ly 15mA loc Quiescent Supply Current 5 5 3 uA Vin Vcc or GND lour 0 Alco Increase in lcc per Input 5 5 2 5 mA One input at 3 4V Other inputs at Voc or GND Note 4 Typical values are at Voc 5 0V and T4 25 C Note 5 Measured by the voltage drop between A and B pins at the indicated current through the switch On resistance is determined by the lower of the voltages on the two A or B pins www fairchildsemi com 2 AC Electrical Characteristics Ta 7 40 C to 85 C C 50 pF RU RD 5000 5 Symbol Parameter Units Conditions Figure No Voc 4 5 5 5V Voc 4 0V Min Max Min Max terti Prop Delay Bus to Bus Note 6 0 25 0 25 i PHLiPLH p y ns Vj OPEN Figure 1 Prop Delay Select to Bus A 1 0 4 7 5 2 Figure 2 tpzy tpz_ Output Enable T
6. ime Select to Bus B 1 0 5 2 5 7 Vi 27V for tpzi Figure 1 ns Output Enable Time OE to Bus A B 1 0 5 1 5 6 V OPEN for tpzy Figure 2 tpyz tpi z Output Disable Time Select to Bus B 1 0 5 2 5 5 Vi 7V for tpz Figure 1 ns Output Disable Time Output Enable Time 1 5 5 5 5 5 V OPEN for tpyz Figure 2 OE to Bus A B Note 6 This parameter is guaranteed by design but is not tested The bus switch contributes no propagation delay other than the RC delay of the typical On resistance of the switch and the 50pF load capacitance when driven by an ideal voltage the source zero output impedance Capacitance Note 7 Symbol Parameter Typ Max Units Conditions Cin Control Pin Input Capacitance pF Voc 5 0V C A Port Input Output Capacitance F vO P p p p Veg OE 5 0V B Port pF Note 7 TA 25 C f 1 MHz Capacitance is characterized but not tested AC Loading and Waveforms M RU FROM OUTPUT UNDER RD TEST CL Note Input driven by 50 Q source terminated in 50 Q Note C includes load and stray capacitance Note Input PRR 1 0 MHz ty 500 ns FIGURE 1 AC Test Circuit tf 2 5nS 3 0V SWITCH INPUT 10 OUTPUT 1 5V VoL 90 ENABLE INPUT 15V tPZL OUTPUT tPZH FIGURE 2 AC Waveforms www fairchildsemi com LZSZE1LSA FST3257 Physical Dimensions inches millimeters unless otherwise noted 0 38
7. ram S Vec 1B OE 1By 4B 1A 4B 2B 4 2B 3B 2A 3B GND 3A Truth Table S OE Function X Disconnect L L A B H L A B 1999 Fairchild Semiconductor Corporation DS500057 www fairchildsemi com c peno ZSZELSS YOUMS sng 1exoejdnjnuieg 1exoejdnin w L FST3257 Absolute Maximum Ratings ore 1 Recommended Operating Supply Voltage Voc 0 5V to 7 0V Conditions note 3 DC Switch Voltage Vs 0 5V to 7 0V Power Supply Operating Vcc 4 0V to 5 5V DC Input Voltage Viy Note 2 0 5V to 7 0V Input Voltage Vin OV to 5 5V DC Input Diode Current lik Vin lt OV 50mA Output Voltage Vout OV to 5 5V DC Output lour Sink Current 128mA Input Rise and Fall Time t tj DC Vcc GND Current loc Iawp 100mA Switch Control Input OnS V to 5nS V Storage Temperature Range Tstg 65 C to 150 C Switch I O OnS V to DC Free Air Operating Temperature TA 40 C to 85 C Note 1 The Absolute Maximum Ratings are those values beyond which the safety of the device cannot be guaranteed The device should not be operated at these limits The parametric values defined in the Electrical Characteristics tables are not guaranteed at the absolute maximum rating The Recommended Operating Conditions tables will define the conditions for actual device operation Note 2 The input and output negative voltage ratings may be exceeded if the input and output diode current ratings are o
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FAIRCHILD FST3257 handbook