ST STP22NE10L handbook
Contents
1. O STP22NE10L9 ST STP22NE10L N CHANNEL 100V 0 07 Q 22A TO 220 STripFET POWER MOSFET TPE voss Posen 7 a TYPICAL Rps on 0 07 Q a LOW THRESHOLD DRIVE LOGIC LEVEL DEVICE DESCRIPTION This Power MOSFET is the latest development of STMicroelectronics unique Single Feature Size strip based process The resulting transistor shows extremely high packing density for low on resistance rugged avalanche characteristics and less critical alignment steps therefore a remarkable manufacturing reproducibility APPLICATIONS HIGH CURRENT HIGH SPEED SWITCHING INTERNAL SCHEMATIC DIAGRAM SOLENOID AND RELAY DRIVERS Den MOTOR CONTROL AUDIO AMPLIFIERS a DC DC amp DC AC CONVERTERS ABSOLUTE MAXIMUM RATINGS Vos Drain source Voltage Vas 0 Voer Drain gate Voltage Ras 20 kQ p Drain Current continuous at Te 25 C p Drain Current continuous at T 100 C ouis foren Curent pulsed e Pulse width limited by safe operating area 1 starting Tj 25 C Ip 22A Von 50V November 1999 1 8 STP22NE10L THERMAL DATA Rthj case Thermal Resistance Junction case Max Rinjamp Thermal Resistance Junction ambient Max Ti Maximum Lead Temperature For Soldering Purpose ELECTRICAL CHARACTERISTICS Tcase 25 C unless otherwise specified OFF V anpss Drain source Ip 250 uA Vos 0 100 V Breakdown Voltage Ipss Zero Gate Voltage Vps Max Rating 1 uA Drain2. Current Vas 0 Vps Max Rating Tc 2125 C 10 uA lass Gate body Leakage Ves 20 V 100 nA Current Vps 0 ON oe eS Se IV E on Static Drain source On Vas 10 V ID 15A 0 07 0 085 Resistance Ves 5 V Ip 15A 0 085 0 1 Q D on On State Drain Current Vps gt lp on X Rps on max A Ves 10 V DYNAMIC gts Forward Vps gt lp on X Roston max Ip 15A Er Transconductance Input Capacitance Vos 25V f 1 MHz Ves 0 Output Capacitance Reverse Transfer Capacitance 2 8 STP22NE10L ELECTRICAL CHARACTERISTICS continued SWITCHING ON Turn on Delay Time Vop 50V Rise Time Re 4 72 Resistive Load see fig 3 Total Gate Charge Vpp 80V In 16 A Vas 10 V Gate Source Charge Gate Drain Charge SWITCHING OFF Smal Parameter Test conditons i Typ use oni _ la otf Turn off Delay Time Vpp 50V Ip 8A 45 tr Fall Time Re 4 7 Q Ves 4 5 V 12 Resistive Load see fig 3 12 ta off Off voltage Rise Time Vclamp 80 V Ip 16A tt Fall Time RG 4 7 Q Vas 4 5 V 17 te Cross over Time Inductive Load see fig 5 35 SOURCE DRAIN DIODE sms Parameter Tes Govan Twin Tye max Source drain Current Source drain Current pulsed Forward On Voltage Isp 16A Ves 0 Reverse Recovery see test circuit fig 5 Charge Reverse Recovery Current Reverse Recovery Isp 16A di dt 100 A us Time Vpp 40 V Tj 150 C Pulsed P
3. Static Drain source On Resistance CC88920 Ros en mQ Vpsz 10V 90 80 70 50 50 0 5 10 15 20 b A Capacitance Variations GCSB940 C pF 2000 f 1500 10 20 30 40 Vos V y STP22NE10L Normalized Gate Threshold Voltage vs Temperature GCBB950 Ves th norm Vos Ves lp 250 4A 1 0 0 9 0 8 0 7 0 5 50 O 50 100 T C Source drain Diode Forward Characteristics CCBB97U0 o 10 20 30 40 Iso A Normalized On Resistance vs Temperature Ros on norm 2 0 1 5 1 0 0 5 0 0 GC88960 50 o 50 100 T C 5 8 STP22NE10L Fig 1 Unclamped Inductive Load Test Circuit 5005870 Fig 3 Switching Times Test Circuits For Resistive Load 5005980 Fig 5 Test Circuit For Inductive Load Switching And Diode Recovery Times L 1004H 5008010 6 8 Fig 2 Unclamped Inductive Waveform SCO7B72 g CONST Vi 20V Veuax o 2200 p STP22NE10L TO 220 MECHANICAL DATA 71 71 mi 7 8 STP22NE10L Information furnished is believed to be accurate and reliable However STMi
4. croelectonics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third partes which may result from its use No license is granted by implication or otherwise under any patent or patent rights of STMicroelectrmics Specification mentioned in this publication are subject to change without notice This publication supersedes and replaces all informaiton previously supplied STMicroelectronics products are not authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics The ST logo is a trademark of STMicroelectronics 1999 STMicroelectronics Printed in Italy All Rights Reserved STMicroelectronics GROUP OF COMPANIES Australia Brazil China Finland France Germany Hong Kong India Italy Japan Malaysia Malta Morocco Singapore Spain Sweden Switzerland United Kingdom U S A http www st com 8 8 37
5. ulse duration 300 us duty cycle 1 5 e Pulse width limited by safe operating area Safe Operating Area Thermal Impedance CCBB8BBU GC208350 Ia A K 4 6 0 5 2 107 i amp 0 2 4 uS NG z N il 10043 0 1 10 N 10 p 05 6 Ni 1ms 0 0 Zin k Rinse 2 10ms d t ft D 3 m JUL SINGLE PULSE T L D C OPERATION tp 10 z 4 58 2 4 68 17 4 5B 2 4 68 1 5 4 3 2 1 107 10 10 10 Vos V 10 10 10 10 107 tp s 4 3 8 STP22NE10L Output Characteristics GCSBB90 lof 30 0 10 20 30 40 Vas V Transconductance GCBBST1U0 gs 3 Vos 15V 20 oe 15 25 C 10 150 C 5 0 5 10 15 20 A Gate Charge vs Gate source Voltage GC88930 Vos 80V lo2 154 9 10 20 30 40 Q nC 4 8 Transfer Characteristics SCB8900 0 10 20 30 40 Ves V
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ST STP22NE10L handbook