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National Semiconductor 54F/74F00 handbook

1. 18 663 5 080 0 524 7 OPTIONAL 1 651 mM j ose 5 0 008 0 016 yp RS Yo 90 4 la 10201 0406 B 2 M 20120204080 aU 0 075 0 015 3 175 3 81D 1905 0 387 eee 0 012 0 023 06 08 P MIN 0 050 0 010 DA z 2700254 a aas 000 T1015 14 Lead 0 300 Wide Molded Dual In Line Package NS Package Number N14A 7 www national com PrintDate 1997 08 27 PrintTime 13 03 45 9738 45009454 Rev No 1 Proof cmserv Physical Dimensions inches millimeters unless otherwise noted Continued Q 0 080 gt gt 0 050 0 045 lt ooe r 0 050 0 005 0 005 MIN TYP TYP TYP 14 m a 0 370 0 250 c LI i 0 280 0 260 5 GLASS 0 235 N 0 012 0 008 e A DETAIL A LL DETAIL A en et 0 250 PIN 1 LL IDENT 7 m 0 008 019 L 0 045 MAX W14B REV J i 14 Lead Ceramic Flatpak F NS Package Number W14B LIFE SUPPORT POLICY NATIONAL S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DE VICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF NATIONAL SEMI CONDUCTOR CORPORATION As used herein 1 Life support devices or systems are devices or sys 2 Acritical component in any component of a life support tems which a are intended for surgical implant into device or system whose failur
2. 0 254 SEATING NI A PLANE 0 008 0 010 1 014 0 203 0 254 100160050 i 0 050 0 358 TYP ALL LEADS 0 405 1 27j ALL LEADS 3 0 356 0 508 0 014 0 020 ALL LEAD TIPS 14 Lead 0 150 Wide Molded Small Outline Package S NS Package Number M14A www national com 6 PrintDate 1997 08 27 PrintTime 13 03 44 9738 45009454 Rev No 1 cmserv Proof Physical Dimensions inches millimeters unless otherwise noted Continued 14 8 4 0 295 0 319 7 5 8 1 0 205 0 215 5 2 5 4 LI LI a a Y 1 7 0 394 0 402 0 71 2 71 0 006 0 010 10 0 10 2 tray 0 15 0 25 0 067 0 083 1 7 2 1 09 89 22 0 006 0 15 t 0 049 ls SEATING PLANE 9 050 1 0 000 0 010 TYP 1 27 0 0 25 0 016 0 031 0 014 0 020 1 0420 8 0 35 0 50 M14D REV 14 Lead 0 300 Wide Molded Small Outline Package ElAJ SJ NS Package Number M14D 0 740 0 770 18 80 19 56 T 0 090 2 288 INDEX AREA 0 250 010 8 350 0 254 Y PIN NO 1 IDENT 0 082 0 080 MAX 2 337 10 762 DEPTH OPTION 1 OPTION 02 0 135 0 005 0 300 0 320 3 429 14 127 429 14 127 TE BPA 328 2 620 8 128 0 065 1 145 0 200 0 060 iue 42
3. 25 C Vcc Mil Ta Vcc Com Fig Symbol Parameter Voc 5 0V C 50 pF C 50 pF Units No C 50 pF Min Typ Max Min Max Min Max Propagation Delay 24 3 7 5 0 2 0 7 0 24 6 0 ns H H Dsxxx teu An Bn to 1 5 3 2 4 3 1 5 6 5 1 5 5 3 Bdk Extract End 3 www national com PrintDate 1997 08 27 PrintTime 13 03 42 9738 45009454 Rev No 1 cmserv Proof 3 THIS PAGE IS IGNORED IN THE DATABOOK PrintDate 1997 08 27 PrintTime 13 03 43 9738 45009454 Rev No 1 cmserv Proof Ordering Information The device number is used to form part of a simplified purchasing code where the package type and temperature range are de fined as follows 74F 00 5 C X Temperature Range Family f Special Variations QB Military grade device with 74F Commercial 54F Military environmental and burn in processing Device Type X Devices shipped in 13 reels Package Code Temperature Range P Plastic DIP C Commercial 0 C to 70 C D Ceramic DIP Military 55 C to 125 C F Flatpak L Leadless Ceramic Chip Carrier LCC S Small Outline SOIC JEDEC SJ Small Outline SOIC EIAJ DS009454 4 Physical Dimensions inches millimeters unless otherwise noted 0 200 0 005 5 080 0 127 age x 0 015 0 010 2 0 381 0 254 0 350 0 008 _ gt 8 890 0 203 0 063 0 075 1 600 1 905 2 48 wy R 0 022 0 028 0 559 0 7
4. ka 0 cow 05 29 Vec B3 13 19 14 15 16 17 18 Ag NC 0 NC 05009454 1 1997 National Semiconductor Corporation 05009454 www national com PrintDate 1997 08 27 PrintTime 13 03 35 9738 15009454 Rev No 1 cmserv Proof qNVN 1nduj z pend 004 9 DSXXX 00 7 476 Unit Loading Fan Out See Section 0 for U L definitions 54F 74F Pin Names Description ULL Input HIGH LOW Output lon loL An Bn Inputs 1 0 1 0 20 uA 0 6 mA On Outputs 50 33 3 1 mA 20 mA www national com PrintDate 1997 08 27 PrintTime 13 03 36 9738 ds009454 Rev No 1 cmserv Proof DSXXX Absolute Maximum Ratings note 3 in LOW State Max twice the rated lo mA Storage Temperature 65 C to 150 C ESD Last Passing Voltage Min 4000V Ambisnt Temperature under Blas ae to ode Recommended Operating Junction Temperature under Bias 55 C to 4175 C gu Plastic 55 C to 1506 Conditions Vec Pin Potential to Free Air Ambient Temperature Ground Pin 0 5V to 7 0V Commercial 0 C to 70 C Input Voltage Note 4 0 5V to 7 0V Supply Voltage Input Current Note 4 30 mA to 5 0 mA Commercial 4 5V to 5 5V Voltage Applied to Output Note 3 Absolute maximum ratings are values beyond which the device may in HIGH State with Voc OV be damaged or have its useful life impaired Functional operation under these condition
5. 11 0077 0092 1 959 2 362 0 045 0 05 5 1 143 1 397 E A L DETALA n 4 206170085 la 0 055 1702 2108 wma 1 143 1 397 Top View Side View TYP 00400010 1 0152 0 254 3 PLCS Bottom View 9 003 0 015 0 381 0078 MAX TYP MIN TYP 0 022 55 n 00 MAX TYP 0 152 MIN TYP Detail A 20 REY 20 Lead Ceramic Leadless Chip Carrier L NS Package Number E20A www national com PrintDate 1997 08 27 PrintTime 13 03 44 9738 45009454 Rev No 1 cmserv Proof Physical Dimensions inches millimeters unless otherwise noted Continued 0 785 19 939 MAX 0 220 0 310 5 588 7 874 E 0 200 320 0 008 0 200 7 386 8 128 0 127 E 0 060 0 005 5 080 MIN 52420127 SEALANT 1524 07127 200 060 0 508 1 524 869842 10 MAX 0 008 0 012 0 310 0 410 0 203 0 305 Eom 0 098 x aam DE m Ll 0 125 0 200 489 3 755 080 MAX BOTH ENDS 0 100 0 010 0150 d 2 540 0 254 Gai MIN J14A REV 9 14 Lead Ceramic Dual In Line Package D NS Package Number J14A 0 335 0 344 8 509 8 738 i 0 228 2 244 5 741 5 198 LEAD ND 1 25 IDENT 0 010 yax 0254 0 150 0 157 8 810 3 586 0 053 0 069 0 010 0 020 0 254 0 508 48 4 1 346 1 753 S MAX TYE Y 0 004 0 010 ALL TE H 0 102
6. e 1854F00ft hy Fi 54F 74F00 General Description performs the logic NAND function Ordering Code see section 0 vational Semiconductor Quad 2 Input NAND Gate This device contains four independent gates each of which December 1994 Features Guaranteed 4000V minimum ESD protection Logic Symbol IEEE IEC A 0 Bo A _ 1 5 By A _ 2 8 3 8 DS009454 3 Note 1 Devices also available in 13 reel Use suffix SCX and SUX Note 2 Military grade device with environmental and burn in processing Use sui TRI STATE is a registered trademark of National Semiconductor Corporation Commercial Military Package Package Description Number 74FOOPC N14A 14 Lead 0 300 Wide Molded Dual In Line 54F00DM Note 2 J14A 14 Lead Ceramic Dual In Line 74F00SC Note 1 M14A 14 Lead 0 150 Wide Molded Small Outline JEDEC 74 005 Note 1 M14D 14 Lead 0 300 Wide Molded Small Outline EIAJ 54F00FM Note 2 W14B 14 Lead Cerpack 54F00LM Note 2 E20A 20 Lead Ceramic Leadless Chip Carrier Type C ix DMQB FMQB and Connection Diagrams Pin Assignment for DIP SOIC and Flatpak Ag Bo Ay By GND 05009454 2 Pin Assignment for LCC By NC Ay NC Oy 8 Z Le EI L4 DHE 3189 GND 2 4
7. e to perform can be rea the body or b support or sustain life and whose fail sonably expected to cause the failure of the life support ure to perform when properly used in accordance device or system or to affect its safety or effectiveness with instructions for use provided in the labeling can be reasonably expected to result in a significant injury to the user National Semiconductor National Semiconductor National Semiconductor National Semiconductor Corporation Europe Hong Kong Ltd Japan Ltd Americas Fax 49 0 1 80 530 85 86 13th Floor Straight Block Tel 81 3 5620 6175 Tel 1 800 272 9959 Email europe support nsc com Ocean Centre 5 Canton Rd Fax 81 3 5620 6179 Fax 1 800 737 7018 Deutsch Tel 49 0 1 80 530 85 85 Tsimshatsui Kowloon Email support nsc com English Tel 49 0 1 80 532 78 32 Hong Kong Frangais Tel 49 0 1 80 532 93 58 Tel 852 2737 1600 www national com Italiano Tel 49 0 1 80 534 16 80 Fax 852 2736 9960 National does not assume any responsibility for use of any circuitry described no circuit patent licenses are implied and National reserves the right at any time without notice to change said circuitry and specifications PrintDate 1997 08 27 PrintTime 13 03 46 9738 45009454 Rev No 1 cmserv Proof
8. s is not implied Standard Output 0 5V to Vec TRI STATE Output 0 5V to 5 5V Current Applied to Output Note 4 Either voltage limit or current limit is sufficient to protect inputs DC Electrical Characteristics Symbol Parameter 54F 74F Units Voc Conditions Min Typ Max Vin Input HIGH Voltage 2 0 V Recognized as a HIGH Signal Input LOW Voltage 0 8 V Recognized as a LOW Signal Vep Input Clamp Diode Voltage 1 2 V Min ly 18 mA Vou Output HIGH 54F 10 Voc 2 5 lou 1 mA Voltage 74F 1096 Voc 2 5 V Min lon 1 mA 74F 5 Voc 2 7 1 mA Vo Output LOW 10 Voc 0 5 V Min lg 20 mA Voltage 74F 10 0 5 lo 20 mA Input HIGH 54F 20 0 Max Vin 2 7V d Current 74F 5 0 lavi Input HIGH Current 54F 100 pA Max Vin 7 0V Breakdown Test 74F 7 0 lees Output HIGH 54F 250 Max Vour Voc Leakage Current 74F 50 Vip Input Leakage 74F 4 75 V 0 0 lip 1 9 pA Test All other pins grounded lop Output Leakage 74F 3 75 yA 0 0 Viop 150 mV Circuit Current All other pins grounded lit Input LOW Current 0 6 mA Max Vin 0 5V los Output Short Circuit Current 60 150 mA Max Vou 0V Power Supply Current 1 9 2 8 mA Max Vo HIGH loo Power Supply Current 6 8 10 2 mA Max Vo LOW AC Electrical Characteristics See Section 0 for Waveforms and Load Configurations DSXXX 74F 54F 74F

National Semiconductor 54F/74F00 handbook

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