FAIRCHILD FDP16AN08A0 FDB16AN08A0 handbook(1)
Contents
1. 1 0e 9 l source n7 5 75e 9 RVTEMP CA res rlgate n1 n9 59 6 res rldrain n2 n5 10 res rlsource n3 n7 57 5 m mmed n16 n8 n8 modelzmmedmod 1 w 1u m mstrong n16 n8 n8 model2mstrongmod I2 1u w 1u m mweak n16 n21 n8 n8 modelmweakmod l21u w 1U RVTHRES res rbreak n17 n18 1 tc129e 4 tc2 5e 7 res rdrain n50 n16 3 3e 3 tc121 9e 2 tc2 4e 5 res rgate n9 n20 3 31 res rsic1 n5 n51 1e 6 tc121 5e 3 tc2 3e 5 res rslc2 n5 n50 1e3 res rsource n8 n7 7 3 tcl 1e 3 tc2 1e 6 res rvthres n22 n8 1 tc12 5 3e 3 tc2 1 3e 5 res rvtemp n18 n19 1 tc1 2 7e 3 tc2 1e 6 sw vcsp sla n12 n13 n8 model s1amod sw vcsp sib n13 n12 n13 n8 model s1bmod sw vcsp s2a n15 n14 n13 model s2amod sw vcsp s2b n13 n15 n14 n13 model s2bmod v vbat n22 n19 1 equations i n51 gt n50 iscl iscl v n51 n50 v n5 n51 1e 9 abs v n5 n51 abs v n5 n51 1e6 200 3 FDP16AN08A0 FDB16ANO8A0 Rev A1 9 PSPICE Thermal Model REV 23 March 2002 FDB16ANO08AOT CTHERM1 th 6 0 002 CTHERM2 6 5 0 004 CTHERMS 5 4 0 006 CTHERM4 4 3 0 01 CTHERMS5 3 2 0 03 CTHERMG 2 tl 0 08 RTHERM th 6 0 075 RTHERM2 6 5 0 09 RTHERMS 5 4 0 1 RTHERMA 4 3 0 15 5320 2 RTHERM6 2 tl 0 25 SABER Thermal Model SABER thermal model FDD16ANO8A0T template thermal model th tl thermal c th tl ctherm ctherm1 th 6 0 002 c2. FOR TEMPERATURES ABOVE 25 C DERATE PEAK CURRENT AS FOLLOWS l 55 150 10 10 FDP16AN08A0 FDB16ANO8A0 Rev A1 0V80NV9I8Q J OV80NV9L dQOH 2002 Fairchild Semiconductor Corporation Typical Characteristics 25 unless otherwise noted 500 100 TET tav L la9 1 3 RATED BVpgg If R 0 100 PN tav L R In lAs R 1 3 RATED BVpss Vpp 1 lt 5 Lu i is 10 E OPERATION IN THIS UP cen 9 AREA MAY BE 5 Es LIMITED BY rps ow z j a lt 1 gt r SSeS SUKC SINGLE PULSE 9 x Ty RATED 2 801 118 8 NU E Mii li 0 1 1 TN N 0 01 0 1 1 10 100 Vps DRAIN TO SOURCE VOLTAGE V tay TIME IN AVALANCHE ms Figure 5 Forward Bias Safe Operating Area NOTE Refer to Fairchild Application Notes AN7514 and AN7515 Figure 6 Unclamped Inductive Switching Capability PULSE DURATION 8015 93 DUTY CYCLE 0 5 Vpp 15V lt 75 E E tc tc tc tc o 50 lt lt tc tc a a _5 25 PULSE DURATION 8015 DUTY CYCLE 0 5 MAX 0 3 0 3 5 4 0 4 5 5 0 5 5 6 0 6 5 0 1 2 3 4 Vas GATE TO SOURCE VOLTAGE V Vps DRAIN TO SOURCE VOLTAGE V Figure 7 Transfer Characteristics Figure 8 Saturation Characteristics PULSE DURATION 80us DUTY CYCLE 0 5 MAX NORMALIZED DRAIN TO SOURCE ON RESISTANCE DRAIN TO SOURCE ON RESISTANCE mQ 0 10 20 30 40 50 60 80 40 0 40 80 120 160 200 Ip
3. 10V Rag 100 c 2 ns torr Turn Off Time ns Drain Source Diode Characteristics V Source to Drain Diode Voltage V lap 29A T le Reverse Recovery Time Isp 58A 915 41 100A us ns QRR Reverse Recovered Charge Isp 58 dlsp dt 100A us 36 nC Notes 1 Starting Ty 25 L 260uH las 30A 2002 Fairchild Semiconductor Corporation FDP16AN08A0 FDB16AN08A0 Rev A1 0V80NV9I d8Q4J OV8ONV9IddS Typical Characteristics 25 unless otherwise noted POWER DISSIPATION MULTIPLIER Ip DRAIN CURRENT A Tc CASE TEMPERATURE C Figure 1 Normalized Power Dissipation vs Ambient Temperature 0 1 2 NORMALIZED THERMAL IMPEDANCE 10 CE 2 y gt mum a a aa SAHA HN Zim 0 01 CASE TEMPERATURE C Figure 2 Maximum Continuous Drain Current vs Case Temperature eL 103 10 t RECTANGULAR PULSE DURATION s 10 DUTY FACTOR D t t PEAK Tj Pom X Zouc X RoJc Figure 3 Normalized Maximum Transient Thermal Impedance rs Ibm PEAK CURRENT A 100 55 PH Ves 10V 8 50 SSS eee 10 2002 Fairchild Semiconductor Corporation 104 CON eae MAY LIMIT CURRENT IN THIS REGION 10 10 t PULSE WIDTH s Figure 4 Peak Current Capability 107
4. DRAIN CURRENT Ty JUNCTION TEMPERATURE C Figure 9 Drain to Source On Resistance vs Drain Figure 10 Normalized Drain to Source On Current Resistance vs Junction Temperature FDP16AN08A0 FDB16ANO8A0 Rev A1 9 Typical Characteristics 25 unless otherwise noted Ves Vps Ip 250A NORMALIZED GATE THRESHOLD VOLTAGE 80 40 0 40 80 120 160 200 Tj JUNCTION TEMPERATURE C Figure 11 Normalized Gate Threshold Voltage vs Junction Temperature eese EE e e e Coss Cps ee ee RR Sot Crss TONS 100 IN C CAPACITANCE pF Ves 0V f 1MHz f 1MHz 50 0 1 1 10 75 Vps DRAIN TO SOURCE VOLTAGE V Figure 13 Capacitance vs Drain to Source Voltage 2002 Fairchild Semiconductor Corporation NORMALIZED DRAIN TO SOURCE BREAKDOWN VOLTAGE 80 40 0 40 80 120 160 200 JUNCTION TEMPERATURE C Figure 12 Normalized Drain to Source Breakdown Voltage vs Junction Temperature WAVEFORMS IN DESCENDING ORDER Ip 58A Ip 28A Ves GATE TO SOURCE VOLTAGE V 0 5 10 15 20 25 30 Q GATE CHARGE nC Figure 14 Gate Charge Waveforms for Constant Gate Current FDP16AN08A0 FDB16ANO8A0 Rev A1 0V80NV9I 8Q4 9 Test Circuits and Waveforms Vps VARY tp TO OB
5. LIABILITY FUNCTION OR DESIGN FAIRCHILD DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT RIGHTS NOR THE RIGHTS OF OTHERS LIFE SUPPORT POLICY FAIRCHILD S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION As used herein 1 Life support devices or systems are devices or systems which a are intended for surgical implant into the body or b support or sustain life or c whose failure to perform when properly used in accordance with instructions for use provided in the labeling can be 2 A critical component is any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system or to affect its safety or effectiveness reasonably expected to result in significant injury to the user PRODUCT STATUS DEFINITIONS Definition of Terms Formative or In Design Advance Information Preliminary First Production No Identification Needed Full Production Obsolete Not In Production This datasheet contains the design specifications for product development Specifications may change in any manner without notice This datasheet contains preliminary data and supplementary data will be publ
6. O O FDBIGANO8AQ a ae a FAIRCHILD July 2002 SEMICONDUCTOR FDP16ANO08A0 FDB16ANO08AO0 N Channel PowerTrench MOSFET 75V 58 16MQ Features Applications lps oN 13M2 Typ Vas 10V Ip 58A e 42V Automotive Load Control Q tot 28nC Typ Vas 10V e Starter Alternator Systems Low Miller Charge Electronic Power Steering Systems Low Qrr Body Diode Electronic Valve Train Systems UIS Capability Single Pulse and Repetitive Pulse e DC DC converters and Off line UPS e Qualified to AEC Q101 Distributed Power Architectures and VRMs Formerly developmental type 82660 Primary Switch for 24V and 48V systems DRAIN D FLANGE SOURCE GATE DRAIN GATE L G SOURCE DRAIN 220 TO 262AB FLANGE S FDP SERIES FDB SERIES MOSFET Maximum Ratings 25 unless otherwise noted Symbol Parameter Ratings Voss V m V Drain Current Continuous Tc 25 C Ves 10V A I Continuous Tc 100 C Vas 10V Continuous Tamb 25 C Vag 10V with Roya 439C W 5s w Deae 08 Wf Thermal Characteristics IW Thermal Resistance Junction to Case TO 220 TO 263 C W Thermal Resistance Junction to Ambient TO 220 TO 263 C W Rosa Thermal Resistance Junction to Ambient TO 263 1in copper pad area C W This product has been designed to meet the extreme test conditions and environment demanded by the automotive industry For a
7. T 1 3e 8 XTI 3 9 MODEL DbreakMOD D RS 1 5e 1 TRS1 1e 3 2 8 9 6 MODEL DplcapMOD D CJO 5e 10 IS 1e 30 N 10 M 0 52 MODEL MmedMOD NMOS VTO 3 2 KP 4 IS 1e 30 N 10 TOX 1 L 1u W 1u RG 3 31 MODEL MstroMOD NMOS VTO 23 85 KP 70 1 1 30 N 10 TOX 1 L 1u W 1u LDRAIN DRAIN NELLE RLDRAIN DBREAK 11 T EBREAK 17 MWEAK LSOURCE SOURCE RSOURCE RLSOURCE RBREAK 17 18 RVTEMP 19 4 VBAT 22 RVTHRES MODEL MweakMOD NMOS VTO 2 7 KP 0 06 IS 1e 30 N 10 TOX 1 L 1u W 1u RG 3 31e 1 RS 0 1 MODEL RbreakMOD RES TC1 9e 4 TC2 5e 7 MODEL RdrainMOD RES 1 1 9 2 TC2 4e 5 MODEL RSLCMOD RES TC1 1 5e 3 TC2 3e 5 MODEL RsourceMOD RES 1 1 3 2 1 6 MODEL RvthresMOD RES TC1 5 3e 3 TC2 1 3e 5 MODEL RvtempMOD RES TC12 2 7e 3 TC2 1e 6 MODEL S1AMOD VSWITCH RON 1e 5 ROFF 0 1 VON 4 VOFF 1 5 MODEL S1BMOD VSWITCH RON 1e 5 ROFF 0 1 VON 1 5 VOFF 4 MODEL S2AMOD VSWITCH RON 1e 5 ROFF 0 1 VON 1 VOFF 5 MODEL S2BMOD VSWITCH RON 1e 5 ROFF 0 1 VON 5 VOFF 1 ENDS Note For further discussion of the PSPICE model consult A New PSPICE Sub Circuit for the Power MOSFET Featuring Global Temperature Options IEEE Power Electronics Specialist Conference Records 1991 written by William J Hepp and C Frank Wheatley 2002 Fairchild Semiconductor Corporation FDP16AN08A0 FDB16ANO8A0 Rev A1 0V80NV9I 8Q4 9 SABER Electrical Model rev March 2002 t
8. TAIN REQUIRED PEAK Ins OV lg REF Figure 17 Gate Charge Test Circuit Vps Figure 19 Switching Time Test Circuit 2002 Fairchild Semiconductor Corporation g REF 0 Figure 18 Gate Charge Waveforms ton 9 torr ta on ta orr V x 9096 1096 0 9096 Vas 5096 PULSE WIDTH 10 Figure 20 Switching Time Waveforms FDP16AN08A0 FDB16ANO8A0 Rev A1 0V80NV9I g8Q4J 9 Thermal Resistance vs Mounting Pad Area The maximum rated junction temperature and the thermal resistance of the heat dissipating path determines the maximum allowable device power dissipation in an application Therefore the applications ambient temperature T4 C and thermal resistance Raja C W must be reviewed to ensure that T jy is never exceeded Equation 1 mathematically represents the relationship and serves as the basis for establishing the rating of the part T Im 74 EQ 1 Rej In using surface mount devices such as the TO 263 package the environment in which it is applied will have a significant influence on the part s current and maximum power dissipation ratings Precise determination of is complex and influenced by many factors 1 Mounting pad area onto which the device is attached and whether there is copper on one side or both sides of the board 2 The number of copper layers and the thickness of the board he use of ext
9. a C W 80 60 40 20 0 1 0 645 ae Roya 26 51 19 84 0 262 Area EQ 2 Roya 26 51 128 1 69 Area EQ 3 10 64 5 AREA TOP COPPER AREA in cm Figure 21 Thermal Resistance vs Mounting Pad Area FDP16AN08A0 FDB16ANO8A0 Rev A1 9 PSPICE Electrical Model SUBCKT FDB16ANO08A0 2 1 3 rev March 2002 Ca 12 8 10e 10 Cb 15 14 8e 10 Cin 6 8 1 7e 9 DPLCAP 5 10 Dbody 7 5 DbodyMOD Dbreak 5 11 DbreakMOD Dplcap 10 5 DplcapMOD Ebreak 11 7 17 18 85 40 Eds 148581 50 Egs 1386 8 1 RDRAIN Esg 6 106 8 1 ESG Evthres 6 21 19 8 1 EVTHRES Evtemp 20 6 18 22 1 LONE E 12 GATE RGATE 6 NV It 8 17 1 qe WE 3 Sey RLGATE HV MSTRO Lgate 1 9 5 96e 9 L drain 2 5 1 0e 9 8 Lsource 3 7 5 75e 9 RLgate 1 9 59 6 51 S2A RLdrain 2 5 10 12 7 713 14 15 HLsource 7 57 5 8 13 S1B S2B Mmed 16 6 8 8 MmedMOD 13 CB Mstro 16 6 8 8 MstroMOD CA Mweak 16 21 8 8 MweakMOD Rbreak 17 18 RbreakMOD 1 Rdrain 50 16 RdrainMOD 3 3e 3 Rgate 9 20 3 31 RSLC1 5 51 RSLCMOD 1e 6 RSLC2 5 50 1e3 Rsource 8 7 RsourceMOD 7e 3 Rvthres 22 8 RvthresMOD 1 Rvtemp 18 19 RvtempMOD 1 51 6 12 138 S1AMOD S1b 13 12 138 S1BMOD 52 6 15 14 13 S2AMOD S2b 13 15 14 13 S2BMOD Vbat 22 19 DC 1 ESLC 51 50 VALUE V 5 51 ABS V 5 51 PWR V 5 51 1e 6 200 3 MODEL DbodyMOD D IS 2 4E 11 N 1 08 RS 3 3e 3 TRS1 2 2e 3 TRS2 2 5e 9 4 CJO 1 2e 9 M 5 6e 1 T
10. copy of the requirements see AEC Q101 at http www aecouncil com Reliability data can be found at http www fairchildsemi com products discrete reliability index html All Fairchild Semiconductor products are manufactured assembled and tested under ISO9000 QS9000 quality systems certification 2002 Fairchild Semiconductor Corporation FDP16ANO08A0 FDB16ANO8A0 Rev A1 0V80NV9I 8Q4J 9 Package Marking and Ordering Information Device Marking Width Quantity FDB16AN08A0 FDB16ANO08A0 TO 263AB 800 units FDP16ANO8A0 FDP16ANO08A0 TO 220AB 50 units Electrical Characteristics T 25 unless otherwise noted Symbol Test Conditions Min Typ Max Units Off Characteristics Drain to Source Breakdown Voltage Ip 250uA Vas OV 7 V Vps 60V 1 Gate to Source Leakage Current Ves 120V 00 nA Gate to Source Threshold Voltage Vas Vps lp 2504A 2 4 V Ip 58A Vas 10V 0 013 0 016 Ip 29A Vas 6V 10 019 0 029 Ip 58A Vas 10V T 175 C EE 0 032 0 037 Dynamic Characteristics Ciss pF Coss Output Capacitance ae Tod Crs pF uz a we Qno Threshold Gate Oharge 38 8 ozsa ass 78 ne ic Switching Characteristics Vos 10V m oo p SA T taor Turn Off Delay Time Vas
11. emplate FDB16ANO08A0 n2 n1 n3 electrical n2 n1 n3 var i iscl dp model dbodymod isl 2 4e 11 nl 1 08 rs 3 3e 3 trs1 2 2e 3 trs2 2 5e 9 cjo 1 2e 9 m 5 6e 1 tt 1 3e 8 xti 3 9 dp model dbreakmod rs 1 5e 1 trs1 1e 3 trs2 8 9e 6 dp model dplcapmod cjo 5e 10 isl 10e 30 nl 10 m 0 52 m model mmedmod type _n vto 3 2 kp 4 is 1e 30 tox 1 m model mstrongmod type _n vto 3 85 kp 70 is 1e 30 tox 1 m model mweakmod type _n vto 2 7 kp 0 06 is 1e 30 tox 1 rs 0 1 sw vcsp model s1amod ron 1e 5 roff 0 1 von 4 voff 1 5 DPLCAP 5 sw vcsp model s bmod ron 1e 5 roff 0 1 von 1 5 voff 4 Sw vcsp model s2amod ron 1e 5 roff 0 1 von 1 voff 5 sw vcsp model s2bmod ron 1e 5 roff 0 1 von 5 voff 1 n12 n8 10e 10 c cb n15 n14 8e 10 c cin n6 n8 1 7e 9 LDRAIN DRAIN RLDRAIN 10 RSLC2 dp dbody n7 n5 model dbodymod dp dbreak n5 n11 model dbreakmod dp dplcap n10 n5 model dplcapmod spe ebreak n11 n7 n17 n18 85 40 spe eds n14 n8 n5 n8 1 spe egs n13 n8 n6 n8 1 GATE 10 50 RDRAIN E EVTHRES ar KG LGATE EVTEMP MO 9 ES MSTRO ESG MMED DBREAK 11 DBODY MWEAK EBREAK 2002 Fairchild Semiconductor Corporation spe esg n6 n10 n6 n8 1 RLGATE spe evthres n21 n19 n8 1 spe evtemp n20 n6 n18 n22 1 LSOURCE 8 E SOURC RSOURCE RLSOURCE CIN i it n8 n17 1 RBREAK l gate n1 n9 5 96e 9 17 18 Idrain n2 n5
12. ernal heat sinks The use of thermal vias Air flow and board orientation oa A C For non steady state applications the pulse width the duty cycle and the transient thermal response of the part the board and the environment they are in Fairchild provides thermal information to assist the designer s preliminary application evaluation Figure 21 defines the for the device as a function of the top copper component side area This is for a horizontally positioned FR 4 board with 10z copper after 1000 seconds of steady state power with no air flow This graph provides the necessary information for calculation of the steady state junction temperature or power dissipation Pulse applications can be evaluated using the Fairchild device Spice thermal model or manually utilizing the normalized maximum transient thermal impedance curve Thermal resistances corresponding to other copper areas can be obtained from Figure 21 or by calculation using Equation 2 or 3 Equation 2 is used for copper area defined in inches square and equation 3 is for area in centimeters square The area in square inches or square centimeters is the top copper area including the gate and source pads 19 84 R 26 51 EQ 2 0 262 Area ida Area in Iches Squared 128 R 26 5 EQ 3 1 69 Area ee Area in Centimeters Squared 2002 Fairchild Semiconductor Corporation Roy
13. ished at a later date Fairchild Semiconductor reserves the right to make changes at any time without notice in order to improve design This datasheet contains final specifications Fairchild Semiconductor reserves the right to make changes at any time without notice in order to improve design This datasheet contains specifications on a product that has been discontinued by Fairchild semiconductor The datasheet is printed for reference information only Rev H7
14. therm ctherm2 6 5 0 004 ctherm ctherm3 5 4 0 006 ctherm ctherm4 4 3 0 01 ctherm ctherm5 2 0 03 ctherm ctherm6 2 tl 0 08 rtherm rtherm1 th 6 0 075 rtherm rtherm2 6 5 0 09 rtherm rtherm3 5 4 0 1 rtherm rtherm4 4 3 0 15 rtherm rtherm5 3 2 0 2 rtherm rtherm6 2 tl 0 25 2002 Fairchild Semiconductor Corporation RTHERM1 RTHERM2 RTHERM3 RTHERM4 RTHERM5 RTHERM6 th tl JUNCTION CASE FDP16AN08A0 FDB16ANO8A0 Rev A1 CTHERM1 CTHERM2 CTHERM3 CTHERM4 CTHERM5 CTHERM6 0V80NV9I8Q4 9 TRADEMARKS The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is not intended to be an exhaustive list of all such trademarks ACEx FASTr Bottomless FRFET CoolFET GlobalOptoisolator CROSSVOLT GTO DOME HiSeC EcoSPARK E CMOS M ISOPLANAR EnSigna LittleFETTM FACT M MicroFET FACT Quiet Series MicroPak FAST 9 MICROWIRE DISCLAIMER OPTOLOGIC OPTOPLANAR PACMAN POP Power2471M PowerTrench 9 QFET QS QT Optoelectronics Quiet Series SILENT SWITCHER 9 SMART START SPM Stealth SuperSOT 3 SuperSOT 6 SuperSOT 8 SyncFET TinyLogic TruTranslation UHC UltraFET VOX FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RE
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FAIRCHILD FDP16AN08A0 FDB16AN08A0 handbook(1)