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ST AN3116 Application Note

1. 9 Simultaneous measurement of voltage and current 10 Dual fast interleaved mode 11 Dual slow interleaved mode 12 Dual alternate trigger mode 13 Dual combined regular injected simultaneous mode 14 Dual combined injected simultaneous interleaved mode 15 UPS system x hawt ee Gs Oars Gaeta a ed tee be eG Paw Ea s wade eee a eae ae 15 Doc ID 16840 Rev 1 ky AN3116 Independent modes Note 1 2 1 2 1 Note Independent modes Single channel single conversion mode Description This is the simplest ADC mode In this mode the ADC performs the single conversion single sample of a single channel x refer to Figure 1 and stops after completion of the conversion This application note is not delivered with a firmware example of this mode Figure 1 Single channel single conversion mode CHx ai17600 Example of application This mode can be used for the measurement of a voltage level to decide if the system can be started or not Measure the voltage level of the battery before starting the system if the battery has a low level the low battery message appears In this case do not start the system Multichannel scan single conversion mode Description This m
2. Ti AN3116 Y7 Application note STM32 s ADC modes and their applications March 2010 Introduction STM32 microcontrollers have one of the most advanced ADCs on the microcontroller market You could imagine a multitude of applications based on the STM32 ADC features Some ADC modes are provided to simplify measurements and give efficient results in applications such as motor control This application note provides help for ADC users to understand some advanced modes offered in the STM32 microcontrollers and to quick start development Each of the described modes is provided with an example of application to better understand how to use them Most modes come with a basic firmware to make it easier to understand the ADC configuration This application note is divided into two sections independent modes and dual modes The first section describes modes used with a single ADC The second section describes modes that should be used with two ADCs ADC1 and ADC2 working jointly This application note does not describe the ADC modes that result from the combination of other modes Doc ID 16840 Rev 1 1 18 www st com Contents AN3116 Contents 1 Independent modes eese 5 1 1 Single channel single conversion mode 5 1 1 1 DescriptlOt usur see nee Ph AR Ee mm Ra ERE gos arce n RR eum RU 5 1 1 2 Example of application llle 5 1 2 Multichannel scan
3. 2 4 2 Example of application llle 13 2 5 Dual combined regular injected simultaneous mode 14 2 5 1 Description sous beer m n aet o eme ee qe Ree ber hoe CR haee Rb e d 14 2 5 2 Example of application 14 2 8 Doc ID 16840 Rev 1 ky AN3116 Contents 2 6 Dual combined injected simultaneous interleaved mode 14 2 6 1 Description suse me e eee ee et NUSU dox b ORE Y gue WEE 14 2 6 2 Example of application 15 3 Conclusion unanansaannananananananza 16 4 Revision history 17 ky Doc ID 16840 Rev 1 3 18 List of figures AN3116 List of figures Figure 1 Figure 2 Figure 3 Figure 4 Figure 5 Figure 6 Figure 7 Figure 8 Figure 9 Figure 10 Figure 11 Figure 12 Figure 13 Figure 14 4 18 Single channel single conversion mode 5 ADC sequencer converting 7 channels with different configured sampling IL TEE 5 Multichannel single conversion mode 6 Single channel continuous conversion mode 6 Multichannel continuous conversion mode 7 Injected conversionmode asannnannnn 8 Dual regular simultaneous mode
4. convert signals coming from strain gauges to determine the directions and values of the different strains and deformations of an object Single channel continuous conversion mode Description The single channel continuous conversion mode converts a single channel continuously and indefinitely in regular channel conversion The continuous mode feature allows the ADC to work in the background The ADC converts the channels continuously without any intervention from the CPU Additionally the DMA can be used in circular mode thus reducing the CPU load An example of firmware is provided with this application note SingleChannelContinuous The example uses two methods DMA and interrupts To select either method simply comment or uncomment define USE DMA Transfer in the main c file Figure 4 Single channel continuous conversion mode ai17603 Doc ID 16840 Rev 1 ky AN3116 Independent modes 1 3 2 Example of applications This ADC mode can be implemented to monitor a battery voltage the measurement and regulation of an oven temperature etc In the case of the oven temperature regulation the temperature is read and compared to the temperature set by the user When the oven temperature reaches the desired temperature the heating resistor is powered off 1 4 Multichannel scan continuous conversion mode 1 4 1 Description The multichannel or scan continuous mode can be used to convert some channels s
5. herein and shall not create or extend in any manner whatsoever any liability of ST ST and the ST logo are trademarks or registered trademarks of ST in various countries Information in this document supersedes and replaces all information previously supplied The ST logo is a registered trademark of STMicroelectronics All other names are the property of their respective owners 2010 STMicroelectronics All rights reserved STMicroelectronics group of companies Australia Belgium Brazil Canada China Czech Republic Finland France Germany Hong Kong India Israel Italy Japan Malaysia Malta Morocco Philippines Singapore Spain Sweden Switzerland United Kingdom United States of America www st com 18 18 Doc ID 16840 Rev 1 ky
6. 1 and ADC2 are stored in ADC1 s data register 32 bit format Figure 7 shows how ADC1 and ADC2 convert two sequences simultaneously ADC1 converts a sequence of 16 channels successively channel 15 to channel 0 and ADC2 converts a sequence of 16 channels successively channel 0 to channel 15 This application note does not provide a firmware example However the STM32 firmware library provides an example of this mode at the following path Project S TM32F 10x_StdPeriph_Examples ADC RegSimul_DualMode Figure 7 Dual regular simultaneous mode oo EE EE Ea EN I Trigger for End of conversion regular channels on ADC1 and ADC2 L Sampling Conversion ai17606 Example of application The dual regular simultaneous mode can be used in applications where two signals should be sampled and converted at the same time For example to measure and plot the single phase or three phase instantaneous electrical power p t u t x in t Doc ID 16840 Rev 1 9 18 Dual modes AN3116 2 2 2 2 1 Note 10 18 In this case the voltage and current should be measured simultaneously and then the instantaneous power which is the product of u t and i t should be computed Figure 8 shows how to measure a power using the two ADCs in dual regular simultaneous mode To measure a single phase power ADC1 and ADC2 are used with two channels 1 channel for the voltage and 1 channel for the current To measure a t
7. Conversion trigger mode ai17605 1 5 2 Example of application This mode can be used to synchronize the conversion of channels to an event It is interesting in motor control applications where transistor switching generates noise that impacts ADC measurements and results in wrong conversions Using a timer the injected conversion mode can thus be implemented to delay the ADC measurements to after the transistor switching 8 18 Doc ID 16840 Rev 1 x AN3116 Dual modes 2 Note Note Dual modes Dual modes are available in STM32 microcontrollers that feature two ADCs ADC1 master and ADC2 slave ADC1 and ADC2 triggers are synchronized internally for regular and injected channel conversion ADC1 and ADC2 work together In some devices there are up to 3 ADCs ADC1 ADC2 and ADCS In this case ADC3 always works independently and is not synchronized with the other ADCs Do not sample the same channel on the two ADCs at the same time this would introduce conversion errors Dual regular simultaneous mode Description The dual regular simultaneous ADC mode is used to perform two conversions simultaneously owing to the synchronization of ADC1 and ADC2 Each ADC converts a channel sequence with scan enabled and the sequencer of each ADC configured or converts a single channel scan disabled The conversion can be started with an external trigger or by software In this mode the conversion results of ADC
8. ampling rate should be 1 Msamples second in accordance with Shannon Nyquist criteria With one ADC the only configuration is fapc 14 MHz and the sampling time Ts 1 5 cycles Ts ts x fapc refer to the datasheet of the STM32 product you are using for more details on the sampling time vs the source impedance In this case the maximum allowed impedance of the source Rajjmax is 1 2 KO The conversion will not be accurate since Rain gt RAlNmax Solution Use the ADC in dual slow interleaved mode Each ADC sampling should be configured to have a minimum sampling rate of 500 ksamples second with fapc 14 MHz fanc TTotalRate Ts T conv tTotalRate X fanc where sRate TqotalRate is the total conversion time in ADC clock cycles ttotalRate is the sum of the sampling time t ts T fapc and the conversion time lconv tconv Teonv fanc Teony is a constant equal to 12 5 cycles T is the sampling time given in ADC cycles it is equal to f 6 T APC _125 Lio 12 5 15 5 cycles where Fate is the sampling rate sRate 500x10 frequency Since T 15 5 cycles is not available for the configuration for more details about the different available T values refer to the 12 bit ADC characteristics section in the datasheet of the STM32 product you are using The nearest available value is T 13 5 To know whether this value meets Shannon Nyquist criteria we need to calculate the sampling ra
9. and ADC2 start converting the group of injected channels When the two ADCs finish the injected conversion they resume the conversion of the channel configured in interleaved mode Doc ID 16840 Rev 1 ky AN3116 Dual modes Note This application note is not delivered with a firmware example of this mode Figure 13 Dual combined injected simultaneous interleaved mode Interleaved converion ADC2 interrupted by injected simultaneous conversion ADEI End of injected conversion on ADC1 and ADC2 Trigger for regular channel ADC2 IN CH10 FE CH11 End of conversion on each ADC ADEI BN CH11 CH10 at the end of the conversion of CHO I 1 Trigger for injected channels i L Sampling 1 Conversion BN CHO CHO 1 ai17612 2 6 2 Example of application You can use this dual combined mode in a UPS system uninterruptible power supply The battery voltage is monitored with the ADC watchdog converted in dual interleaved mode The ADC also monitors the power consumed by the load by measuring the voltage and the current in dual injected simultaneous mode Figure 14 UPS system Battery voltage Load voltage amd current monitoring measurements Batteries DC to AC ai17613 Doc ID 16840 Rev 1 15 18 Conclusion AN3116 3 Conclusion This application note explains some ADC modes and provides examples of applications to make it easier to understand the presented modes Most examples come wi
10. e of firmware is provided with this application note Dual AlternateTrigger Dual alternate trigger mode sampio CHO E CH1 BN CH2 CH3 BE conversion poo EN EN EN x P d Val Pal JEOC on ADC2 2nd trigger 4th trigger 6th trigger 8th trigger ai17610 2 4 2 Example of application The dual alternate trigger mode makes it possible to have sampling points as close as possible to each other down to 1 5 ADC cycles This is interesting for instance in motor control applications where a single shunt sensor is used for three phase current reading In some cases the PWM duty cycle of the power stage has to be limited to maintain a minimum time slot for two consecutive conversions If the sampling points are as close as possible the PWM duty cycle is maximized which increases the voltage applied to the motor Doc ID 16840 Rev 1 13 18 Dual modes AN3116 2 5 2 5 1 Note 2 5 2 2 6 2 6 1 14 18 Dual combined regular injected simultaneous mode Description The dual combined regular injected simultaneous ADC mode is a regular simultaneous mode that allows injection The injected channels are also converted simultaneously In this mode you should convert sequences with the same length or ensure that the interval between triggers is longer than the longest of the 2 sequences Otherwise the ADC with the shortest sequence may restart while the ADC with the longest sequence is completing the previous conversio
11. ed for the conversion of one channel ADC1 and ADC2 convert the selected channel alternately with a period of 14 ADC clock cycles The channel is thus converted every 14 clock cycles Each ADC converts the channel every 28 ADC clock cycles The conversion can be started by external trigger or by software and the conversion results of ADC1 and ADC2 are stored into ADC1 s data register 32 bit format The maximum allowed sampling time is 14 ADC clock cycles to avoid any overlap with the next conversion This means that the only allowed sampling times are 1 5 7 5 and 13 5 cycles Continuous conversion should not be used in this mode since the ADCs would continuously convert the selected regular channel automatically the CONT bit should not be set in this mode Note 1 Itis highly recommended to use DMA instead of interrupts to avoid the loss of data 2 An example of firmware is provided with this application note Dual Slowlnterleaved ky Doc ID 16840 Rev 1 11 18 Dual modes AN3116 2 3 2 12 18 Figure 10 Dual slow interleaved mode z Cm End of conversion on ADC2 l l ADC1 C Conversion i LJ CHO I l l l Trigger for 4 regular 114 ADC clock cycles channel 1 End of conversion on ADC1 l l l 28 ADC clock cycles ai17609 Example of application Let us assume that the signal to be converted has a maximum frequency fin of 500 kHz with an impedance Rain 10 kQ The minimum s
12. f data An example of firmware is provided with this application note Dual Fastlnterleaved Doc ID 16840 Rev 1 ky AN3116 Dual modes Figure 9 Dual fast interleaved mode ADC2 C Sampling End of conversion on ADC2 ADC1 i i C Conversion l 2 E B CHO I Trigger for lt gt End of conversion on ADC1 regular 17 ADC clock cycles channels 1 1 ai17608 2 2 2 Example of application This mode is used to speed up the sampling rate of the ADC when 2 Msamples second are needed with 1 5 cycle of sampling time ADC1 and ADC2 convert the same channel alternately to reduce the conversion time While ADC1 samples channel CHx ADC2 converts the previous sample For example if a signal to be converted has a maximum frequency of 800 kHz the sampling rate frequency should be higher than or equal to twice the frequency of the signal to be converted in accordance with Shannon Nyquist criteria Since the maximum sampling rate is 1 Msample second with one ADC the criteria cannot be met This is solved by using the dual fast interleaved ADC mode In this way the sampling rate frequency becomes 2 Msample second since the two ADCs ADC1 and ADC2 work alternately and sample the signal at equal periods 7 ADC cycles With the dual fast interleaved ADC mode 2 Msamples second can be achieved with 1 5 cycles of sampling time 2 3 Dual slow interleaved mode 2 3 1 Description The dual slow interleaved ADC mode is intend
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14. hree phase power ADC1 and ADC2 are used with 6 channels 3 channels for the voltage and 3 channels for the current Figure 8 Simultaneous measurement of voltage and current Single phase case anci EUM MELLE NOU ADC2 CHy i t B CHy i t CHy i p t u t x t CHx x CHy Three phase case anci onra emery CR ADC2 E CHx i gni t E CHy i pho t E CHz igna t Pphi t Upn1 t ipn1 t CHu x CHx Ppna 0 Upn2 t ipn2 t CHv x CHy Ppha t Uupna t ipna t CHw x CHz ai17607 Dual fast interleaved mode Description The dual fast interleaved ADC mode is intended for the conversion of one channel ADC1 and ADC2 convert the selected channel alternately with a period of 7 ADC clock cycles This means that the channel is converted every 7 clock cycles Each ADC converts the channel every 14 ADC clock cycles With a 14 MHz ADC clock it is thus possible to reach 2 Msamples per second 14 MHz 7 2 MHz sampling frequency The conversion can be started by external trigger or by software and the conversion results of ADC1 and ADC2 are stored into ADC1 data register 32 bit format The maximum allowed sampling time is 7 ADC clock cycles to avoid the overlap between the ADC1 and ADC2 sampling phases in the event that they convert the same channel This means that the only allowed sampling time is 1 5 cycles It is highly recommended to use DMA instead of interrupts to avoid the loss o
15. ns An example of firmware is provided with this application note Dual Combined Reg Inj Sumultaneous The example uses two methods DMA and interrupts To select either method simply comment or uncomment define USE DMA Transfer in the main c file Figure 12 Dual combined regular injected simultaneous mode E NEN EZM E EX E Regular simultaneous conversion interrupted by injected simultaneous x 1 i l l Trigger for End of conversion on ADC1 edu ADC2 E CH10 ia CH11 and ADC2 I channels I I l ooro oo Em Em C P End of injected conversion on ADC1 Conversion Trigger for injected channels and ADC2 ai17611 Example of application The dual combined regular injected simultaneous mode can be used to read 3 phase currents at definite times This mode is interesting when you read the currents of two of the phases and you determine the current of the third phase by extrapolation since there is a relationship between the currents of the 3 phases Dual combined injected simultaneous interleaved mode Description This mode is the combination of the dual interleaved mode fast or slow and the dual injected simultaneous mode When the regular channel is triggered the dual interleaved conversion starts ADC2 makes the first conversion then ADC1 converts the channel and so on When the injected channel is triggered it interrupts the interleaved channel conversion and the two ADCs ADC1
16. ode is used to convert some channels successively in independent mode With the ADC sequencer you can use this ADC mode to configure any sequence of up to 16 channels successively with different sampling times and in different orders You can for example carry out the sequence shown in Figure 2 In this way you do not have to stop the ADC during the conversion process in order to reconfigure the next channel with a different sampling time This mode saves additional CPU load and heavy software development Figure 2 ADC sequencer converting 7 channels with different configured sampling times LLL INIZL I EE EE EZ AA eS This application note is not delivered with a firmware example of this mode Doc ID 16840 Rev 1 5 18 Independent modes AN3116 1 2 2 1 3 1 3 1 Note 6 18 Figure 3 Multichannel single conversion mode Sto ai17602 This mode can be used when starting a system depends on some parameters like knowing the coordinates of the arm s tip ina manipulator arm system In this case you have to read the position of each articulation in the manipulator arm system at power on to determine the coordinates of the arm s tip Example of application This mode can also be used to make single measurements of multiple signal levels voltage pressure temperature etc to decide if the system can be started or not in order to protect the people and equipment It can likewise be used to
17. single conversion mode 5 1 2 1 Description KA KAA be way Xue ee EE CORP A ERE RES ERR 5 1 2 2 Example of application 6 1 3 Single channel continuous conversion mode 6 1 3 1 Description yi obese cuim bade to do det tet ee 6 1 3 2 Example of applications 7 1 4 Multichannel scan continuous conversion mode 7 1 4 1 Description isc ence nse eed RXG Ex RES baw la dee XX EG Gu Kex E EE 7 1 4 2 Example of application 7 1 5 Injected conversion mode 7 1 5 1 WS nA terer II AAA 7 1 5 2 Example of application IIIA rerent 8 2 DU MOJ ss sa aces e dod ea RR GR HZ o e UU le M eae 9 2 1 Dual regular simultaneous mode 9 2 1 1 Description usce ea lcs emm ee Bade ee RUE oe ex 9 2 1 2 Example of application llis 9 2 2 Dual fast interleaved mode 10 2 2 1 Description ueni deeem eR ERISDESES pu apd ETE AS SERE 10 2 2 2 Example of application 11 2 3 Dual slow interleaved mode 11 2 3 1 Description user ERE RES ER Ex doa a eet oes als 11 2 3 2 Example of application 12 2 4 Dual alternate trigger mode 13 2 4 1 DOSCrPUON ECT 13
18. te with T 13 5 and fapc 14 MHz TrotalRate 13 5 12 5 26 cycles FsRate fapc TTotalRate 14 109 26 538 kHz per ADC Since the conversion is made with two ADCs ADC1 ADC2 working alternately the sampling rate frequency is Fspate 538 x 2 1076 kHz gt 2 x fin and so the Shannon Nyquist criteria is respected Doc ID 16840 Rev 1 ky AN3116 Dual modes 2 4 2 4 1 Note Figure 11 YA trigger rbd trigger xt trigger x i aa on ADC1 gt g 9 With T 13 5 cycles the maximum allowed impedance of the source Ram is 19 KO Since the source has an impedance Ra 10 kQ lt 19 kQ the impedance condition is respected With a single ADC and with T 1 5 corresponding to 1 2 KQ the impedance condition is not satisfied By using two ADCs we have thus extended the impedance margin from 1 2 KQ to 19 kQ With the dual slow interleaved ADC mode the 1 Msamples second sampling rate is achieved with higher input impedances Dual alternate trigger mode Description The dual alternate trigger ADC mode can be used only on an injected channel group In this mode ADC1 and ADC2 alternately convert the injected channels on the same external trigger When the first trigger occurs all injected group channels in ADC1 are converted When the second trigger happens all injected group channels in ADC2 are converted and so on The maximum number of injected channels in the group is 4 for each ADC An exampl
19. th firmware to simplify the ADC configuration and speed up development With the provided firmware examples you can modify the code a little to switch from one mode to another The STM32 s ADC has several modes intended for advanced conversion processes so as to attain efficient conversion results in applications such as motor control DMA is a major feature and its use is recommended when possible to avoid the loss of samples and release the CPU load 16 18 Doc ID 16840 Rev 1 ky AN3116 Revision history 4 Revision history Table 1 Document revision history Date Revision Changes 02 Mar 2010 1 Initial release Doc ID 16840 Rev 1 17 18 AN3116 Please Read Carefully Information in this document is provided solely in connection with ST products STMicroelectronics NV and its subsidiaries ST reserve the right to make changes corrections modifications or improvements to this document and the products and services described herein at any time without notice All ST products are sold pursuant to ST s terms and conditions of sale Purchasers are solely responsible for the choice selection and use of the ST products and services described herein and ST assumes no liability whatsoever relating to the choice selection or use of the ST products and services described herein No license express or implied by estoppel or otherwise to any intellectual property rights is granted under t
20. uccessively with the ADC in independent mode With the sequencer you can configure any sequence of up to 16 channels successively with different sampling times and different orders This mode is similar to the multichannel single conversion mode except that it does not stop converting after the last channel of the sequence but it restarts the conversion sequence from the first channel and continues indefinitely Figure 5 Multichannel continuous conversion mode ai17604 1 4 2 Example of application This mode can be used to monitor multiple voltages and temperatures in a multiple battery charger The voltage and temperature of each battery are read during the charging process When the voltage or the temperature reaches the maximum level the corresponding battery should be disconnected from the charger 1 5 Injected conversion mode 1 5 1 Description This mode is intended for use when conversion is triggered by an external event or by software The injected group has priority over the regular channel group It interrupts the conversion of the current channel in the regular channel group Note An example of firmware is provided with this application note Indep_InjectedGroup Doc ID 16840 Rev 1 7 18 Independent modes AN3116 Figure 6 Injected conversion mode ADC1 EL CHO on nected CH1 B CH3 trigger I l Aa End of injected conversion i ADC1 on ADC1 Sampling 1 l Regular simultaneous mode l interrupted by the alternate f C

ST AN3116 Application Note

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