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ST AN2677 Application note handbook

1. 9 CO CO s CO 10 st QN r Q st 10 gt gt SDF OTAN DA 522222222 00022 F222 HS High sink capability Doc ID 14217 Rev 3 21 41 STM8 development tools AN2677 8 STM8 development tools Development tools for STM8A microcontrollers include the STice emulation system supported by a complete software tool package including C compiler assembler and integrated development environment with high level language debugger 8 1 Single wire interface module SWIM 8 1 1 SWIM overview In circuit debugging mode or in circuit programming mode are managed through a single wire hardware interface based on an open drain line featuring ultra fast memory programming Coupled with an in circuit debugging module the SWIM also offers a non intrusive read write to RAM and peripherals This makes the in circuit debugger extremely powerful and close in performance to a full featured emulator The SWIM pin can be used as a standard I O with 8 mA capability which has some restrictions if the user wants to use it for debugging The most secure way to use it is to provide a strap option on the PCB Please refer to the STM8 SWIM communication protocol and debug module user manual UM0470 for more SWIM protocol details
2. 12 4 3 External clock oak yee Pho dows is 12 5 Reset control Dem 14 5 1 Reset management overview 14 5 2 Hardware reset implantation 15 5 2 1 RC GIIGUIE us sd e ba doe E rao Gabe ANG an ee ats 16 6 Recommendations 17 6 1 Printed circuit board dates PERSE 17 6 2 Component position 17 6 3 Ground and power supply Vss Vpp 17 6 4 DECOUDIING 5 28 EERE DE DADE 17 65 teeta wens 18 6 6 Unused and features 18 6 7 deans 18 7 Reference design 19 7 1 Components reference 19 7 2 eda a a UR 20 2 41 Doc ID 14217 Rev 3 ky AN2677 Contents 7 3 PIMOS ok es 21 8 STM8 development tools 22 8 1 Single wire interface module SWIM 22 8 1 1 SWIM overview 22 8 1 2 SWIM connector 5 22 8 1 3 Hardwar
3. 36 STVD Run the 1 37 STM8 evaluation 38 Doc ID 14217 Rev 3 5 41 Hardware requirements summary AN2677 6 41 Hardware requirements summary To build an application around an STM8A device the application board should at least provide the following features Power supply Clock management Reset management Debugging tool support Single wire interface module SWIM connector Doc ID 14217 Rev 3 AN2677 Power supply 2 2 1 Note Note Power supply Power supply overview The device can be supplied through a 3 0 V to 5 5 V external source An on chip power management system provides the 1 8 V digital supply to the core logic both in normal and low power modes It is also capable of detecting voltage drops on both main external 3 3 V 5 V and internal 1 8 V supplies The device provides e One pair of pads Vpp Vgs 3 3 V x 0 3 V to 5 V 0 5 V dedicated to the main regulator ballast transistor supply e Two pairs of pads dedicated for j5 Vss jo 3 3 V 0 3 V to 5 V 0 5 V which used to power only the I O s On 32 pin packages only one pair is bonded For Vppid Vssio Next to Vpp Vss it is recommended to connect these two pairs together and to use only one decoupling capacitance The purpose is to ensure good noise immu
4. COPYRIGHT 2007 main c mono lcd c mono lcd h 36 41 Doc ID 14217 Rev 3 3 2677 Setting up the STM8 development environment 10 3 5 Running the software After entering debug mode the software can be started by the run command in the menu Debug Run see Figure 26 Figure 26 STVD Run the software Gore Registers File Edit Project Build Debug Debuginstrument Tools Window Help 1 STMBAF51xx STM SWIM project stw Debug project elf main c O at banaa 2 PPARCYD 5 Ne Q stop Debugging Alt Num 16 nCount j 0 5 Y t Dcbos E Source Fies C86 x ht t vali 5 2 E mono_led c Chip Reset Ctrl Shift F5 Be 0000 9 8 Library Restart IDE A De B 000 E stm8 adc c Continue 4 0 stm8 awu c N c i gh stm8 i F f j 05006 stm8 clk c aie AXES c stm8 8 Step Into flash T step Over F10 stm8 gpio c m c c Ph Step Into ASM 11 5 stm amp icc Step Over ASM Akacio Disassembly gt m ypeDef SPI 5 cM stm amp P Step Out main c stm8 linuarl Run to Cursor 10 0 8902 lt Delay 10 gt 0 85 POPU X 8 rst 0 8903 lt 1 11 gt 0x81
5. 39 12 Revision iesus sezskrhsmaREIR RR cheeses 40 ky Doc ID 14217 Rev 3 3 41 List of tables AN2677 List of tables Table 1 Clock SOUPCES 13 Table 2 Component list een Gok Os hg lees 19 Table 3 SWIM connector 4 22 Table 4 Document revision history 4 41 Doc ID 14217 Rev 3 ky AN2677 List of figures List of figures Figure 1 Figure 2 Figure 3 Figure 4 Figure 5 Figure 6 Figure 7 Figure 8 Figure 9 Figure 10 Figure 11 Figure 12 Figure 13 Figure 14 Figure 15 Figure 16 Figure 17 Figure 18 Figure 19 Figure 20 Figure 21 Figure 22 Figure 23 Figure 24 Figure 25 Figure 26 Figure 27 Power supply edd ee oe oe 7 External 8 Typical layout of Vpp Vss 9 Analog input 10 System clock distribution internal clock 12 Reset management 14 Output
6. 15 Input characteristics 1 15 RC circuit ved ape E 16 Reference 1 20 LQFP 80 pin 21 Debug system block 22 Hardware connection 0 23 Connection 23 STice in emulation configuration 1 25 In circuit programming and 0 26 8 software toolchain 1 27 STM8 firmware library examples 29 STVD open example workspace 31 STVD MCU edit mode 4 32 STM8 firmware library online help 32 STVD Building the 33 STVD Selecting the debug 34 Connecting the debug instrument to the STM8 evaluation 35 STVD Starting the debug 5 5
7. STice SYSxxx Includes all emulation resources y 2 wa CF FPxxx Connection flex to connect to application board M 9 4 2 7 d gt Ww 7 a 3 LO 1 AS xxxx Adapter socket on application d board to plug in emulator place of SS 227 ADixxxx Connection v microcontroller il adapter to link connection ie cable to microcontroller 8 2 3 In circuit programming and debugging In the in circuit debugging programming configuration STice allows the application to be programmed in the microcontroller and for the application to be debugged while it runs on the microcontroller on the application board STice supports the SWIM protocol making it possible to in circuit program and debug the microcontroller using only one general purpose In both the emulation and the in circuit programming debugging configuration STice is driven by the ST visual develop STVD or ST visual programmer STVP integrated development environment running on the host PC This provides total control of advanced application building debugging and programming features from a single easy to use interface ky Doc ID 14217 Rev 3 25 41 STM8 development tools AN2677 26 41 Figure 16 In circuit programming and debugging N ICD ICP flat cable connects STice to microcontroller via ICD ICP connector on application board SWIM co
8. Setting up the STM8 development environment AN2677 10 2 1 Figure 20 Project editing All project source files are visible and can be edited see Figure 20 STVD MCU edit mode ST Visual aed Develop project stw main c Ele Edit View Project Buld Debug Debus instrument Tools Window Help project stw project 5 qj Source Files library 23 Include Files 23 External Dependencies us seann or FREER ARRER ARE R ARE AR AREER AREER REET fae a aee e a re Bfile main c the firmware main function 8 mono_led c stm8_adc c 5 stm8 awu c stm8 beep c X clk c X stm8 exti c X stm8 flash c X stm8_gpio c X i2c c itc c X stm8_iwdg c stm _linuart c stm rst c stm amp spi c stm8 tim1 c X stm8_tim2 c X stm8 tim3 c X stm8 tim4 c X stm8 usart c stm8_wwdg c 8 main c stma8 amp stp interrupt vector c THE PRESENT SOFTWARE WHICH G IN ATIO RD IN LECTRO JENTIAL YRIGHT 2007 STMicro Includes include stm8 lib h include mono lcd h Private defin Evi rd 1 0 figuration idefine LEDS PORT GPIOH define LEDi1 PIN PIN 3 define LED2 PIN GPIO PIN 2 define LED3 PIN 1 define LED4 PIN GPIO PIN 0 B 1 Library stm8 conf
9. wv AN2677 YZ Application note Getting started with the STM8A Introduction This application note complements the information in the STM8A datasheets by describing the minimum hardware and software environment required to build an application around an 8 8 bit microcontroller device It is divided into the following sections Power supply Analog to digital converter ADC Clock management Reset control and development Debugging tool support STMB8 software toolchain Setting up the STM8 development environment This application note also contains detailed reference design schematics with descriptions of the main components In addition some hardware recommendations are given June 2009 Doc ID 14217 Rev 3 1 41 www st com Contents AN2677 Contents 1 Hardware requirements summary 6 2 Power Supply ed 7 2 1 Power supply overview 7 2 2 Main operating voltages 8 2 3 Power on power down reset POR PDR 8 3 Analog to digital converter ADC 10 3 1 Analog power 10 3 2 Analog INPUL a cios 10 4 Clock management 12 4 1 Clock management overview 12 4 2 Internal
10. Figure 12 Debug system block diagram 100 kHz Osc Peripheral SWIM entry DBG 2 5 Comm STM8 RAM layer decode wore 4 NVM Internal RC 8 1 2 SWIM connector pins The SWIM connector pins consist of 4 pins as described in Table 3 Table 3 SWIM connector pins Pin number Pin name Pin 1 Vpp Pin 2 SWIM pin Pin 3 Vss Pin 4 Reset 22 41 Doc ID 14217 Rev 3 ky 2677 STM8 development tools 8 1 3 Hardware connection Figure 13 Hardware connection AD ICC SWIM adapter Application board SWIM connector Vpp 1 1 4 Vpp 2 2 STM8 3 3 4 4 SWIM cable Caution Itis recommended to place the SWIM header as close as possible to the STM8A device as this minimizes any possible signal degradation caused by long PCB tracks 8 2 Emulator STice 8 2 1 STice overview The STice is a modular high end emulator system which connects to the PC via a USB interface and to the application board in place of the target microcontroller It is supported by the free STM8 toolset IDE ST visual develop STVD programmer ST visual programmer STVP and STM8 assembler Please refer to the STice emulator for 8 for more details Figure 14 Connection description Emulation system Connection flex Connection adapter Adapter sock
11. corresponding to at least 30 of the total rise time is advised Figure 9 RC circuit STM8 NRSTIN Push button of 100nF RC circuit scheme requires certain delay between power down and the next power up because the delay generator has to be reinitialized In practice a pull down capacitor between RESET and Vgg needs to be discharged In the simplest RC circuit the resistor is the internal pull up from the reset pin of the microcontroller Doc ID 14217 Rev 3 ky AN2677 Recommendations 6 6 1 6 2 6 3 6 4 Recommendations Printed circuit board For technical reasons it is best to use a multi layer PCB with a separate layer dedicated to the Vss and another layer to the Vpp supply which results a good decoupling as well as a good shielding effect For many applications economical requirements prohibit the use of this type of board In this case the most important feature is to ensure a good structure for the Vss and power supply Component position A preliminary layout of the PCB must separate the different circuits according to their electromagnetic interference EMI contribution in order to reduce cross coupling on the PCB i e noisy high current circuits low voltage circuits and digital components Ground and power supply Vss Vpp The Vgs should be distributed individually to every block noisy low level sens
12. Doc ID 14217 Rev 3 ky AN2677 Reference design 7 7 1 4 Reference design Components reference Table 2 Component list ID Component name Reference Quantity Comments Refer to the Pinouts and pin description I Meon Fase charactors secre d right package 2 Push button 1 1 3 Resistor 10 kOhm 1 4 Capacitor 100 nF 5 Ceramic capacitor decoupling capacitor 5 Capacitor 1 uF 1 Decoupling capacitor 6 Capacitor 470 nF 1 Main regulator stabilization 7 Capacitor 20 40 pF 2 Used for crystal 8 Crystal 1 24 MHz 1 9 SWIM connector 4 pins 1 Doc ID 14217 Rev 3 19 41 Reference design AN2677 7 2 Schematics Figure 10 Reference design 01 5 8 80 NRST Peo mco 70 PA1 OSCI PEI I2C SCL age PA2 OSCOUT 2 2 SDA x08 PA3 TI M2 CC3 PES TI MI BK IN 6 PA4 USART_RX pea PAS USART TX PES SPI 5 25 12 4 PAG USART CK PEG AINS 25 32 2 26 PBO AI NO PFO AIN1O 26 Clock HSE 470 5 1 Em ml Ste PB2 AI PF2 VREF 422 15 PB3 AIN3 PRS AINIT Hi 5 So PBA AI PRA AINI2 29 224 PBS AINS PFS AINIS 12 i PB6 AI N6 PRO AINIA 27 4 PB7 AIN7 PEZ AINIS xL PGO CAN T
13. RET stm amp Set PC mits main c 47 void main void stm8 timl c gi d 2 0 8904 lt gt Ox520A 50 SP 0x0a stm8 tim2 c 3 GPIO InitStructure GPIO Pi main c 56 GPIO InitStructure GPIO Mode GPIO MODE OUT PP LOW FA 3 stm8 tim3 c 3 58 GPIO Init LEDS PORT amp GPIO stm8 tim4 c a E 8908 lt main 4 gt Ox6B02 LD 0x02 SP main c 57 GPIO InitStructure GPIO Pin LED1 PIN LED2 PIN LI 0 890 lt main 6 gt OxASOF LD 0x0f 0 890 lt main 6 gt Ox6B01 LD 0 01 5 Initialize SPI for LCD WS Workspace 5 Program Counter Stacks Index registers pc 0x008906 sp 0x17f3 0 100 0 89 m Accumulator Condition Flags 0500 0 2 MI Concurrent IT Nested IT Doc ID 14217 Rev 3 37 41 Setting up the STM8 development environment AN2677 10 3 6 38 41 The LCD display on the STM8 evaluation board indicates a successful debug session see Figure 27 Figure 27 STM8 evaluation board 2ZSAWG STM8 128 EVAL ws ii x Follow up Step by step additional peripherals of STM8A devices can be run following on from the initial debug session described above Many features of STM8A devices are supported by dedicated hardware on the STM8 evaluation board The necessary software drivers LIN driver buttons memory c
14. gt 12 Examples 5 e ITC Examples 1 gt IWDG Examples 1 LINUART Examples 4 e RST Examples 2 gt SPI Examples 3 TIMER1 Examples 5 TIMER2 Examples 5 x TIMER3 Examples 5 TIMER4 Examples 1 USART Examples 3 wwD amp G Examples 1 Q Modules gt Data Structures Data Fields File List Directories E Globals Doc ID 14217 Rev 3 29 41 Setting up the STM8 development environment AN2677 10 10 1 Note 30 41 Setting up the STM8 development environment The 5 8 development environment setup looks different depending on the supplier of the software SW and hardware HW tools Typical setups are described below for the following SW and HW tools e STM8C compiler from Cosmic STtoolset and STMB firmware library from STMicroelectronics e HW debug interface Rlink from Raisonance e STMS evaluation board from STMicroelectronics Installing the tools All software tools are delivered with a setup wizard which guides the user through the installation process It is recommended to install the tools in the following order 1 C compiler 2 ST toolset 3 STM8 firmware library The Rlink does not need any dedicated software installation in the STM8 development environment because the necessary drivers are delivered with the ST toolset These R link drivers must be launched separately as follows Start Programs
15. guaranteed Figure8 Input characteristics A 75ns 75ns lt 75 ns lt 75 ns lt 75 ns gt Pad A Negative train of glitch filtered Reset requested gt System reset 5 2 Hardware reset implantation The device functions correctly without an external reset circuitry However if a reset circuit is needed there are several reset implementation schemes to choose from such as power supply behavior based on the specific parameters of the application Whatever the solution chosen the idea is to keep the RESET pin at a low logic level until the supply has reached a safe operating voltage Therefore the external circuit should be designed in such a manner that there is enough delay to keep the RESET pin below the V value ki Doc ID 14217 Rev 15 41 Reset control AN2677 5 2 1 16 41 RC circuit The RC circuit concept is the simplest and most cost effective external reset solution where the supply waveform is monotonous and the maximum rise time is known The principle is to let the RESET pin rise with the microcontroller supply voltage after a delay The circuit is shown in Figure 9 The basic solution is to use an RC delay determined by the rise rate of the supply itself The component values must be chosen to create enough delay to keep the RESET pin below the Vi specification until Vcc reaches safe operating voltage Normally a delay time constant
16. no external Vpgr pin packages with 48 pins or less Vner input analog reference negative The lower negative reference voltage for the ADC should be higher than For more details about values please refer to the STM8A datasheets This input is bonded to Vgga in devices that have no external pin packages with 48 pins or less Analog input STMBA devices have 16 analog input channels which are converted by the ADC one at a time and each multiplexed with an The analog input interface of the ADC is shown in Figure 4 Figure 4 Analog input interface 5 Outside ADC nside ADC EXT Doc ID 14217 Rev 3 ky AN2677 Analog to digital converter ADC Equation 1 Cgamp where Cyn is the total equivalent capacitor on the path of Vin Cgamp is the equivalent sampling capacitance Cexrt is the total external capacitance on the path of Viy to the macro pin This includes parasitic routing capacitance pad and pin capacitance and external capacitance To ensure proper and accurate sampling the following equation must be satisfied Equation 2 3 Rew Rext X lt 55 x Tg where Rsyw 30kOhm Rexz is the total external resistance on the path of Vin Cgamp 3 PF 15 0 5 us for 2 MHz input Equation 2 is specific for and w
17. per pad to less than 15 nH Figure 2 External capacitor ESR ESL VENE Soo Rleak Where ESR is the equivalent series resistance ESL is the equivalent inductance The minimum value of C is 470 nF with an ESR between 0 05 0 2 Ohm Power on power down reset POR PDR The input supply to the main and low power regulators is monitored by a power on power down reset circuit The monitoring voltage range is 0 7 V to 2 7 V During power on the POR PDR keeps the device under reset until the supply voltages Vpp and Vppio reach their specified working area At power on a defined reset should be maintained below 0 7 V The upper threshold for a reset release is defined in the electrical characteristics section of the product datasheets A hysteresis is implemented POR gt PDR to ensure clean detection of voltage rise and fall POR PDR also generates a reset when the supply voltage drops below the Vpor ppr threshold isolated and repetitive events Recommendations All pins need to be properly connected to the power supplies These connections including pads tracks and vias should have the lowest possible impedance This is typically achieved with thick track widths and preferably dedicated power supply planes in multi layer printed circuit boards PCBs In addition each power supply pair should be decoupled with filtering ceramic capacitors C at 100 nF with o
18. the STice is also driven by the STVP Figure 16 In circuit programming and debugging on page 26 Simplified note 2 Section 9 STM8 software toolchain on page 27 Clarified that the firmware library is optional not required for writing compiling and running the first software of the STM8A Section 10 1 Installing the tools on page 30 Added a note regarding R link drivers Removed section on Project setting adjustment and figures on STVD project settings and STVD MCU selection Section 10 3 3 Connecting the hardware on page 35 Added a caution concerning jumpers Section 10 3 6 Follow up on page 38 Removed CAN driver from list of software drivers as it is not delivered by the firmware library Section 11 Documentation and online support on page 39 Updated reference material 09 Jun 2009 Modified Section 2 2 Main operating voltages and Figure 2 changed the sentence from typical value is 470 nF to minimum value is 470 nF Doc ID 14217 Rev 3 ky AN2677 Please Read Carefully Information in this document is provided solely in connection with ST products STMicroelectronics NV and its subsidiaries ST reserve the right to make changes corrections modifications or improvements to this document and the products and services described herein at any time without notice All ST products are sold pursuant to ST s terms and conditions of sale Purchasers are solely responsible for t
19. OFTWARE WDG_HALT RESET gt Run Application stopped Breakpoint 1 trapISR at timer c 69 see pu M 9 1 Integrated development environment The integrated development environment ST visual develop STVD provides an easy to use efficient environment for start to finish control of application development from building and debugging the application code to programming the microcontroller STVD is delivered as part of the free ST toolset which also includes the ST visual programmer STVP programming interface and the ST assembler linker Doc ID 14217 Rev 3 27 41 5 8 software toolchain AN2677 9 2 28 41 To build applications STVD provides seamless integration of C and assembly tool chains for ST including the Cosmic and Raisonance C compilers and the ST assembler linker When debugging STVD provides an integrated simulator software and supports a complete range of hardware tools including the low cost RLink in circuit debugger programmer and the high end STice emulator To program applications to an STMBA the STVD also provides an interface for reading from the microcontroller memories writing to them and verifying them This interface is based on the ST visual programmer STVP and supports all the target devices and programming tools supported by STVP The free ST toolset for STM8 is available from STMicroelectronics homepage see www st com Compile
20. S WHICH ARE NOT SPECIFIED AS AUTOMOTIVE GRADE MAY ONLY BE USED IN AUTOMOTIVE APPLICATIONS AT USER S OWN RISK Resale of ST products with provisions different from the statements and or technical features set forth in this document shall immediately void any warranty granted by ST for the ST product or service described herein and shall not create or extend in any manner whatsoever any liability of ST ST and the ST logo are trademarks or registered trademarks of ST in various countries Information in this document supersedes and replaces all information previously supplied The ST logo is a registered trademark of STMicroelectronics All other names are the property of their respective owners 2009 STMicroelectronics All rights reserved STMicroelectronics group of companies Australia Belgium Brazil Canada China Czech Republic Finland France Germany Hong Kong India Israel Italy Japan Malaysia Malta Morocco Philippines Singapore Spain Sweden Switzerland United Kingdom United States of America www st com ky Doc ID 14217 Rev 3 41 41
21. STtoolset Setup Install Rlink driver Doc ID 14217 Rev 3 AN2677 Setting up the STM8 development environment 10 2 Using the tools Once the tools installation is complete the ST visual develop STVD integrated development environment can be launched The user then has the choice to generate either a new workspace with a new project or to open an existing workspace If using the STVD for the first time it is recommended to open an existing project from the STM8 firmware library The STM8 firmware library includes several examples for each peripheral plus workspace containing a project which is already configured for the dot matrix display of the STM8 evaluation board It is located in the firmware subdirectory Project Cosmic see Figure 19 Figure 19 STVD open example workspace ST7 Visual Develop Edit View Project Build Debug Debug instrument Tools Window Help gt jad 1 zx 5 No Workspace Open Workspace Look in 5 8 Firmware Library Project Cosmic L Debug Workspace C Release praject stw File name proiect stw pen Files of type Project Workspace iei I Tools FindinFiles1 FindinFiles2 Debug Console For Help press F1 Ln Col MODIFIED READ CAP NUM SCRL GEE Doc ID 14217 Rev 3 31 41
22. X 92 Be 23 FE PCT M1 fase POMMI 29 Be PCAT M1 4 PCS SPI SCK PGS ae 20 1 MOSI 2 7 5 MIsO 3 _ PHO 43 2 A PDI SWIM PHI 1 2 4 PD2 TIM3_CC1 PH2 SW IM connector mea HENCE pu 735 _ 77 PD4 TIM2 CCI PH4 TIMi 39 Debug PDS LINUART PHS TIMI NCC3 35 0 PDG LINUART RX PH TIMI 2 35 PH7 TIMI_NCC1 38 8 57 VDDI O 1 432 49 2 4 PEPEPEPE 2 qz c5 C6 cz 100 nF I 100 nF 100 nF 100nF THF VSSA Je 159101 6 VSSI O 2 MCU Decoupling Capacitor ai15318 1 When and signals are available 64 pin packages and above and are mapped to pins 22 and 25 respectively R1 and R2 should be removed if pins 22 and 25 are required as GPIO When and Signals are not available 48 pin packages and below they are internally connected to and SSA 2 Must be within the allowed supply voltage range of the STM8A microcontroller 20 41 Doc ID 14217 Rev 3 ky AN2677 Reference design 7 3 4 Pinouts STMBA devices have several package types including the LQFP 80 pin pinout shown in Figure 11 Please refer to the STM8A d
23. ards buzzer etc are delivered in the STM8 firmware library Doc ID 14217 Rev 3 ky AN2677 Documentation and online support 11 Documentation and online support Documentation resources related to tool usage includes Application STMB8A datasheets e 5 8 Flash programming manual 0047 e STMB8A microcontroller family reference manual RM0009 e STM8 CPU programming manual 0044 Tools e STM8 firmware library and release note detailed descriptions of the library are included as help files STice advanced emulation system for ST microcontrollers data briefing STice user manual Cosmic C compiler user manual STM8 128 EVAL evaluation board user manual UM0482 ST visual develop tutorial included as help files in the ST toolchain ST visual develop STVD user manual STM8 SWIM communication protocol and debug module user manual UM0470 The microcontroller discussion forum on www st com can be used by developers to exchange ideas It is the best place to find different application ideas In addition the website has a knowledge base of FAQs for microcontrollers which provide answers to many queries and solutions to many problems Doc ID 14217 Rev 3 39 41 Revision history AN2677 12 40 41 Revision history Table 4 Document revision history Date Revision Changes 03 Mar 2008 1 Initial release 08 Aug 2008 Made small textual changes through the document to improve reada
24. atasheets for more details Figure 11 LQFP 80 pin pinout n a 685 8 6 lal eu oo 2 ol 045 980 E 20 52211 1 5996 ananaonannuan ununsan 5 8 682588665 NRSTUO 1 60 OSCIN PA1L 2 59 2 OSCOUT PA2L 3 58 10 4 57 5 5 56 4 6 55 Vppl 7 54 Vppio 10 8 53 11 PG1 CAN_RX 2 CC3 PA3LI 9 52 D PGO CAN TX USART 10 51 LIPC7 SPI MISO USART_TX PA5 11 50 1 PC6 SPI_MOSI USART_CK PA6L 12 49 2 HS 13 48 t Vssio 2 HS 14 47 L 1PC5 SPI SCK PH2L 15 46 I PC4 HS TIM1_CC4 16 45 LIPC3 HS TIM1_CC3 AIN15 PF7L 17 44 1 PC2 HS TIM1_CC2 AIN14 PF60 18 43 1 HS TIM1_CC1 AIN13 PF50 19 42 AIN12 PF4L 20 41 LIPES SPI NSS T LO KO O0 Q Q CO st 10
25. bility and clarity Section 2 1 Power supply overview on page 7 Added notes regarding Vppio1 Vpploe Vgssio1 Vesio2 the capacitors and the OSCIN OSCOUT crystal resonator Modified Figure 2 External capacitor on page 8 with regard to Vpp 1 Vopio2 Vssio1 Vssioe and analog functions Section 2 3 Power on power down reset POR PDR on page 8 Modified reset voltage and referred reader to the product datasheets for the reset release voltage Figure 5 System clock distribution internal clock on page 12 Replaced XTAL with crystal Section 4 2 Internal clock on page 12 Removed text regarding frequency of the clock output Section 4 3 External clock on page 12 Added a note about the use of OSCIN and OSCOUT as GPIOs added a reference to the crystal manufacturer s datasheet and removed a caution concerning the enabling of an external clock input Figure 6 Reset management on page 14 Removed connection between system reset and OR port Added external reset to OR port Input characteristics on page 15 Changed the valid pulse duration from 450 ns to 500 ns Section 5 2 Hardware reset implantation on page 15 Clarified text regarding the reset circuit Modified Figure 10 Reference design on page 20 by replacing 5 V with Vpp Modified footnote 1 regarding pins 22 and 25 Added footnote 2 concerning the supply voltage range of Vpp Section 8 2 3 In circuit programming and debugging on page 25 Added that
26. devices can connect to an external crystal or an external oscillator When no external clock is used OSCIN and OSCOUT can be used as general purpose Table 1 describes the external clock connections Doc ID 14217 Rev 3 ky AN2677 Clock management Table 1 Clock sources Hardware configuration STM8 OSCin OSCour x o 9 9 J I O available c o External source Frequency 32 kHz 24 MHz Comparator hysteresis 0 1 Vpp Caution Without prescaler a duty cycle of maximum 45 55 must be respected Frequency range 1 24 MHz Wake up time lt 2 ms 24 MHz Oscillation mode Preferred fundamental Output duty cycle max 55 45 Standard I O pins multiplexed with OSC and 5 Cload 10 20 pF Maximum crystal power 100 pW STM8 OSCin OSCour o 9 Q1 a LDL 2 L S O S o Load capacitors 9 5 gt O The values of the load capacitors C C 2 are heavily dependent on the crystal type and frequency The user can refer to the datasheet of the crystal manufacturer to select the capacitances For best oscillation stability Cj normally have the same value Typical values are in the range from below 20 pF up to 40 pF cload 10 20 pF The parasitic capacitance of the board layout also needs to be considered and typical
27. e connection 23 8 2 uus c 23 8 2 1 STice 1 23 8 2 2 STice in emulation configuration 24 8 2 3 In circuit programming and debugging 25 9 STM8 software toolchain 27 9 1 Integrated development environment 27 9 2 ej ee CC TM 28 9 3 iz 7 131007 ts26 0s 22s vase be oon aod obs eee Cate 29 10 Setting up the STM8 development environment 30 10 1 1 lt 1 30 10 2 Using the tools 31 10 2 1 Projectediting 32 10 2 2 1 32 10 3 Running the demonstration software 33 10 3 1 Compiling the 33 10 3 2 Selecting the correct debug instrument 34 10 3 8 Connecting the hardware 35 10 3 4 Starting the debug session 36 10 3 5 Running the software 37 10 36 Follow p ccce edad eee eee ies RR 38 11 Documentation and online support
28. en designing an application the following areas should be closely studied to improve EMC performances Noisy signals clock e Sensitive signals high impedance In addition to e Signals for which a temporary disturbance permanently affects operation of the application for example interrupts and handshaking strobe signals but not LED commands A surrounding trace for such signals increases EMC performances as does a shorter length or absence of noisy and sensitive traces crosstalk effect For digital signals the best possible electrical margin must be reached for the 2 logical states Slow Schmitt triggers are recommended for eliminating parasitic states Unused l Os and features Microcontrollers are designed for a variety of applications where often a particular application does not use 100 of the microcontroller resources To increase EMC performance unused clocks counters or I Os should not be left free for example I Os should be set to O or 1 pull up or pull down to the unused I O pins and unused functions should be frozen or disabled Alternatively unused I Os can be programmed as push pull low in order to keep them at a defined level but not to use external components User options STMBA devices have user option features that can be used for remapping or enabling disabling an automatic reset or low speed watchdog For more details please refer to the product datasheets
29. et Doc ID 14217 Rev 3 23 41 STM8 development tools AN2677 8 2 2 24 41 Emulation system STice Emulator box Cables for USB power supply trigger analyzer input Connection flex e 60 pin or 120 pin cable for connection to the application board Connection adapter e Links the connection flex to the footprint of the STM8A microcontroller Adapter socket e Package specific socket for connection adapter and STM8A microcontroller STice in emulation configuration In emulation configuration the STice is connected to the PC via a USB interface and to the application board in place of the target microcontroller being used e Connection flex Flexible cable 60 pin or 120 pin depending on the target microcontroller that relays signals from the STice to the application board e Connection adapter Links the connection flex to the footprint of the target microcontroller on the users application board e Adapter socket Socket that solders to the application board in place of the microcontroller and receives the connection adapter The above accessories are not included with the STice system To determine exactly what is required for any supported microcontroller refer to the online product selector on www st com Doc ID 14217 Rev 3 ky 2677 STM8 development tools Figure 15 STice in emulation configuration Free 5 5 8 toolset STVD and STVP running on your PCdrive STice
30. h B stm8 t h Private functio E modso h a Worksp SISTST Tools FindinFiesi FindinFles2 Debug Console For Help press F1 n amp Cal 18 MODIFIED READ NUM OVA 10 2 2 32 41 Online help An online help manual is available inside the firmware installation directory see Figure 21 to help the user understand the structure of the STM8 firmware library Figure 21 STM8 firmware library online help manual 6 HTML Help E e gt GU m Hide Locate ack Forward _ Stop Refresh Home Prnt Options Contents Ind h Favorit ides Search Favorites Main Page Modules Data Structures Files Directories a STM Firmware Library E Modules Data Structures STM8 Firmware Library and Examples Data Fields a File List e Eu On line Help Manual STMicroelectronics y Doc ID 14217 Rev 3 2677 Setting up the STM8 development environment 10 3 Running the demonstration software To run the demonstration software on the STM8 evaluation board the project has to be compiled and the correct HW tool must be selected before the debug session can be started 10 3 1 Compiling the project The project can be compiled using the Build function in the Build menu see Figure 22 Figure 22 STVD Building the project ST Visual Deve
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32. hen designing an analog input interface for the ADC Please refer to the STM8A datasheets and or the corresponding family reference manual 0009 for more details Doc ID 14217 Rev 3 11 41 Clock management AN2677 4 4 1 4 2 4 3 Note 12 41 Clock management Clock management overview STMBA devices offer a flexible way of selecting the core and peripheral clocks ADC memory digital peripherals The devices have internal and external clock source inputs and one output clock CCO Figure 5 System clock distribution internal clock 1 OSC up d ced 1 to 24 MHz CCO pin crystal and external Q lock uni clock 3 5 9 External clock OSCour 16 MHz 128 kHz WDG AWU p Prescaler internal RC Timer Clock distribution p Internal clock For more details please refer to the section on clock management the product datasheets Internal clock The RC oscillator has an internal capacitor C and an internal resistor ladder R STM8A devices have two kinds of internal clock A high speed internal clock HSI running at 16 MHz and a low speed internal clock LSI running at 128 kHz After reset the CPU starts with the internal RC HSI clock signal divided by 8 i e 2 MHz External clock STMBA
33. itive and digital with a single point for gathering all ground returns Loops must be avoided or have a minimum surface The power supply should be implemented close to the ground line to minimize the surface of the supply loop This is due to the fact that the supply loop acts as an antenna and is therefore the main emitter and receiver of EMI All component free surfaces of the PCB must be filled with additional grounding to create a kind of shield especially when using single layer PCBs Decoupling The standard decoupler for the external power is a 100 pool capacitor Supplementary 100 nF capacitors must be placed as close as possible to the Vss Vpp pins of the micro in order to reduce the area of the current loop As a general rule decoupling all sensitive or noisy signals improves electromagnetic com patibility EMC performances There are 2 types of decouplers e Capacitors close to components Inductive characteristics which apply to all capacitors beyond a certain frequency must be taken into account If possible parallel capacitors with decreasing values 0 1 0 01 should be used e Inductors Although often ignored ferrite beads for example are excellent inductors due to their good dissipation of EMI energy and there is no loss of DC voltage which is not the case when simple resistors are used Doc ID 14217 Rev 3 17 41 Recommendations AN2677 6 5 6 6 6 7 18 41 Other signals Wh
34. lop project stw main c File Edit View Project Build Debug Debug instrument Tools Window amp Compile main c Ctrl F7 45 ni aad haa OUI Workspace EJ ER Rebuild All project project Batch Build Source Files Clean 2 Include Files bri Haut External Depen i i dver Configurations r 8 9 1n THE Doc ID 14217 Rev 3 33 41 Setting up the STM8 development environment AN2677 10 3 2 34 41 Selecting the correct debug instrument In the example below the Rlink tool is used for communicating via the SWIM interface with the on board debug module of the STM8 The Rlink tool can be selected from the Debug Instrument Selection list in the Debug Instrument Settings dialog see Figure 23 Figure 23 STVD Selecting the debug instrument Debug Instrument Settings Target Debug Instrument Selection Select the Target you want to use for debug session Swim Alink Target Port Selection Select the connection port for usb usb the Target selected above Add Remove Show the selected target notification at start of debugging session Doc ID 14217 Rev 3 ky 2677 Setting up the STM8 development environment 10 3 3 Connecting the hardware The Rlink tool can be connected to the PC by a standard USB connection It is also powered by the USB interface On the cont
35. ly adds a few pF to the component values Recommendations In the PCB layout all connections should be as short as possible Any additional signals especially those that could interfere with the oscillator should be locally separated from the PCB area around the oscillation circuit using suitable shielding Ly Doc ID 14217 Rev 3 13 41 Reset control AN2677 5 5 1 14 41 Reset control Reset management overview The reset cell is a dedicated 5 V bidirectional Its output buffer driving capability is fixed to 2 mA 0 4 V in the 3 V to 5 5 V range which includes a 40 pull up Output buffer is reduced to the n channel MOSFET NMOS If a 40 k pull up is accepted this cell does not include an output buffer of 5 V capability The receiver includes a glitch filter whereas the output buffer includes a 20 us delay There are many reset sources including e External reset through the NRST pin e Power on reset POR and brown out reset BOR during power on the POR keeps the device under reset until the supply voltage Vpp and Vppjo reach the voltage level at which the BOR starts to function Independent watchdog reset IWDG Window watchdog reset WWDG Software reset the application software can trigger reset SWIM reset an external device connected to the SWIM interface can request the SWIM block to generate a microcontroller reset e llegal opcode reset if a code to be executed does not correspond
36. ne chemical 1 2 uF in parallel on the STM8A device The ceramic capacitors should be placed as close as possible to the appropriate pins or below the appropriate pins on the opposite side of the PCB Typical values are 10 nF to 100 nF but exact values depend on the application needs Figure 3 shows the typical layout of such a Vpp Vss pair Doc ID 14217 Rev 3 ky AN2677 Power supply Figure 3 Typical layout of Vpp Vss pair STM8 ky Doc ID 14217 Rev 3 9 41 Analog to digital converter ADC AN2677 3 3 1 3 2 10 41 Analog to digital converter ADC Analog power The ADC unit has an independent analog supply reference voltage isolated on input pin Which allows the ADC to accept a very clean voltage source This analog voltage supply range is the same as the digital voltage supply range on pin Vpp An isolated analog supply ground connection on pin VssA provides further ADC supply isolation Together the analog supply voltage and analog supply ground connection offer a separate external analog reference voltage input for the ADC unit on the pin This gives better accuracy on low voltage input as follows Vpgrr input analog reference positive The higher positive reference voltage for the ADC should be between 250 mV For more details about values please refer to the STM8A datasheets This input is bonded to in devices that have
37. nity by reducing the connection length between both supplies and also between Vpp Vpp o and the capacitor e One pair of pads VppA VssA 3 3 V 0 3 V to 5 V 0 5 V dedicated to analog functions Refer to Section 3 Analog to digital converter ADC on page 10 for more details Figure 1 Power supply Analog signal Analog functions V CAP 1 Main Low power s S Vss Vsbio1 regulator Logic 2 V lOs El 5102 Vopio Vssio 3 3V 5V OSCIN Vbpio Vssio XTAL 9 Star connected OSCOUT ai15330 7 The capacitors must be connected as close as possible to the device supplies especially Vpp in case of dedicated ground plane Placing a crystal resonator on OSCIN OSCOUT is optional The resonator must be connected as close as possible to the OSCIN and OSCOUT pins The loading capacitance ground must be connected as close as possible to Doc ID 14217 Rev 3 7 41 Power supply AN2677 2 2 2 3 8 41 Main operating voltages STMB8A devices are processed in 0 13 technology The STM8A core and I O peripherals need different power supplies In fact STM8A devices have an internal regulator with a nominal target output of 1 8 V Stabilization for the main regulator is achieved using an external capacitor via the pin The minimum value is 470 nF with low equivalent series resistance ESR Care should be taken to limit the series inductance
38. nnector linked to microcontroller 3 ST microcontroller on application board Doc ID 14217 Rev 3 3 AN2677 5 8 software toolchain 9 STM8 software toolchain To write compile and run the first software an 8 device the following components of the software toolchain are required see Figure 17 Integrated development environment e Compiler e Firmware library optional used to ease the start up Figure 17 STM8 software toolchain ST Visual Develop BEE File Edit View Project Build Debug Debug instrument Tools Window Help timer c mx 8 e ER E e m m E T E n Further interrupts are masked by Workspace 2 fes tutorial stw C Documents and Settings gussenho data temp stvd 2 3 cosmic m meeer eneee dd 1 E E Source Fies case RED 8 timer c nextState GREEN 8 interrupt vecto nterrupt v ni break IncudeFies case OFF 9 23 External Dependenci Binterrupt nostack void trapISR nextState OFF HEA 47 asm Bt break color nextState default nextState currentStateci break Determine next state Go to next state and update traced var if state nextState stateOccurence lt case RED nevrSraresGRFFM currentState nextState state currentState stateOccurence CADocume WATCHDOG S
39. r STMBA devices can be programmed by a free assembler toolchain which is included in the ST toolset As the core is designed for optimized high level language support use of a C compiler is recommended C compilers for STM8 are offered by the third party companies Cosmic and Raisonance A free version of the C compiler with up to 16 Kbytes of generated code is available at www cosmic software com and www raisonance com Doc ID 14217 Rev 3 ky AN2677 STM8 software toolchain 9 3 Firmware library The STM8 firmware library is a complete set of source code examples for each STM8 peripheral It is written in strict ANSI C and it is fully MISRA C 2004 compliant see Figure 18 All examples are delivered with workspace and project definition files for STVD and Cosmic C compiler which enables the user to load and compile them easily into the development environment The examples run on the STMicroelectronics STM8 evaluation board and can be tailored easily to other types of hardware For additional information on the STM8 firmware library please contact STMicroelectronics Figure 18 5 8 firmware library examples 5 8520 Firmware Library and Examples E Usage 8 Known Bugs and Limitations 9 Peripheral drivers footprint ADC Examples 2 AWU Examples 1 BEEP Examples 1 e CLK Examples 4 Examples 1 gt FLASH Examples 4 e GPIO Examples 2
40. roller side the connection to the STM8 evaluation board is made by the SWIM interface cable The STM8 evaluation board is powered by an external 5 V supply see Figure 24 Figure 24 Connecting the debug instrument to the 5 8 evaluation board Caution the ICC SWIM adapter board the SWIM jumper must be set If there is no pull up on the application SWIM line the ADAPT jumper is also set In any case PW 5V and 12 MHz jumpers must not be set ki Doc ID 14217 Rev 35 41 Setting up the STM8 development environment AN2677 10 3 4 Starting the debug session Debug mode can be entered by the command Debug Start Debugging see Figure 25 Figure 25 STVD Starting the debug session ST Visual Develop project stw main c File Edit View Project Build Debug Debug instrument Tools Window Help asc ae ORE 2 gt Workspace 0 project stw project 43 Source Files mono Icd c rg Library main c amp interrupt v Include Files Sq External Dependencie m st modsO h m main c This file contains the firn hor STMicroelectronics ion VO F PRESENT SOFTWARE WHICH 15 FOR CODING INFORMATION REGARDING RESULT STMICROELECTROK INDIRECT OR CONSEQUENTIAL THE CONTENT OF SUCH SOFTWARE NG INFORMATION CONTAINED HEREI
41. to any opcode or prebyte value a reset is generated e Electromagnetic susceptibility EMS reset generated if critical registers are corrupted or badly loaded Figure 6 Reset management STM8 Simplified functional I O reset schematic lt Filter s NRST System reset External reset Illegal op code reset m IWDG WWDG software reset SWIM reset EMS reset POR BOR reset External reset Pulse generator min 20 us Delay Doc ID 14217 Rev 3 ky AN2677 Reset control Output characteristics A valid pulse on the pin is guaranteed with a gt 20 ns pulse duration on the internal output buffer e After a valid pulse is recognized a pulse on the pin of at least 20 us is guaranteed starting from the falling edge of A Figure 7 Output characteristics gt 20 ns 20 us pulse stretch gt Pad Reset requested Input characteristics e All pulses with a duration less than 75 ns are filtered e Alltrain burst spikes with a ratio of 1 10 must be filtered This means that a negative spike of up to 75 ns is always filtered when a 7 5 ns interval between spikes occurs ratio 1 10 pulses with duration more than 500 ns are recognized as valid pulses e Aftera valid pulse is recognized an internal pulse of at least 30 ns is

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