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ST AN3094 handbook

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1. wa AN3094 Sf Application note EVAL2293Q demonstration board Introduction This application note describes the EVAL2293Q demonstration board for the L2293Q push pull four channel driver with integrated diodes The L2293Q is designed to drive inductive loads such as DC and stepping motors or relays and solenoids The board implements a typical application which can be used as a reference design to drive two phase bipolar stepper motors with currents up to 0 6 A DC multiple DC motors and a wide range of inductive loads Housed in a QFN 5 x 5 mm 32 lead package the small footprint of the L2293Q makes the PCB very compact 24 5 x 24 5 mm Figure 1 EVAL2293Q demonstration board AM05380v1 May 2010 Doc ID 16540 Rev 1 1 8 www st com Demonstration board description AN3094 1 Demonstration board description Figure 2 L2293Q block diagram Vs OUT1 OUT3 Vss IN1 IN3 ENABLE1 ENABLE2 IN2 IN4 OUT2 OUT4 AM05381v1 Table 1 EVAL2293Q pin description Name Type Function Power VS supply Supply voltage for the power output stages GND Ground Power ground terminal VSS ene Supply voltage for the logic blocks It is connected to VS through the closed jumper JP1 GNDS Ground Signal ground terminal IN1 Logic input Bridge 1 logic input 1 IN2 Logic input Bridge 1 logic input 2 EN1 Logic input Bridge 1 enable active high When LOW switches off the output 1 and 2 power tra
2. Hong Kong India Israel Italy Japan Malaysia Malta Morocco Philippines Singapore Spain Sweden Switzerland United Kingdom United States of America www st com 8 8 Doc ID 16540 Rev 1 ky
3. to 36 V RMS output current rating OUTXx Up to 0 6 A Switching frequency Up to 50 kHz Input and enable voltage range 0 to 5 V Operating temperature range 20 1 to 125 C L2293Q thermal resistance junction to ambient 42 C W 1 Please refer to the L2293Q datasheet for additional details Doc ID 16540 Rev 1 3 8 AN3094 Demonstration board description EVAL2293Q demonstration board electrical schematic Figure 4 AN E O A A e ONS Q Zino Lag Lt LINO OOL vx ba1avNa m pee SS SG 00 l SE Be s5 jor ou A ELNANI FUN Ke A aoe TINO g E LNd LNO tLNd LNO VINO 001 SH 001 eN OE6cc1 9NO9 001 ca in NN bo fo N sr ZNO u00 Ldr CH SA SSA SSA LNI LNA YNI AM05383v1 Doc ID 16540 Rev 1 4 8 AN3094 Demonstration board description Table 3 EVAL2293Q component list Reference Value Description C1 C3 100 nF 50 V Capacitor C2 100 UF 50 V Capacitor R1 R2 R3 R4 R5 R6 100 Q Resistor U1 L2293Q Dual full bridge in VFQFPN5x5 package Figure 5 EVAL2293Q component placement 24 5 mm AM05384v1 Figure 6 EVAL2293Q top layer layout AM05385v1 Doc ID 16540 Rev 1 5 8 Demonstration board description AN3094 6 8 Figure 7 EVAL2293Q bottom layer layout Doc ID 16540 Rev 1 AM05386v1 AN3094 Revision history 2 Revision history Table 4 Docum
4. LIMITATION IMPLIED WARRANTIES OF MERCHANTABILITY FITNESS FOR A PARTICULAR PURPOSE AND THEIR EQUIVALENTS UNDER THE LAWS OF ANY JURISDICTION OR INFRINGEMENT OF ANY PATENT COPYRIGHT OR OTHER INTELLECTUAL PROPERTY RIGHT UNLESS EXPRESSLY APPROVED IN WRITING BY AN AUTHORIZED ST REPRESENTATIVE ST PRODUCTS ARE NOT RECOMMENDED AUTHORIZED OR WARRANTED FOR USE IN MILITARY AIR CRAFT SPACE LIFE SAVING OR LIFE SUSTAINING APPLICATIONS NOR IN PRODUCTS OR SYSTEMS WHERE FAILURE OR MALFUNCTION MAY RESULT IN PERSONAL INJURY DEATH OR SEVERE PROPERTY OR ENVIRONMENTAL DAMAGE ST PRODUCTS WHICH ARE NOT SPECIFIED AS AUTOMOTIVE GRADE MAY ONLY BE USED IN AUTOMOTIVE APPLICATIONS AT USER S OWN RISK Resale of ST products with provisions different from the statements and or technical features set forth in this document shall immediately void any warranty granted by ST for the ST product or service described herein and shall not create or extend in any manner whatsoever any liability of ST ST and the ST logo are trademarks or registered trademarks of ST in various countries Information in this document supersedes and replaces all information previously supplied The ST logo is a registered trademark of STMicroelectronics All other names are the property of their respective owners 2010 STMicroelectronics All rights reserved STMicroelectronics group of companies Australia Belgium Brazil Canada China Czech Republic Finland France Germany
5. ent revision history Date Revision Changes 06 May 2010 1 Initial release Doc ID 16540 Rev 1 7 8 AN3094 Please Read Carefully Information in this document is provided solely in connection with ST products STMicroelectronics NV and its subsidiaries ST reserve the right to make changes corrections modifications or improvements to this document and the products and services described herein at any time without notice All ST products are sold pursuant to ST s terms and conditions of sale Purchasers are solely responsible for the choice selection and use of the ST products and services described herein and ST assumes no liability whatsoever relating to the choice selection or use of the ST products and services described herein No license express or implied by estoppel or otherwise to any intellectual property rights is granted under this document If any part of this document refers to any third party products or services it shall not be deemed a license grant by ST for the use of such third party products or services or any intellectual property contained therein or considered as a warranty covering the use in any manner whatsoever of such third party products or services or any intellectual property contained therein UNLESS OTHERWISE SET FORTH IN ST S TERMS AND CONDITIONS OF SALE ST DISCLAIMS ANY EXPRESS OR IMPLIED WARRANTY WITH RESPECT TO THE USE AND OR SALE OF ST PRODUCTS INCLUDING WITHOUT
6. nsistors IN3 Logic input Bridge 2 logic input 1 IN4 Logic input Bridge 2 logic input 2 EN2 Logic input Bridge 2 enable active high When LOW switches off the output 3 and 4 power transistors OUT1 Output Output 1 OUT2 Output Output 2 OUT3 Output Output 3 OUT4 Output Output 4 2 8 Doc ID 16540 Rev 1 ky AN3094 Demonstration board description Figure 3 EVAL2293Q demonstration board pin location EN1 IN4 VSS JP1 GNDS GND VS IN2 IN3 EN AM05382v1 The logic and power voltage supply pins are connected through jumper JP1 normally closed If VS and VSS need to be supplied with different voltage values JP1 should be opened and the supply to each should be provided separately through external terminals The INx input pins drive the corresponding half bridge When a low logic level is applied the low side power switch is turned on whereas a high logic level turns on the high side switch Pins EN1 and EN2 are used to disable the bridges and put the output pins in a high impedance status The output stages integrate freewheeling diodes Table 2 below summarizes the electrical specifications of the application Figure 3 shows the electrical schematic and Table 3 provides the component list Table 2 EVAL2293Q electrical specification recommended values Parameter Value Supply voltage range VS VSS to 36 V Logic supply voltage range VSS 2 8 1

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