ST AN2872 handbook
Contents
1. wy AN2872 YZ Application note Super wide range buck converter based on the VIPer16 1 Introduction This document describes the STEVAL ISA010V1 demonstration board which is designed as an example of a simple non isolated auxiliary power supply for a range of input voltages from 85 VAC to 500 VAC There is an ever increasing demand for small power supplies capable of working without voltage range limitations even at nominal levels of 400 VAC and 415 VAC respectively The real voltage levels can reach 500 VAC 415 V 20 The major markets for this type of SMPS are home appliances and metering The new STMicroelectronics family of monolithic converters is well suited for this range of input voltages thanks to the 800 V avalanche rugged MOSFET integrated within the same package with the control chip This application note describes a low power SMPS with a buck topology using STMicroelectronics VIPer16 fixed frequency off line converter as a main circuit The VIPer16 device includes an 800 V rugged power switch a PWM controller programmable overcurrent overvoltage overload a hysteretic thermal protection soft start and safe auto restart after any fault condition removal Burst mode operation at light load combined with the very low consumption of the device helps to meet standby energy saving regulations The significant benefit of this new chip derives from the jitter of the switching frequency and the possibility to suppl2. 18 4 6 1 Surge IEC 61000 4 5 1 2 ee 18 4 6 2 Burst IEC 61000 4 4 1 0 0 0 ee 19 4 6 3 EMI seg Pecccter eos pe Ste a ORe oe ees A Se Mae and GR N ee 19 4 7 Thermal behavior 0 0000 cee ee 20 5 Conclusion 25 i tn nnn a i se ye nm 0 i 21 6 References secede de de prine eeek i eee Sebo a eer ee ee 21 7 Revision history cece sass ckecie se nenbseseeeeehews week on 22 2 23 Doc ID 15305 Rev 1 ky AN2872 List of tables List of tables Table 1 LiSt Of COMPONENTS 5 2 2 krek oe data See a erig ge noel deg Bee eh Ged Sok eae p rye bees 12 Table 2 Temperature of the VIPer16 at full load 0200 c cee es 20 Table 3 Document revision history 0 0 teas 22 ky Doc ID 15305 Rev 1 3 23 List of figures AN2872 List of figures Figure 1 Figure 2 Figure 3 Figure 4 Figure 5 Figure 6 Figure 7 Figure 8 Figure 9 Figure 10 Figure 11 Figure 12 Figure 13 4 23 The STEVAL ISA010V1 demonstration board 0 2 eee eee 1 Buck converter schematic 0 0 0 teens 6 Standard implementation of a buck converter with a monolithic device 8 Schematic of the step down converter based on the VIPer16L 9 PCB layout of the buck converter top bottom bottom layout 0 11 12 V output load regulation for different output loads and input voltage levels linear regulator U2 not assembled 0 0 eee 13 Output
3. MHz dByV MHz i0 dBp 1 Limit C22_bav2 Detector Average Lisn L2 INT Line 1 PMM 8000 Conducted Emission Name pl1v1606 MHz Date 8 29 2008 Time 12 42 32 15 1 Limit C22_bav2 Detector Average Lisn L2 INT Line 1 PMM 8000 Conducted Emission Name pl2v1606 MHz Date 8 29 2008 10 Time 13 03 Limit C22_b_qp Detector Peak Lisn L2INT Line 1 Limit C22_b_qp Detector Peak Lisn L2INT Line 1 4 7 Thermal behavior The temperature of the VIPer16 was measured for different input voltages at full load 12 V 150 mA The board was located in open area at an ambient temperature of 25 C Table 2 Temperature of the VIPer16 at full load Tamb 25 C Vin VAC T C AT C 90 52 27 120 49 24 230 60 35 400 89 64 500 77 52 20 23 Doc ID 15305 Rev 1 ky AN2872 Conclusion 5 Conclusion This document shows that it is possible to implement a low power non isolated SMPS operating in a buck converter topology for super wide range 85 500 VAC thanks to the new advanced monolithic converter VIPer16 References 1 Application note AN1357 VIPower LOW COST POWER SUPPLIES USING VIPer12A IN NON ISOLATED APPLICATIONS see www st com 2 Application note AN2300 An alternative solution to Capacitive power supply using Buck converter based on VIPer12A see www
4. for this type of buck converter This effect is caused by the capacitor C8 discharging faster than C5 at light or no load and C5 moreover is charged at every ON time Consequently the voltage over C8 is constant while the voltage over C5 rises To protect the output capacitors and the load against overvoltage at light load Zener diode Dg is included limiting the output voltage to 15 V It is possible to use a simple resistive load instead of the Zener diode The value of the minimum load depends on the complete configuration of the components If linear regulator U is not used the value of the resistor is 12 KQ 1 mA load which could reduce the output voltage to a similar level as the Zener diode Regarding current limitation other features of VIPer16 can be activated by assembling resistor R7 but it is not originally assembled to allow the delivery of maximum power A simple linear regulator is also assembled generating 5 V on the output as an option to complete the basic idea of generating 12 V and 5 V outputs It should be highlighted that the VIPer16 can also directly generate a 5V output instead of 12 V The 5 V can be set by changing the value of resistor Rg to 4 7 KQ Doc ID 15305 Rev 1 ky AN2872 Description 3 3 PCB The converter is assembled on a single layer 65 x 33 mm 70 um FR4 PCB The PCB layout position of the components and silk screen are illustrated in Figure 5 The part of the PCB dedicated to t
5. st com 3 Datasheet of the VIPer16 Fixed frequency VIPer plus family see www st com 4 General technical information Epcos http www epcos com web generator Web Sections ProductCatalog Capacitors AluminumE lectrolytic Photoflash Page locale en html General technical information pdf 5 Series Connection Rubycon http Awww rubycon co jp en products alumi technote html SeriesConnection pdf 6 Engineering Notes Vishay BC comp http www vishay com capacitors aluminum radial related technt Engineering Notes pdf 7 Technical Notes on Aluminium Electrolytic Capacitors Nichicon http nichicon us com english products pdf aluminum pdf 8 IEC 61000 4 5 see www iec ch 9 IEC 61000 4 4 see www iec ch Doc ID 15305 Rev 1 21 23 Revision history AN2872 7 22 23 Revision history Table 3 Document revision history Date Revision Changes 23 Apr 2009 1 Initial release Doc ID 15305 Rev 1 AN2872 Please Read Carefully Information in this document is provided solely in connection with ST products STMicroelectronics NV and its subsidiaries ST reserve the right to make changes corrections modifications or improvements to this document and the products and services described herein at any time without notice All ST products are sold pursuant to ST s terms and conditions of sale Purchasers are solely responsible for the choice selection and use of
6. 0 Hz ripple at 90 VAC on the input This ripple can be avoided by increasing the capacitance of the input capacitors Doc ID 15305 Rev 1 13 23 Experimental results AN2872 Figure 7 Output voltage ripple for different input voltages Tek Run Sampie 688 Acgs 11 Sep 08 19 30 42 Tek Run Sample 5111 Acqs 11 Sep 08 19 36 22 Tek Run Sample 5267 Acqs 11 Sep 08 19 36 37 Vin 90VAC Vin 120VAC Vin 230VAC MAAMANAN gee M4 0msS00KS 2 Opsipt cha S0 0my Bw A Ch3 7 26 0mv Tek Run Sample 5450 Acqs 11 Sep 08 19 36 53 Tek Run Sample 5787 Acqs 11 Sep 08 19 37 19 fi 77 di T T Vin 400VAC Vin 500VAC M4 Oms 00KS 2 Opsipt M4 0me SO0KSs 2 Opsipt A cha n3 Wy Bw A Ch3 7 26 0m 4 2 Standby The VIPer16 is designed to operate without any external power source The device can be supplied thanks to its very low consumption directly from an internal high voltage circuit see Section 6 References 3 A major benefit of this feature is a reduction of the external component count as well as the possibility to generate output voltages that are below voltage lockout The buck converter based on the VIPer16 can directly generate with a simple inductor 5 V for example On the other hand as this method of self supply is based on the resistive principle this method of supply increases power losses which is mainly visible in standby power losses If low standby power losses is a priority it is suggested to
7. 4 MOSFET voltage stress A sufficient margin between the maximum drain voltage and the real maximum operating voltage level guarantees good reliability of the converter The drain voltage CH1 and inductor current CH2 is displayed in Figure 11 at full load 150 mA The maximum voltage drop between the drain and source is 700 V The margin is at worst conditions 100 V 16 23 Doc ID 15305 Rev 1 ky AN2872 Experimental results Figure 11 Drain voltage CH1 and inductor current CH4 at different input voltages Tek Stopped 182 Acqs 11 Sep 08 19 38 29 Tek Stopped 152 Acgs 11 Sep 08 19 39 01 Tek __ stopped 458 Acgs 11 Sep 08 19 39 28 lad ee r l r i r rr gt r Vin 90VAC Vin 120VAC Vin 230VAC Fl N j f f f l NI i i i E HHH e A t t a ii 1 O E E AES R pa epe n L 1 1 1 L 1 chi 7001 ew M 100s 250MS 4 0nsipt ch OY M 10 0ps 250NSiS 4 Onsipt ch 100mA Q BW A Chi AB OY Chh 100mA 2 ew A Chi 7 460V Tek _ Stopped aame 11 Sep 08 19 40 20 Tek Stopped 657 Acgs 11 Sep 08 19 40 50 K r r e 1 E E Ah E Vin 400VAC Eo Vin 500VAC j 4 a ee seins iULmennnaieinmnannmmmmemananmenatatanmmuaemal M 10 0ps250MS 40nspt chi y ew M 10 045 250M5 4 Onst A ChI 148V 4 100mA Q ew A Cht s 148V The waveforms in Figure 10 show als
8. 5305 Rev 1 ky AN2872 Description 3 1 2 The regulator of the circuit measures the output voltage compares it with the reference voltage and modifies the duration of the ON time to keep the output voltage constant In cases where the inductor current is operating in the continuous mode the current does not cross zero at full load the duty cycle can be obtained using Equation 2 This formula follows from Equation 1 Another method to obtain Equation 2 is to consider the buck converter as a low pass filter L4 C2 connected to a rectangular signal and that the low pass filter generates a mean value Equation 2 Practical aspects of a buck converter dedicated for mains and 3 phase input The application of a mains or 3 phase buck converter using a simple monolithic device results in several special conditions A few of the most important are described in the following paragraphs The operation of a buck converter such as that of the diagram in Figure 2 requires an active high side switch Therefore the monolithic device with integrated N channel MOSFET is also connected on the high side between of bulk capacitor and inductor The GND of the controller connected to the source of the MOSFET refers to the high side of the inductor see Figure 3 This wiring of circuit causes the feedback signal not to be directly sensed from the output due to the shift of the GND of output voltage and controller Basically there are two ways
9. D80 Do STTH108 Ultrafast diode SMA STMicroelectronics D3 1N4007 Silicon diode 1 A 1 kV MELF D4 1N4007 Silicon diode 1 A 1 kV MELF D5 STTH108 Ultrafast diode SMA STMicroelectronics De 15V Zener diode SOD80 U1 ViPer16L Converter DIP 7 STMicroelectronics Us L78L05 Regulator SOT89 STMicroelectronics 12 23 Doc ID 15305 Rev 1 ky AN2872 Experimental results 4 Experimental results 4 1 Load regulation and output voltage ripple The 12 V output is affected by the load due to the effects described in Chapter 3 1 2 and 3 2 The real load regulation of the 12 V output linear regulator U is not assembled for different input voltages is visible in Figure 6 Figure 6 12 V output load regulation for different output loads and input voltage levels linear regulator U not assembled AM00362 The flatness of the load characteristic can be influenced mainly at light load by setting a fixed load a resistor instead of Zener diode D3 or assembling a linear regulator to represent light load The behavior of the load characteristic can be influenced by the value of the auxiliary capacitor Cg and total value of resistance of Rg and R4 The output voltage ripple is very low and presents a good opportunity to use smaller capacitors with higher ESR and lower capacitance The data measured with the demonstration board are shown in Figure 7 It is possible to see the higher 10
10. TOMOTIVE GRADE MAY ONLY BE USED IN AUTOMOTIVE APPLICATIONS AT USER S OWN RISK Resale of ST products with provisions different from the statements and or technical features set forth in this document shall immediately void any warranty granted by ST for the ST product or service described herein and shall not create or extend in any manner whatsoever any liability of ST ST and the ST logo are trademarks or registered trademarks of ST in various countries Information in this document supersedes and replaces all information previously supplied The ST logo is a registered trademark of STMicroelectronics All other names are the property of their respective owners 2009 STMicroelectronics All rights reserved STMicroelectronics group of companies Australia Belgium Brazil Canada China Czech Republic Finland France Germany Hong Kong India Israel Italy Japan Malaysia Malta Morocco Philippines Singapore Spain Sweden Switzerland United Kingdom United States of America www st com ky Doc ID 15305 Rev 1 23 23
11. Zener diode is required on the output to protect the output capacitor and the load against overvoltage at light load Doc ID 15305 Rev 1 7 23 Description AN2872 8 23 Figure 3 Standard implementation of a buck converter with a monolithic device AMO00360 The second important behavior of a buck converter dedicated for mains applications follows from the ratio between the input and output voltage As derived from Equation 2 the duty cycle is very low when the ratio between the input and output is very high This also means the ON time must be very short It is possible for the ON time required for correct operation to be shorter than the minimum ON time of the controller defined in the datasheet the maximum duration of the minimum ON time of the VIPer16 is 450 ns see Section 6 3 In this case the SMPS delivers more energy than the controller which is compensated by the skipping of some pulses This leads to higher ripple of the output voltage This effect can be compensated by applying a higher inductance value and a lower switching frequency The last technical point discussed in this paragraph concerns the input bulk capacitor in applications dedicated to very high input AC voltage In this case the input voltage is up to 500 VAC The DC voltage can reach voltage levels of up to 707 VDC The input bulk capacitor must be able to sustain such voltage levels Unfortunately there are no standard alumi
12. apply an additional diode D4 in Figure 4 in cases where the output voltage is higher than 12 5 V Diode D4 allows the VIPer16 to be supplied from reflected voltage Cg used for feedback and consequently to reduce standby consumption Another aspect which significantly influences standby consumption are the balancing resistors The value of the balancing resistor was set to 1 5 MQ respecting the fact that there is no resolutely defined manufacturer of the capacitors and consequently the worse case is presented for calculation of the balancing resistors The effect of these resistors on standby consumption can be partly reduced mainly for voltages below 400 VAC using Zener diodes instead of resistors See Figure 8 14 23 Doc ID 15305 Rev 1 ky AN2872 Experimental results Figure 8 Alternative schematic of the input part using balancing Zener diodes instead of resistors O gt t PtH 4 rr t 1N4007 1N4007 924 200 V C3 10 uF 450 V Ea T F X2 O72 n 90 VAC 500 VAC 200 V Dz3 200 V 150 nF X2 10 uF 450V Dz4 200 V O gt gt AM00363 Figure 9 The standby consumption of the demonstration board is displayed in Figure 9 measured without linear regulator Us The highest line represents the consumption of the converter in cases where diode D was not assembled The middle line is the consumption of the converter itself with diode D and the lowest line represents th
13. e consumption of input part only without the VIPer16 assembled It is possible to observe that the contribution of the VIPer16 on standby consumption is low even at high input voltage and most of the consumption is caused by the input stage of passive components principally the balancing resistors leakage of aluminum capacitors and input foil capacitors Standby consumption for different input voltage levels PIN mW 400 300 200 800 700 600 500 Diode D4 not assembled Diode D4 assembled VIPer16 not assembled Contribution of balancing resistors 0 50 100 150 200 250 300 350 400 450 500 Vin AC V AM00364 Doc ID 15305 Rev 1 15 23 Experimental results AN2872 4 3 Efficiency The efficiency of the converter depends strictly on the input voltage The efficiency of the tested board is about 65 full load at nominal EU voltage Complete measurement of the efficiency is shown in Figure 10 Figure 10 Efficiency of the converter 90 0 80 0 70 0 60 0 Eff 50 0 90 VAC 40 0 120 VAC 230 VAC 30 0 400 VAC 500 VAC 20 0 10 0 0 04 i i 0 20 40 60 80 100 120 140 160 IOUT mA AM00365 The efficiency can be slightly improved using inductors with reduced resistance and low ESR input and output capacitors 4
14. efines the so called Burst immunity test see Section 6 References 9 as fast switching disturbance presented in the mains This test means the high frequency high voltage 8 kV very short pulses 50 ns are applied between the input lines and metal plate connected to PE at a defined distance from tested device 100 mm This test typically does not cause any damage to the components applied for the SMPS but it produces high current pulses flowing through the board and causes voltage spikes between different parts of PCB These spikes can render unstable the applied integrated circuits for the SMPS mainly the controller The possible impact typically seen in the SMPS is unstable operation restart of the SMPS could be allowed or latching of the SMPS not allowed The typical protection against the effects of the burst pulses is application of small filters capacitance in the range of 100 pF to several nF to the sensitive inputs The 8 kV burst test was performed on the board with no failures EMI The EMI was tested at an input voltage of 230 VAC for full output load Measurements are listed for the different input connections and average and peak detector in Figure 13 Doc ID 15305 Rev 1 19 23 Experimental results AN2872 Figure 13 EMI measurements of the demonstration board PMM 8000 Conducted Emission Name allv1606 Date 8 29 2008 Time 15 02 PMM 8000 Conducted Emission Name al2v1606 Date 8 29 2008 Time 14 08
15. he converter itself is 43 x 27 mm in size Figure 5 PCB layout of the buck converter top bottom bottom layout DEMO BOARD ONLY FOR EVALUATION PURPOSE STEVAL ISAOLOV1 L1 C3 ii RoHS bo 2002 ss EC mign voltage L2 c4 S3eAogoS Doc ID 15305 Rev 1 11 23 Description AN2872 3 4 Bill of material The components assembled on the board are listed in the Table 1 Table 1 List of components Ref Part type value Description Size Supplier R4 229 2 W Resistor Ro 750 kQ 5 0 25 W Chip resistor 1206 R3 24kQ 1 0 1W Chip resistor 0805 R4 9 1kQ 1 0 1 W Chip resistor 0805 Rs 750 kQ 5 0 25 W Chip resistor 1206 Re 750k 2 5 0 25 W Chip resistor 1206 R7 N A Chip resistor 0805 Rg 750 kQ 5 0 25 W Chip resistor 1206 Rg 1kQ 5 0 1 W Chip resistor 0805 Cz 150 nF 305 VAC X2 Foil capacitor 18x 6x RM15 Epcos B32922C3154M C gt 150 nF 305 VAC X2 Foil capacitor 18x6x RM15 Epcos B32922C3154M C3 10 pF 450 V Aluminium capacitor R12 5 RM 10 C4 10 uF 450 V Aluminium capacitor R12 5 RM 10 C5 220 uF 25 V Aluminium capacitor R8 RM 3 8 C6 10 F 35 V Aluminium capacitor R5 RM2 5 C7 1 8 nF 50 V Chip capacitor 0805 Cg 100 nF 50 V Chip capacitor 0805 Cg 10 uF 35 V Aluminium capacitor R5 RM2 5 Ly 1 mH 200 mA Inductor Lo 1 mH 300 mA Inductor D 1N4148 Silicon diode SO
16. nd References 2 The basic ideas and most important behaviors of the buck converter for mains applications is described in the chapters that follow The basic principle of the buck converter The schematic of the buck converter is shown in Figure 2 During the ON time the control circuit makes the high side switch T4 conduct The input DC voltage is connected to L4 and output capacitor Co during the ON time Assuming the voltage across Cz is constant and the input voltage is constant the voltage drop over L4 is constant V1 V2 The constant voltage over the inductor causes a linear increase in the current through inductor L4 The slope of the inductor current is proportional to the inductance of the inductor and the level of voltage drop over the inductor Figure 2 Buck converter schematic L Ly l T4 NVA e R i res sot SL te o T1 Fon V1 T D4 4 0 OFF time j p AMO00359 After T4 is switched OFF the low side switch diode D conducts If we assume for simplification purposes the voltage drop over the diode is zero then the voltage drop over inductor L4 is equal to the output voltage voltage drop over C2 Because the voltage across the inductor is different compare ON time the slope of inductor current is also different The behavior of a buck converter can be expressed by Equation 1 Equation 1 _ Vi Voa ton _ Vatore Al L L Doc ID 1
17. num capacitors on the market suitable for this voltage so two capacitors connected in series have been applied The series connection of two capacitors has two effects on the voltage drop over each capacitor The first is an influence over the tolerance of the capacitance and the second is an influence over the leakage current Regarding the tolerance the worst case is that one capacitors capacitance is at the maximum upper limit and the second at the lower limit Equation 3 defines the voltage distribution on each capacitor for this configuration Equation 3 where Vga is the voltage across the capacitor with higher capacitance the sign in the brackets Vco is the voltage drop on the capacitor with lower capacitance the sign in the brackets Vmax is the DC voltage bus dis the tolerance of the capacitors expressed as a percentage If the voltage bus is 707 V and the tolerance is 20 the highest possible voltage across the capacitor is 424 VDC Therefore for this voltage range the use of 450 V capacitors is recommended The leakage current can cause additional unbalancing of the voltages and an increase in the voltage drop of one capacitor over the allowed limit If the leakage currents of both Doc ID 15305 Rev 1 ky AN2872 Description 3 2 Figure 4 capacitors are the same no problem is presented But in cases where there is a difference in leakage currents which is the case in practical applications
18. o the change of duty cycle ON time with input voltage The converter finally operates in burst mode for highest input voltage 4 5 Short circuit behavior The short circuit protection is integrated in the VIPer16 If the peak current is limited by the internal threshold at maximum level for a duration of 50 ms internally set the Viper16 interprets this state as overload short circuit and switches off the converter for 1 s The typical waveforms for different input voltages are displayed in Figure 12 ky Doc ID 15305 Rev 1 17 23 Experimental results AN2872 Figure 12 Indication of current CH4 and drain voltage CH1 during short circuit Tek Stopped 5 Acs 11 Sep 08 19 43 18 Tek Preview Riad 7 j Vin 90VAC i Vin 120VAC 1 Aas 11 Sep 08 19 44 11 Tek Stopped 2 hogs Vin 230VAC 11 Sep 08 19 46 13 Wi S00 Bw M 200s 12 5kS s 80 0ps pt Che 100mA Q Bw A ChI 7148Y Tek Stopped 5 Acs Vin 400VAC 11 Sep 08 19 46 66 Tek Stopped 12 Acqs Vin 500VAC 11 Sep 08 19 47 37 4 80 0psipt M 200ms 12 5kS s A Ch4 7 iOm 4 6 4 6 1 18 23 EMC The following EMC tests of the board were performed EMI conducting disturbances test for 150 kHZ 30 MHz according to EN55022 Surge immunity test IEC 61000 4 5 e Burst immunity test IEC 61000 4 4 Surge IEC 61000 4 5 Regulation IEC 61000 4 5 defines the so called Surge immunity te
19. schematic The schematic of the converter is shown in Figure 4 It consists of three sections an input a high voltage DC DC converter and a linear regulator The input sections integrates a rectifier D3 D4 of the input RMS voltage an EMI filter C4 Co Ly C3 C4 protection R4 and bulk capacitors C3 C4 which store energy for the DC DC converter when the input voltage is low Because there is 500 VAC applied which means a DC level over 700 V the foil and electrolytic capacitors are connected in series This is due to the fact that the standard foil safety capacitors are produced for 440 VAC and the maximum DC voltage for standard electrolytic capacitors is 450 V As the electrolytic capacitors have different leakage current the balancing resistors Ro Rs Rg Rg must be applied to guarantee that the voltage of each capacitor does not exceed the maximum rating even at maximum input voltage Schematic of the step down converter based on the VIPer16L D 1N4148 K R Dy STTH108 U ViPert6 Dz D4 R 22Q Ly 2 2mH 85 500 VACI ay DAS 750 kof 14007 1N4007 Cy 1 J T0 pF 450 V 100 nF oc R5 750kQ Uy L78L05 r 150 nF X2 Lanm 3 L 1mH Rg 750 kQ 2 gt 2 Ct C Ds 4 6 150 nF x2 Rg 750ko A AD 15V c Sulput STTH108 220 UF C1 yoBV gt AM00361 lt The high voltage DC DC section is a buck converter ba
20. sed on the VIPer16 It converts the input high DC voltage stored in capacitors C3 and C to output The high side switch is Doc ID 15305 Rev 1 9 23 Description AN2872 10 23 a MOSFET integrated in the VIPer16 The low side switch of the buck converter is freewheeling diode Dz 800 V 1 A The energy is saved in inductor Ly and output capacitor Cz during the ON time when the MOSFET is conducting The ON time and consequently also the duty cycle is very short in the range several due to the high ratio between the input and the output voltage During the OFF time the MOSFET is switched OFF and diode Ds conducts Inductor Lo is discharged to the output and to capacitors C5 and Cg through diodes D and Ds As the inductor L gt is during OFF time connected to Cg and Cs the voltage drop over Cg used for feedback regulation is similar to the output voltage level Diode D is also applied though not mandatory for correct operation to reduce the power consumption of the VIPer16 and consequently the standby power The VIPer16 operates in current mode The FB pin is connected to the input of the error amplifier the output of the error amplifier is visible on the COMP pin and is connected to the input of the built in comparator for comparing the value from the output of the error amplifier to the drain current The voltage level expected on the FB pin is 3 3 V It is possible to see a rise in the output voltage at low or almost no load
21. st see Section 6 References 8 as high power spikes caused by large inductive devices in mains The input of the SMPS is charged by a short 20 50 us but high voltage 0 5 4 kV pulse The pulse is applied between L N and between L N PE The surge pulse typically causes high inrush current quickly charging the bulk capacitor in a standard SMPS The major risk is overvoltage for input components capacitors diodes and the main switch in the application The inrush current can damage the components in series in the input section of the SMPS rectifier fuse inrush current limiter The effect of the surge pulse can be reduced in two ways The first is to increase the resistance of the input part typically possible for low power applications to reduce inrush current Higher input resistance reduces inrush current and consequently the amount of energy charging the bulk capacitor therefore the voltage rise over the bulk capacitor is reduced The second way is to apply components that reduce the voltage level Typically it is possible to use varistors or Transil connected to the input to absorb part of the energy of ky Doc ID 15305 Rev 1 AN2872 Experimental results 4 6 2 4 6 3 pulse or a bulk capacitor capable of storing enough energy from the surge pulse to reduce the voltage peak level The 2 kV surge test was performed on the board with no failures Burst IEC 61000 4 4 Regulation IEC 61000 4 4 d
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23. this difference will cause the capacitor with lower leakage to be charged by this difference and the voltage over this capacitor will rise risking exceeding the voltage defined in the datasheet To avoid this effect so called balancing resistors are applied parallel to the electrolytic capacitors The correct value of the balancing resistors can be calculated from the difference in the leakage currents and applied voltage Unfortunately the maximum difference in leakage currents is not defined It is possible however that the calculations for the balancing resistors are available the technical documentation of some aluminum capacitor manufactures An examination of these documents reveals that there is not a single method and each manufacturer uses different calculation methods each of which unfortunately can give very different values Technical notes describing the calculations of balancing resistors can be found in Section 6 References 4 5 6 7 Typically the value of balancing resistors is in the range of hundreds of kQ to several MQ The drawback of using balancing resistors is the constant input load The additional constant load caused by balancing resistors is mainly visible in the standby consumption and reduction of efficiency at low power SMPS It is recommended to set the value of the balancing resistors to the maximum level respecting the technical recommendations of the manufacturer of the aluminum capacitors selected Converter
24. to move the information regarding the output voltage from the output to the controller The first way is to apply an optocoupler between the output and the converter The additional error amplifier and reference typically TL431 or a simple Zener diode must be assembled to drive the LED of the optocoupler This method gives high precision of the output voltage level and low load regulation However it also increases the cost and space requirements The second principle is to use a replica of the output voltage stored in the auxiliary capacitor during OFF time The schematic in Figure 3 shows the principle connection of the components The auxiliary capacitor C is charged during the OFF time from inductor L4 to the same voltage level as capacitor Cy It can be expected that the voltage drop over both capacitors C gt and C3 must be equal However in real applications the voltages are not exactly the same This difference is caused by the difference in the discharge current of capacitors different capacitance and different voltage drop on diodes D and Ds An important effect of the variance of the voltage drop of Cy and C is the fact that only C is charged during ON time Due to this behavior it is possible to see a theoretically unlimited increase in the output voltage at light or no load because the energy delivered during the ON time is higher than the total energy required by the load Therefore an additional load resistor or voltage limiter
25. voltage ripple for different input voltages 0 eee eee 14 Alternative schematic of the input part using balancing Zener diodes instead of FOSISIOIS safc ker cn ae Ma Re GEE ke eR ee eee E woe es ek 15 Standby consumption for different input voltage levels 2 2 0 02 eee ee eee 15 Efficiency of the converter 0 0 eect ett 16 Drain voltage CH1 and inductor current CH4 at different input voltages 17 Indication of current CH4 and drain voltage CH1 during short circuit 18 EMI measurements of the demonstration board 00 0c eee eee eee 20 Doc ID 15305 Rev 1 ky AN2872 Main characteristics 2 Main characteristics The main characteristics of the SMPS are listed below Input Vin 85 500 VAC 45 66 Hz Output 12V 10 5V 4 150 mA total 5 V and 12 V output output current for full input voltage range Standby 96 mW at 230 VAC Short circuit protected PCB type and size FR4 Single side 70 um 27x45mm Isolation non isolated N connected to output GND EMI In accordance with EN55022 class B EMC Surge IEC 61000 4 5 2 kV EMC Burst IEC 61000 4 4 8 kV Doc ID 15305 Rev 1 5 23 Description AN2872 3 3 1 6 23 Description Theory of operation The detailed calculation and principles of the buck converter for mains voltage operating range is described in Section 6 References 1 a
26. y the chip directly from the DC HV bus so auxiliary supply is not mandatory The VIPer16 is suitable for flyback or buck topologies and thanks to an internal self supply circuit it does not require an auxiliary supply Figure 1 The STEVAL ISA010V1 demonstration board April 2009 Doc ID 15305 Rev 1 1 23 www st com Contents AN2872 Contents 1 Introduction 6 05 2e cetwe E oes Re Ra eee de wae ae 1 2 Main characteristics 22 s sscctecindevre evs cece wee eeeead ewes 5 3 DESCHDUON i ccnce dred credo cee kipina kenna Daa coves aa a se ede 6 3 1 Theory of operation icdan2dcn sc eden tbban seeded hes oeeieaeee 6 3 1 1 The basic principle of the buck converter 00 02200005 6 3 1 2 Practical aspects of a buck converter dedicated for mains and 3 phase input 0 2 nirt ranr eee 7 3 2 Converter schematic 00 0c eee eee 9 3 3 POB Nice a pansaga thetis Geto EEE ROEE E Kin bara AEN Seater a derae bi 11 3 4 Bill of material anaua aaan 12 4 Experimental results 0 2200s 13 4 1 Load regulation and output voltage ripple 2 005 13 4 2 PIANO 42244 Sete ete pete heai sete ete a Seas oe Meee ea es 14 4 3 PUICIGNOY 2290802 henGs5esGseadvetdaloa ib a a 16 4 4 MOSFET voltage stress 2 5 schcecse des sudan esse bases sakes ae 16 4 5 Short circuit behavior 0 0 0060 eee 17 4 6 EMG sy ss oes te zrstion nakee Seed Sam te ocr 4 eet AR sde Ae cars arch hen lege i Aga E NR
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