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ST AN2791 Application Note

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1. AN2791 Sf Application note L9352B coil driver for ABS ESP applications current regulated channel analysis Introduction This document describes a detailed analysis on the current regulated channels of the ST coil driver L9352B This intelligent quad low side switch is typically used to drive inductive loads such as on off valves of the hydraulic modulator of ABS 9 ESP P control unit a Antilock Brake System ABS b Electronic Stability Program ESP June 2008 Rev 1 1 18 www st com Contents AN2791 Contents 1 L9352B overview im Sain a a oe 5 2 Test bench layout iius sure aec RACK o cae ae eee 7 3 Linearity relationship 8 4 Opening closing time of the INLET valves versus duty cycle of the 2 18 liold DhasSe 11 Virtual current control loop on the Q1 Q2 channels of L9352B 13 Revision history eO RCRUM a 17 x AN2791 List of tables List of tables Table 1 Table 2 Table 3 Table 4 Table 5 Table 6 INLET valve opening closing time versus duty cycle strategy 12 Results of the first operative condition under test 14 Results of the second operative condition under test 14 Comparison between the current on loadsdrien by reg channels and unreg channels be
2. ST s terms and conditions of sale Purchasers are solely responsible for the choice selection and use of the ST products and services described herein and ST assumes no liability whatsoever relating to the choice selection or use of the ST products and services described herein No license express or implied by estoppel or otherwise to any intellectual property rights is granted under this document If any part of this document refers to any third party products or services it shall not be deemed a license grant by ST for the use of such third party products or services or any intellectual property contained therein or considered as a warranty covering the use in any manner whatsoever of such third party products or services or any intellectual property contained therein UNLESS OTHERWISE SET FORTH IN ST S TERMS AND CONDITIONS OF SALE ST DISCLAIMS ANY EXPRESS OR IMPLIED WARRANTY WITH RESPECT TO THE USE AND OR SALE OF ST PRODUCTS INCLUDING WITHOUT LIMITATION IMPLIED WARRANTIES OF MERCHANTABILITY FITNESS FOR A PARTICULAR PURPOSE AND THEIR EQUIVALENTS UNDER THE LAWS OF ANY JURISDICTION OR INFRINGEMENT OF ANY PATENT COPYRIGHT OR OTHER INTELLECTUAL PROPERTY RIGHT UNLESS EXPRESSLY APPROVED IN WRITING BY AN AUTHORIZED ST REPRESENTATIVE ST PRODUCTS ARE NOT RECOMMENDED AUTHORIZED OR WARRANTED FOR USE IN MILITARY AIR CRAFT SPACE LIFE SAVING OR LIFE SUSTAINING APPLICATIONS NOR IN PRODUCTS OR SYSTEMS WHERE FAILURE OR MALFUNCTION MAY RESULT IN PER
3. inductive loads e g relays electromagnetic valves etc in low side configuration Integrated active Zener clamp for channels 1 and 2 or free wheeling diodes for channels 3 and 4 allow the recirculation of the current of the inductive loads during the off state of the DMOS All four channels are monitored with a status output All wiring to the loads and supply pins of the device are controlled The device is self protected against short circuit at the outputs and over temperature Channels 3 and 4 work as current regulator A PWM signal with a 2 kHz frequency on the input defines the target for the output current in particular there is a linear relationship between the duty cycle of the PWM input signal and the target value of the current see Figure 2 The current is measured during recirculation phase of the load that is during the off state of the DMOS A sensing resistor integrated in the IC and placed on the drain of the DMOS and of the free wheeling diode is devoted to measure the current The benefit of the current regulation is an optimization of the PWM duty cycle strategy against changes in the load conditions e g temperature gradient and as a consequence coil resistor increases Moreover a test mode compares the differences between the two regulators This drift test compares the output PWM of the regulators Using this feature a drift of the load during lifetime can be detected Figure 1 L9352B application di
4. the Figure 2 i e red point are related to the following test layout see Figure 3 dSPACE Microautobox LEM Sensor LAH 25 NP INLET valves of the 8 0 ABS ESP Bosch control unit coils with a resistor of 4 6 Ohm coil energizing frequency i e valve opening closing frequency of 5 Hz coil energizing strategy forthe first 20 ms duty cycle 0 1 96 forthe next 30 ms duty cycle 90 forthe last 150 ms duty cycle 5 5 90 The current waveform produced by this coil energizing strategy is shown in the Figure 4 Figure 3 Test bench layout used to characterize current control channels of L9352B 5V Logic Supply 7 18 Linearity relationship test AN2791 3 8 18 Linearity relationship test The measurements of the values of the mean current to compare with the ideal linear relationship of the L9352B current control channels have been carried out on the hold phase of the current waveform The Figure 5 describes a comparison between the results obtained on two different loads e stand alone coils i e blue stars crosses and balls coils on the valves i e red stars crosses and balls The main difference between the two considered different load conditions is that for the coils stand alone you have an equivalent R L circuit with a fixed inductance On the other hand when as load you consider a coil on a valve from the point of view of the equivalent R L circuit there is a
5. 4 Opening closing time of the INLET valves versus duty cycle of the hold phase The conventional strategy adopted to drive on off valves used in the hydraulic modulator of ABS ESP control unit is described in the Figure 8 The pull in phase corresponds to the maximum values of duty cycle applied for the first part of the valve opening closing time This phase guarantees the opening closing of the valve against stiction phenomena due for example to the aging of the valve to the dirt into the brake fluid to the stiffness change of the valve spring and so on The hold phase corresponds to the duty cycle value that is necessary to maintain the valve opened closed Clearly this value is less than that used for the pull in phase because the force required to overcome the static friction is greater than the force required to overcome the dynamic one Obviously this kind of duty cycle strategy is power saving too Figure8 A Pull in hold phase duty cycle strategy traditionally adopted to drive on off valves Gate Voltage V Vete Several tests have been carried out fixing the coil energizing frequency at 5 Hz and the time strategy at forthe first 20 ms duty cycle 0 1 96 forthe next 30 ms duty cycle 90 forthe last 150 ms duty cycle 5 5 90 The different duty cycle configurations considered are summarized on the first column of the Table 1 In these tests we measur
6. E 1450 Fu 4 I aK E E ad 3 1300 B QT dU F 1150 4 FI a A a 100 6 ES aF Fo E AU qF 850 4 2 a qF 5 3e Eus 5 700r S 4 s 9 NET e 550r a AT 400 e uta 4 eet FEF 250r f et 4 100 E B B Sr be T p 1 1 0 0 1 0 16 0 2 0 32 0 4 0 5 0 6 0 7 0 8 0 9 duty cycle Blue stars crosses and balls indicate minimum maximum and mean value of the target current for stand alone coils Red stars crosses and balls indicate minimum maximum and mean value of the target current for coils on valves Figure 6 L9352B regulated channel ABS current profile with valve vs time regulated channel current wih valve A 0 3 0 1 Coil current driven by means of L9352B in a typical ABS mission profile coils on valves T T T T T T T T T T 9 18 Linearity relationship test AN2791 Figure 7 Coil current driven by means of L9352B in a typical ABS mission profile stand alone coils L9352B regulated channel ABS current profile without valve vs time 25 T T T T T T T T T regulated channel current without valve A 0 5 time s x 10 18 AN2791 Opening closing time of the INLET valves versus duty cycle of the hold phase
7. SONAL INJURY DEATH OR SEVERE PROPERTY OR ENVIRONMENTAL DAMAGE ST PRODUCTS WHICH ARE NOT SPECIFIED AS AUTOMOTIVE GRADE MAY ONLY BE USED IN AUTOMOTIVE APPLICATIONS AT USER S OWN RISK Resale of ST products with provisions different from the statements and or technical features set forth in this document shall immediately void any warranty granted by ST for the ST product or service described herein and shall not create or extend in any manner whatsoever any liability of ST ST and the ST logo are trademarks or registered trademarks of ST in various countries Information in this document supersedes and replaces all information previously supplied The ST logo is a registered trademark of STMicroelectronics All other names are the property of their respective owners 2008 STMicroelectronics All rights reserved STMicroelectronics group of companies Australia Belgium Brazil Canada China Czech Republic Finland France Germany Hong Kong India Israel Italy Japan Malaysia Malta Morocco Singapore Spain Sweden Switzerland United Kingdom United States of America www st com q 18 18
8. agram 5 V logic supply Vbatt vs vec VDD Supply Overtemperature Overtemperature Channel 4 Channel e Open Load v KOKOH KD I3 Te Microcontroller 3 2 2 i f 5 amp amp 5 18 L9352B overview AN2791 6 18 Figure 2 Comparison between the ideal linear relationship and the experimental data 2300 T T T T T T T 220r O expected mean current 2050 L 3k expected upper deviation from mean current expected lower deviation from mean current 1900 L experimental mean current 1750 regulated channel current mA w a Q m mg o o o 5 6o 6 T 850 dev 25 mA T 3 dev 6 7 dev 10 1 1 0 1 0 16 0 2 0 32 0 4 0 5 duty cycle 0 6 0 9 AN2791 Test bench layout 2 Test bench layout As shown in the Figure 2 the accuracy in the current control of the L9352B depends on the range of values of the PWM input signal duty cycle Basically for duty cycle greater than 16 it is possible to consider a current control accuracy of 6 The experimental data shown in
9. ation of the VCCL on the L9352B unregulated channels last test condition block scheme 15 18 Virtual current control loop on the Q1 Q2 channels of L9352B AN2791 In Table 5 comparison between the mean current on the loads driven by the regulated channels of L9352B and the unregulated ones These last have been trained on the output duty cycle of the regulated channels Table 5 Results of the last operative condition under test Unreg ch cinputauty pitepk meancurrent piciopk mA current mA mA current mA regulation 0 15 0 83 0 73 500 220 400 260 0 25 0 73 0 6 730 280 670 300 0 35 0 64 0 46 1000 380 945 360 0 45 0 54 0 32 1180 440 1220 400 0 55 0 44 0 09 1400 480 1480 400 0 65 0 35 0 09 1400 480 1620 440 0 75 0 23 0 09 1400 480 1600 400 16 18 AN2791 Revision history 6 Revision history Table 6 Document revision history Date Revision Changes 25 Jun 2008 1 Initial release 17 18 AN2791 Please Read Carefully Information in this document is provided solely in connection with ST products STMicroelectronics NV and its subsidiaries ST reserve the right to make changes corrections modifications or improvements to this document and the products and services described herein at any time without notice All ST products are sold pursuant to
10. can see in the last four columns the difference between the mean current on the load driven by the unregulated channel and the mean current on the load driven by the regulated channel reduces as the set point that is the duty of the hold phase increases b Take into account that the ideal frequency of the output PWM signal of the current regulated channels i e Q3 Q4 is the clock frequency 64 that is 3 9 kHz for a clock frequency of 250 kHz 13 18 Virtual current control loop on the Q1 Q2 channels of L9352B AN2791 Similar results have been observed considering another operative condition characterized by a different duty cycle strategy see Table 3 Clearly the duty cycle applied on the unregulated channels in both the operative conditions under test is the same measured on the regulated channel See columns 2 3 of the following tables to understand the difference between the two duty cycles applied on the unregulated and regulated channels of the L9352B on the same load conditions As second operative condition for our tests see Figure 9 we can refer to the following data e INLET valve opening closing frequency of 1 Hz e forthe first 500 ms duty cycle 0 1 96 e forthe last 500 ms duty cycle 15 10 75 The Table 2 and 3 show the results of a comparison between the mean current on the loads driven by the regulated channels of L9352B and the unregulated ones These last have been trained on the output du
11. control loop on the Q1 Q2 channels of L9352B In this section we describe an analysis done on the unregulated channels Q4 Qs of the L9352B aimed to understand the limits of a virtual current control loop on the same channels The idea is to tune the duty cycle of the Q4 Qo channels on a measurement of the duty cycle observed on the regulated channels Qs Q4 Clearly we considered same load conditions that is for both the regulated and unregulated channels of the L9352B we considered same coils same INLET valves Furthermore to balance the difference of PWM signal frequency on the L9352B channels the unregulated ones i e Q4 Q2 have been driven with a frequency of 3 9 kHz In order to allow the current recirculation during the off state of the Q4 Qo channels external free wheeling diodes have been used to link the channel output and Vbat As free wheeling diode we have considered the ST power Shottky diodes 1N5817 Figure 9 Evaluation of the VCCL on the L9352B unregulated channels first test condition block scheme ww As first operative condition for our tests see Figure 9 we can refer to the following data INLET valve opening closing frequency of 1Hz e forthe first 450 ms duty cycle 0 1 forthe next 50 ms duty cycle 90 96 e forthe last 500 ms duty cycle 15 10 75 The Table 2 shows the results related to this first operative condition that we considered for our tests As we
12. ed the opening and closing time of the INLET valve and in addition the time in which armature piston of the valve starts its motion An interesting result comes out While the armature piston motion and the closing time of the INLET valve are not affected by the duty cycle configurations the opening time is affected In particular this increases of 0 5 ms for each 5 of duty cycle increase of the hold phase a Take into account that the INLET valves of an ABS ESP hydraulic modulator are on off valves normally opened and normally controlled by a current control loop On the hydraulic modulator there are also OUTLET valves These valves normally closed do not require a current control loop but conventional low side switch ky 11 18 Opening closing time of the INLET valves versus duty cycle of the hold phase AN2791 12 18 Table 1 INLET valve opening closing time versus duty cycle strategy Duty cycle strategy pull in hold Armature piston motion ms Closing time ms Opening time ms 20 75 1 5 7 5 20 80 1 5 6 5 5 20 85 1 5 6 5 20 90 1 5 6 5 25 75 1 5 7 5 5 25 80 1 5 6 5 5 5 25 85 1 5 6 5 5 25 90 1 5 6 5 5 30 75 1 5 7 6 30 80 1 5 6 5 6 30 85 1 5 6 6 30 90 1 5 6 6 35 75 1 5 7 6 5 35 80 1 5 6 5 6 5 35 85 1 5 6 6 5 35 90 1 5 6 6 5 x AN2791 Virtual current control loop on the Q1 Q2 channels of L9352B 5 Virtual current
13. fore and after the VCCL 0 15 Results of the last operative condition under test 16 Document revision history 0 0 00 rn 17 3 18 List of figures AN2791 List of figures Figure 1 Figure 2 Figure 3 Figure 4 Figure 5 Figure 6 Figure 7 Figure 8 Figure 9 Figure 10 4 18 L9352B application diagram islseeeesee a a 5 Comparison between the ideal linear relationship and the experimental data 6 Test bench layout used to characterize current control channels of L9352B 7 Current waveform produced on the load by the test coil energizing strategy 8 Comparison between the ideal linear relationship and the experimental data for two different load conditions 0 00 ee 9 Coil current driven by means of L9352B in a typical ABS mission profile coils on valves 9 Coil current driven by means of L9352B in a typical ABS mission profile stand alone coils 10 Pull in hold phase duty cycle strategy traditionally adopted to drive on off valves 11 Evaluation of the VCCL on the L9352B unregulated channels first test condition block scheme 000 eee 13 Evaluation of the VCCL on the L9352B unregulated channels last test condition block scheme 0000 cece ee 15 AN2791 L9352B overview L9352B overview The L9352B see Figure 1 is designed to drive
14. n inductance changing with the opening closing dynamics of the valve As the results of our analysis show in the Figure 5 6 and 7the current control loop of the Q3 and Q4 channels has been conceived in order to drive variable inductance loads in fact the spread between maximum and minimum values of the current for a fixed duty cycle value of the PWM input signal is minimum in the case of a variable inductance load Figure 4 Current waveform produced on the load the test coil energizing strategy current A 0 5 Pull in phase Hold phase 0 78 0 78 08 081 0 82 0 83 time s AN2791 Linearity relationship test Figure 5 Comparison between the ideal linear relationship and the experimental data for two different load conditions 3k expected upper deviation from mean current 2300 _ expected lower deviation from mean current T T 1 x 2200 experimental mean current coil on valve FI F experimental mean current stand alone coil 5 2 2050 experimental lower deviation from mean current stand alone coil P experimental upper deviation from mean current stand alone coil sari 1900 experimental lower deviation from mean current coil on valve qr experimental upper deviation from mean current coil on valve 4 ph A 4 4 an E E 3 lt ytt 1600F w F 4 3E tte ath
15. riven by the L9352B regulated channels and L9352B unregulated channels before and after the VCCL regulation Comparison between the current on loadsdrien by reg channels and unreg channels before and after the VCCL Hold phase duty Mean current on the cycle time for the reg ch Mean current on the cycle time for the unreg ch Mean current on the cycle time for the unreg ch mA before the regulation mA after the regulation mA 0 35 530 450 560 0 45 660 550 670 As last operative condition considered in our tests we can refer to the following data and the Figure 10 INLET valve opening closing frequency of 1 Hz e forthe first 450 ms duty cycle 0 1 forthe next 50 ms duty cycle 90 96 e forthe last 500 ms duty cycle 15 10 75 The main idea is to increase the resistance of the loads of about the 15 The initial value of 4 8 Ohm that is 4 6 Ohm of the coil resistor plus 0 2 Ohm of Rds ON of the DMOS has been increased of 0 6 Ohm So doing we simulated a gradient temperature of about 35 For this calculation we referred to the formula of the resistance of the chopper versus the temperature Riast 0 004AT From the results shown in the table 7 4 it comes out that the unregulated channels maintains a satisfactory tracking capability of the current values driven on the loads also in simulated conditions of temperature gradient Figure 10 Evalu
16. ty cycle of the regulated channels Table 2 Results of the first operative condition under test Unreg ch cinputauty petore the pkiopk meancurrent pk io pk mA current mA mA current mA regulation 0 15 0 83 0 75 520 280 390 360 0 25 0 73 0 65 749 360 660 360 0 35 0 64 0 53 990 400 920 480 0 45 0 55 0 41 1200 480 1200 480 0 55 0 44 0 26 1480 480 1480 480 0 65 0 35 0 1 1700 480 1740 440 0 75 0 23 0 09 1780 520 1760 480 Table 3 Results of the second operative condition under test Unreg ch uter LONE manual mA current mA mA current mA regulation 0 15 0 83 0 75 530 320 390 360 0 25 0 73 0 65 780 400 660 360 0 35 0 64 0 53 980 440 920 440 0 45 0 53 0 39 1240 480 1200 480 0 55 0 44 0 25 1460 560 1480 520 0 65 0 34 0 09 1630 440 1740 480 0 75 0 25 0 09 1630 440 1820 480 Just to highlight the results obtained by this analysis it is important to summarize the difference in the coil current of the unregulated channels of L9352B before and after the 14 18 ky AN2791 Virtual current control loop on the Q1 Q2 channels of L9352B Table 4 regulation inspired to the duty cycle value carried out by the regulated channels of the same device In Table 4 we can see the results of a comparison between the mean current on the loads d

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