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ANALOG DEVICES ADSP-BF518F EZ-Board Evaluation System Manual (Revision 1.0 January 2009)

1. D 3 3V Q All USB interface circuitry is considered proprietary and has been omitted from this schematic When designing your JTAG interface please refer to the i i i ENCODER ENABL Engineer to Engineer Note EE 68 which can be found at http Awww analog com R140 8141 8142 511 0 511 0 511 0 ENCODER 0402 0402 0402 3 3V E w SW19 Fg P 7 15 0 55 13 00 1 gt m gt ICDG ADC_AI LED2 ______1 JTAG 1 d mu 7 ICZWADC AZLEDS 1 R144 8145 PS_5V 1 3 3V SWTO15 10K gt K D 0402 0402 5 1 L OTARY_ENC_EDGE 17 PR IEMU l SWT025 SLIT 1 4 N Z O 3 3V 3 3V 5 6 ITMS DA_ VDD EXT mck B LSS 9 10 ITRST I L RESET e _ gt _ po UART 0 11 12 prt DA SOFT RESET DA SOFT RESET a C116 e l z 0 1UF 021 13 14 ITDO DA STANDALONE 0402 C117 R270 1 0 1UF J2 IDC7X2 SMTA 10K 1 0402 0402 ae 4 V 10K 0 1UF L o2 ve 50 0402 a SW10 Ne CUARTO
2. R68 49 9 M a Bei 8 E ll AAA gm gt I VCCO SW TT VCCPLL SW 1 CO A A NA Ame R71 m m 0603 3 3V SW H n I II i O VCC3A SW LME lt gt fi suc _ L l aaa R72 m 49 9 0603 MIICRS HWAIT C 5 SCRS__ R73 49 9 0603 LLL lt gt _ U4 Ed ND SER Hs 0603 999 558 5585 lt 48 TT MN AAAA o m za 1 888 QOQ 1 gt _ Li ERXDO O Vol SMRXDO 0d 83V gt gt gt gt 88 nit mann C 49 9 45 IBe i 0603 225 as A i SMRXD1_ l FT SMDI I vo RXM V vy m 1 R77 LIN 49 9 1 94 SMDC Ee i 0603 L SMDC 1 it SCRS 87 5 5 2 2__ i 2 lt gt 5 2 _1 R355 L SCRS M adips gt ETT 499 0402 CSO M scoL S IX 0603 17 SMRXD 85 CENT s A L SMRXDOI MK SMRXDO 52 p ie i CO A A N 1 PRA 84 RXM2P J IRXM2 SS s ma ooo 0 L SMRXDH MIRO
3. 17 C170 C173 SMA 10PF 10PF R210 0805 AGNID 0805 AGNID 0 uc AQ R208 PRO 10 Ce AE 0603 JP28 SW22 SW23 SJ21 r __ SMA Viz ll TE IRHPOUT RDV T SMA LHPOUT_RDIV ____1 SHORTING d LO MA m L ISMA U I EL DEFAULT 283 C157 3 SW4 r __ SMA V3 m L 5 S 0 scene R209 0805 T DOS TT PB IDRIPHIMMC 54 lt gt EN Am P JUMPER BRISE I CI 1 5 b 5 b DEFAULT 283 e EN 3 L SMA 1 PIN 1 a e AGNID C Ce _____ 06 B adc SCLK i SWAVSERE o gq es SHORTING 777777 PBBRESTUMMGCDSI bb SWTUTT SWTUTT 3 DP4 DIP6 DIP6 DEFAULT 283 SWT018 SJ19 SINGLE ENDED INPUTS SWA disconnects DSP from ADC DEFAULT 28 amp 3 126 SPORT1 ENBL SMA JP27 1 10 io 3 0603 JP25 0603 JP26 3 1 1 m IDC3X1 E IVSES 1 co 0805 3 3 0402 C159 C176 IDC3X1 IDC3X1 AGND e NN C U e O 20 Cotton Road R211 0805 R239 0805 0 0 C155 o D oo 0158 Nashua 03063 EA ned lt amp a DEVICES sera ji PH 1 800 ANALOGD i XKL Title ADSP BF518F EZ BOARD Size Board No Rev C A0217 2008 02 Date 12 10 2008 14 21 Sheet 5 of 16
4. 4 Single Ended Inputs Female 1 Mic Aud Head Aud Bln In In Out Out 3 3 Volts Figure 2 1 System Architecture This EZ Board is designed to demonstrate the ADSP BF518F Blackfin processor capabilities The processor has an I O voltage of 3 3V The core voltage of the processor is controlled by an Analog Devices ADP1715 low dropout regulator LDO and an Analog Devices AD5258 digipot which 2 2 ADSP BF518F EZ Board Evaluation System Manual ADSP BF518F EZ Board Hardware Reference is configurable over the 2 wire interface TWI signals Refer to the power on self test POST example in the ADSP BF518F installation directory of VisualDSP for information on how to set up the TWI interface The core voltage and clock rate can be set on the fly by the processor The input clock is 25 MHz A 32 768 kHz crystal supplies the real time clock RTC inputs of the processor The default boot mode for the processor is external parallel flash boot See Boot Mode Select Switch SW1 on page 2 8 for information on how to change the default boot mode Programmable Flags The processor has 40 general purpose input output GPIO signals spread across three ports PF PG and PH The pins are multi functional and depend on the ADSP BF518F processor setup The following tables show how the programmable flag pins are used on the EZ Board PF programmable flag pi
5. B 1 Frocessor EBIU and COREL Gurr y DH B 2 Processor Vr Bypass p Un FERA 3 uoo dep 4 PIS A A IA B 5 Aao C e i B 6 Boise asas asnasqa pasaqsi B 7 Priorat Conna LEDE uu uu iene B 8 Det u u u ese B 9 Rotary Encodes JAG RSI arsons B 10 Lorie Anala COND oes dI serie aidan A E AA B 11 Push Buttons Reset LEDS ADM 12 nop B 13 IP eod Daal DINE uu ee oe ees B 14 ADSP BF518F EZ Board Evaluation System Manual ix CONTENTS NNNM 15 Senes REIR 16 INDEX ADSP BF518F EZ Board Evaluation System Manual PREFACE Thank you for purchasing the ADSP BF518F EZ Board Analog Devices Inc evaluation system for Blackfin processors Blackfin processors embody a new type of embedded processor designed specifically to meet the computational demands and power constraints of today s embedded audio video and communications applications They deliver breakthrough signal processing performance and power efficiency within a reduced instruction set computing RISC programming model Blackfin processors support a media instruction set computing MISC architecture This architecture is the natural merging of
6. Ref Qty Description Reference Manufacturer Part Number Designator 107 2 22000PF 25V C131 C197 DIGIKEY 490 3252 1 ND 1096 0402 108 2 5 7 8 ON SEMI MBRS540T3G MBRS540T3G SMC 109 1 20MA D1 PANASONIC MA3X717E MA3X717E DIO005 110 1 2 5UH 3096 L3 COILCRAFT MSS1038 252NLB INDO13 111 1 33 0K 1 16W 1 R201 ROHM MCRO1MZPF3302 0402 112 5 47 0K 1 16W 1 R46 R48 R50 ROHM MCRO01MZPF4702 0402 51 R55 113 1 3 01K 1 16W 1 R63 ROHM MCRO1MZPF3011 0402 114 1 5 6K 1 16W 5 R247 PANASONIC ERJ 2GEJ562X 0402 115 15 1 0K 1 16W 1 R61 62 R64 65 PANASONIC ERJ 2RKF1001X 0402 R88 R91 R93 94 R103 R105 R109 R116 R189 R271 272 116 2 1000PF 2000V C112 C114 AVX 1206GC102KATIA 10 1206 117 3 220 50V 10 C153 C195 196 DIGI KEY 311 1035 2 ND 0402 118 4 5 6K 1 16W 0 5 R40 R43 45 SUSUMU RR0510P 562 D 0402 119 1 680 1 16W 196 R42 BC COMPO 2312 275 16801 0402 NENTS ADSP BF518F EZ Board Evaluation System Manual A 9 Ref Qty Description Reference Manufacturer Part Number Designator 120 1 90 9K 1 16W 5 R41 DIGI KEY 541 90 9KLCT ND 0402 121 1 40 2K 1 16W 5 R47 DIGI KEY 541 40 2KLCT ND 0402 122 2 100K 1 16W 5 R200 R350 DIGI KEY 541 100KJTR ND 0402 123 4 2 2UF 25 10 C129 C132 DIGIKEY 490 3331 1 ND 0805 C204 C206 124 1 21 5K 1 10W 196 R179 DIGI KEY 311 21 5KHRCT ND 0603 125 6 1 D2 5 D9 10 ON
7. at Ape IERXER 1 pafl ISRAS 1 ge O O ains O O 158 9 e 010 _______ PBUDRIPRIMMC DAL 5 AN p22 OGND 5 ipii A203 O O okb L ______ PB2JRESI MMC_D5I gt Af pas O ANE 7 gt oe RARI bus EE pO Caw pakwa gt ba iSA10__ 05 Dag QMTXCLK T ADILEDTMMC D7OTP ENI gt 026 wax K oup O om 1014 258 O OGnDI7E _ Q L DRISE I gt O GND17 p O _____ L _ ps e a O ICOL D3187 DNP DNP sw Sal ANALOG 20 Cotton Road Nashua NH 03063 DEVICES PH 1 800 ANALOGD Title ADSP BF518F EZ BOARD LOGIC ANALYZER CONN Size Board No Rev A0217 2008 0 Date 12 3 2008 14 30 Sheet 1iof 16 B D 3 3V XN 3 3V KA x 3 3V CX R162 R161 R163 10K 10K 10K 0402 0402 0402 R164 10
8. B 1 17 190 FUSO04 FEROD2 0 e P 2 e mies sv _ 1 ENO VOY 2 R267 C149 0 _ C148 B FOF 0402 1000 MBRS540T3G 1210 WAKE 1206 ee OU 2 9 OU ALXIIIIIIILILLLLLLIILLLO SMC e 045 5V 83v ies 1 1 1 4V 500mA 1206 FER15 N C147 600 1000PF 1206 457 1206 E 1206 R190 e e 0 05 FER16 ir 600 2 ae 1206 hog i e e d Wi R246 C141 P8 SHGN 10K 4 7UF 1118 U7 0402 0603 7 7 KI DNP VR5 IDC2XT 1 10 w 1 Lk T VDDINT 2 9 e in GND e 3 B Tc cet 9 GND se 4 7 SJ5 I D RTIN SDA SDA GN ADs GNDA e JUMPER 5 DEFAULT INSTALLED SCL SCL VLOGIC e C138 R245 MSOP8 MED 4JUF 10K Remove P8 when measuring VDDINT e e e e PS 1 m e e e C146 C142 Remove P9 when measuring VDDEXT 1 8V 500 mA 10UF 100 1210 0805 SJ6 di SHORTING VDDFLASH 3 3V 2A JUMPER lg DEFAULT INSTALLLED ae 3 3V TP8 N PGND 33V VDDEXT VRA R196 R194 Q Q TES i 192 VR1 0 05 0 05 OUT e 24 9K 1206 1206 i P9 2 0603 INP e COMP V VDDEXT 1 4 1 csf i s Ah C151 C152 5885 C150 L 0 05 _ _ C143 C144 2 e IND013 1206 22UF 0 1UF 6565 7 7 2 2UF 470PF 68PF PGATEP R195 gt 0805 0402 0805 0603 0603 GNE Pe 3 7 4 R193 2 4 8 Remove P11 when measuri
9. J4 J5 MIC GAIN SW4 MIC GAIN 3 3V HP OUT MIC IN 7 POS GAIN R47 40 2K f S 0402 Lm f 1 5 14dB MIC HP LPBK R41 ESI eoe AUDIO MODE 0402 4 E 57 3 3V DEFAULT 3 0 5 6dB 3 3V 10K SWE SWT018 v silta m gt LHPOUT ADV 77773 4 NC 2 R7 7 N FER19 OI J J 330 N N 0805 M WE 7 e DD 9 m AUDIO MODE LINE OUT LINE IN Dm C88 C87 C86 C71 C72 10UF 0 1UF 0 1UF 10UF 0 1UF R56 0805 0402 0402 0805 0402 10K e 5 DBVDD AVDD 18 0402 e e e 2 DGND AGND 19 e e 3 pevpp SW6 allows the signal to be looped back FER4 R247 RA for test purposes to the Left and Right headphone 0603 9402 IMICIN RDIV 22 fi wen i DO NOT switch positions 1 amp 2 ON at the same time CY Y e Z S Tn e HPVDD e Ensure that JP15 is 2 amp 3 or OFF wh
10. 0 01UF 0 01UF 0010 0 010 0 01UF 0 01UF 0 010 108 cT upsell 0805 0402 0402 0402 0402 0402 0402 0402 0402 0402 0402 0402 e bones GND29 6 e e bno GNp30 7 e VDOFLASH SEVDDINT10 N BBV Ra 164 VDDINT11 D1 MA3X717E 16 VDDFLASH1 E VWDDFLASHE 1 Ji2 U 2 DDFLASH3 hos thu 126 m 2 a 1 A VDDFLASH4 U ke D 142 0402 I VBPOTP TT VDDOTP VDDRTC BATT_COINT6MM Fuss ene C41 C42 C43 C44 C45 BATTHOLDER m 10UF 01UF 014UF 4 Sapore 0805 0402 0402 0402 0402 8 VPPOTP e e e e RTC BATTERY N Z ADSP BF518F C40 C35 LQFP176 SOCKET 0 1UF 0 01UF 0603 0402 ANALOG 225 Road Nashua 03063 DEVICES 1 800 AnaLocD Title ADSP BF518F EZ BOARD DSP POWER BYPASS CAPS Size Board No 0217 2008 Date 12 17 2008_11 04 Sheet 3 of 16 2 16 E D 0 15 ZZ Sasa ssim 1 12 15 _____ POS FROM TO DEFAULT ALTERNATE FUNCTION OFF MODE 1 DSP U12 FLASH U5 ON Expansion Interf
11. IDC3XI IDC3X1 1584 R218 0805 R224 0805 2 2 0 0 I7 Ga LM REF SELECT Install for a range of 2 X Vref 0 5V 0402 0402 _ 5 4 DCAPA mos i 13VB6 DCAPA Remove for a range of Vref 0 2 5V e AAA Ce B AGND AGND L oti v K 12 1 B 8 5 2 8 SUF 0 Sg 10K 29999 0805 0805 0402 R226 R237 10 10 0603 JP19 0603 JP22 1 e WIE 2 189 190 C191 C192 C193 C194 Hv Bv 0 1UF 0 1UF 0 1UF 0 1UF 0 1UF 0 1UF 3 3 0402 0402 0402 0402 0402 0402 169 174 10PF IDC3X1 IDC3X1 gt Z N R227 0805 R236 0805 4 5 5 i AGND AGND 0402 0402 e AGND VV AGND i 3 3V PSV 1 AVDD ADC 771 RE mue x x x L e e e e e e e R229 R234 10 10 C211 C212 C213 C216 C215 C214 C61 C62 C64 C63 C66 C65 0603 JP20 0603 JP21 0 1UF 0 1UF 0 1UF 0 1UF 0 1UF 0 1UF 10UF 0 1UF 10UF 0 1UF 10UF 0 1UF 1 1 0402 0402 0402 0402 0402 0402 0805 0402 0805 0402 0805 0402 1 3 3 e e e e e o _____ 171 172 IDC3X1 10PF IDC3X1 R230 0805 R233 0805 0 0 0402 0402 N 5 e AGND AGND V V v EN AGND
12. 04 Zm R4A U DTOPRUSD CMD 22 3 7 5005 RNS005 RNS005 RNS005 RNS005 RN3 RN7 RN11 RN15 RN19 ITy7 777 7 T r 1 EE ET mi EE E Rb PCOTAEU mel ERES TFSO SD D3 21 g i RIB L 8 Zi gt ISCKE l Ripe i m hia LA IDA 77 7 gt p71 poe eg e min min 7 Uae WF lie Rap DO 8 50 50_02 Z gg oA R2B i SMS Zi RA gt ISMS B2 Rep D10 Z gm pL ips 72 roS ron B2 hs 1 5 im RSCLKO SD D1 Z Ra R3B U SCAS 21 B n R3BP gt ISCAS 1 gm 159 SRA POZ sm MALLIA 377577 1 1 A Ki BL h D aq L 50 Z _ ra R4B L SRASZI B Raa gt ISRAS l 082 4Ran 22 33 33 RNS005 RNS005 RNS005 RNS005 RNS005 RN4 RN8 RN12 RN16 RN20 ps Ve ae a 2265 222 a a Ed erate pi 15337777 7 n RIBB L no O gt SSEL3 CUD 0 2 1 ISWEZ 1 gt SWE_ i RA Ripe _ DSE Wc RA Ripe pe s s DTI TI 15757 7 MULEJ __ 0 g ICDG ADC AT LED2 2 N RB lt gt ICDG ADG ALED
13. 82 b1 DTPRI DRPRI BIIPBI DRTPRIMMC DA 5 DATA27 DATA26 F eee 84 B3 DTSEC DRSEC 1 3 3V T DATA29 22 4 4 4 Pa ETE 86 bs TSCLK RSCLK s RSCLK1 MMC_D6 l m DATA31 DATA30 f 19 88 87 a MI 3 ie RFs PO MIPEZRFSIMMC 05 ______1 RSVD1 ne ee s 21 2 K 5 ee 90 ____ Se SEL gt SPISELI SPISEL2 fAMSS SPI0 IT l RSVD3 RSVDA F EA s 23 ba a 5 2 91 L__ _SPIO_SSEL3 CUD 2 SPISE3 7 lt 5 0 5 ____ 4 RSVD5 SVG FE i i 25 26 94 88 L SPIO MOSI gt SPIMOSI SPISS lt 1 52 _ 3 96 5 L _SPI0 MISO SPIMISO TIMER 71 PWR IN1 GNDi S 29 p 98 97 L SC gt SCL SDA 7 gt DA PWR IN2 GND2 F o monn 31 2 100 bo CZM ADC_A2 LEDSi lt UARTTX UARTRX OU J __ 1 VDDIO1 GND3 o 33 B4 102 101 UARTRTSUARTCTS P VDDIO2 GND4 35 6 104 103 1 _ gt 7 RESET NC f 3 3V1 3 3V2 3 FT QMS52X2 SMT SOS PBIDRIPRIMMC D4j lt gt GPIO2 ff K gt 05 ______ LDLILLLLLLLADOADLEDIMMG D7 OTP ENi5 0 C 1058466 _____1 L WAKE wae Asvni 2 43 Rsvp2
14. SMRXDI L SMDIOI sie ml palais pend 177 SMRXDZI g 835 2 a c P dee 82 PILED TO PILEDO 01 U ERXDVI CO AV _ 1 L SMRXD3 NAE eee T KA 177 SMRXDVI _____ 1 0402 80 PILED2 gt IPILED2 DR dem SMRXC MI 5 25 L ERXOLKI CO AAA 1 pula 77 P1LED3 gt PHED3 LI SMTXC REFCLK MIS SMTXC REFCLK I ERXER NMI dos I SMTXERI M smTxeR 6 A 2 75 P2LED gt PALEDO i L MITXOLK CO A A M ISMIXG REFCLIC _____ L SMIXDO MS SMTXDO E A c 77 SMIXDII n r 0402 0402 t 73 P2LED2 gt jP2LED2 1 a GI L SMIXDZ M surxp2 20 3 3V VOCBA SW PHYINTI CO SA A A M SMIXER 1 E P2LEDS me i L a R82 lee STEN sunen esL C e me z 23 pone 600 i ETXD lt gt AA ANA __ 1 LEDSELI _k ILEDSELT _ 1 0603 i OSB m ns 4 1 0603 i 98 68 P oo eas SSDA sDA UNUSED1 3 3V LO EXD lt gt swipe 97 69 C94 C93 C92 C101 C102 C103 777557 R80 7777777 L SSCL 501 UNUSED27 e 10UF 0 01UF 0 01UF 10UF 0 01UF 0 01UF 49 9 1 96 92 0805 0402 T 0402 T 0805 717 0402 71 0402 0603 SMTXERI
15. 4 W nsvp4 Rnsvps 4 N Rsvps Rnsvpo P DC25X2 SMTA ANALOG 20 Cotton Road Nashua NH 03063 4 DEVIC ES PH 1 800 ANALOGD Title ADSP BF518F EZ BOARD Size Board No 0217 2008 Date 12 10 2008 14 26 Sheet 13 of 16 B D VDDOTP 1 TP3 e 33V 1 VPPOTP 1 TP2 158 R182 C136 12 2 0 0 1UF 1UH 0603 0603 INDO19 YN e D2 D5 XR MBR130LSFT1G MBR130LSFT1G SJA SHORTING m SOD 123FL SOD 123FL JUMPER R181 e 9 gt DEFAULT NOT INSTALLED U11 140 0K u 0603 e L1 R352 OTP FLAG ENBL VR3 INDO18 0603 1 R179 JP14 oUT 21 5K 72222222 A0LEDI MMC D7 OTP 127 MBR130LSFT1G DNP 2 VR2 10UF 1A 2 4 1210 SOD 123FL r ADJ IDC2X1 6 5 C129 N swt gt 2 2UF T 0805 TSOT5 i 7 133 R178 oT FB Da C126 R183 1UF 10K 10 0 0603 0603 _ MBR130LSFT1G e 355 1210 0603 DNP SOD 123FL 4 GND COMPL e R173 C125 C208 3 10K 0402 1210 0603 R176 C131 R351 R184 MSOP8 24 0K 22000 70
16. R183 DIGI KEY 311 10 0KHRTR ND 0603 89 8 100PF 50V 5 C67 70 C82 85 AVX 06035A101JAT2A 0603 90 1 1000PF 50V 5 C207 PANASONIC ECJ 1VC1H102J 0603 ADSP BF518F EZ Board Evaluation System Manual A 7 Ref Qty Description Reference Manufacturer Part Number Designator 91 1 2200PF 50V 5 C130 PANASONIC ECJ 1VBIH222K 0603 92 2 75 0 1 10W 1 R127 R136 DALE CRCW060375ROFKEA 0603 93 3 100 1 16W 5 R49 R54 R70 DIGI KEY 311 100JRTR ND 0402 94 1 4 99K 1 16W 1 R347 VISHAY CRCW06034K99FKEA 0603 95 1 24 9K 1 10W 1 R192 DIGI KEY 311 24 9KHTR ND 0603 96 3 511 0 1 16W 1 R140 142 DIGI KEY 311 511LCT ND 0402 97 2 10UF 10V 1096 C107 C111 PANASONIC ECJ 2FB1A106K 0805 98 1 2 0K 1 16W 1 R182 PANASONIC ERJ 3EKF2001V 0603 99 6 0 05 1 2W 196 R190 191 R194 SEI CSF 1 2 0 05 1 R 1206 R196 R198 R204 100 11 10UF 16V 1096 C125 127 C135 AVX 1210YD106KAT2A 1210 C146 C149 C200 203 C205 101 1 GREEN LED001 LED13 PANASONIC LN1361CTR 102 1 RED LEDO01 LED9 PANASONIC LN1261CTR 103 2 1000PF 50V 5 C147 148 AVX 12065A102JAT2A 1206 104 1 255 0K 1 10W R197 VISHAY CRCW06032553FK 1 0603 105 1 80 6K 1 10W 1 R193 DIGI KEY 311 80 6KHRCT ND 0603 106 8 270 1 10W 5 R95 102 PANASONIC ERJ 3GEYJ271V 0603 A 8 ADSP BF518F EZ Board Evaluation System Manual ADSP BF518F EZ Board Bill Of Materials
17. Us 14 1 MTFC2GDKDM U16 MICRON MTFC2GDKDM WT FBGA169 15 1 ADM708SARZ U22 ANALOG ADM708SARZ SOIC8 DEVICES 16 1 ADM3202ARNZ 021 ANALOG ADM3202ARNZ SOICIG DEVICES 17 1 ADSP BF518F U12 ANALOG ADSP BF518BSWZ 4F4 LQFP176 DEVICES 18 1 ADP1864AUJZ VRI ANALOG ADP1864AUJZ R7 SOT23 6 DEVICES 19 1 ADP1611 VR6 ANALOG ADP1611ARMZ R7 MSOP8 DEVICES 20 1 ADP1715 VR5 ANALOG ADP1715ARMZ R7 MSOP8 21 1 ADP1710 5 VR3 ANALOG ADP1710AUJZ R7 DEVICES 22 1 ADR550B U11 ANALOG ADR550BRTZ REEL7 SOT23 3 DEVICES 23 1 AD5258 U7 ANALOG AD5258BRMZ10 MSOP10 DEVICES 24 1 SSM2602 ICS009 U1 ANALOG SSM2602CPZ R2 DEVICES 25 1 ADP1715 VR4 ANALOG ADP1715ARMZ 1 8R7 MSOP8 DEVICES 26 6 AD8022 MSOP8 U29 34 ANALOG AD8022ARMZ DEVICES 27 1 AD7266 U2 ANALOG AD7266BCPZ LFCSP32 DEVICES A 2 ADSP BF518F EZ Board Evaluation System Manual ADSP BF518F EZ Board Bill Of Materials Ref Qty Description Reference Manufacturer Part Number Designator 28 1 ADP1610 VR2 ANALOG ADP1610ARMZ R7 MSOP8 DEVICES 29 1 DIP3 SWTO015 SW19 DIGI KEY CKN6114 ND 30 1 DIP8 SWT016 SW20 C amp K TDAO8HOSB1 31 6 DIP6 SWTO017 SW15 18 SW22 CTS 218 6LPST 23 32 7 DIP4 SWT018 SW3 8 SW10 ITT TDAO4HOSBI 33 12 SMAXPINS J7 J16 26 JOHNSON 142 0701 201 CONO043 COMP 34 1 DB9 9PIN J2 NORCOMP 191 009 213 L 571 CONO038 35 2 DIP2 SWT020 SW2 SW21 C amp K CKN9064 ND 36 4 IDC 2X1 P8 11 FCI 90726 402HLF IDC2X1 37 5 IDC 2X
18. VDDEXT Power J umper P9 The VDDEXT power jumper P9 is used to measure the processor s I O voltage and current By default P9 is ON and the power flows through the two pin IDC header To measure power remove the jumper and measure voltage across the 0 1 ohm resistor Once voltage is measured power can be calculated For more information refer to Power Measurements on page 1 24 ADSP BF518F EZ Board Evaluation System Manual 2 19 Jumpers VDDMEM Power J umper P10 The VDDMEM power jumper P10 is used to measure the voltage and current supplied to the memory interface of the processor By default P10 is ON and the power flows through the two pin IDC header To measure power remove P10 and measure voltage across the 0 1 ohm resistor Once voltage is measured power can be calculated For more information refer to Power Measurements on page 1 24 VDDFLASH Power J umper P11 The VDDFLASH power jumper P11 is used to measure the flash voltage and current supplied to the processor core P11 is ON by default and the power flows through the two pin IDC header To measure power remove P11 and measure voltage across the 0 1 ohm resistor Once voltage is mea sured power can be calculated For more information refer to Power Measurements on page 1 24 2 20 ADSP BF518F EZ Board Evaluation System Manual ADSP BF518F EZ Board Hardware Reference LEDs This section describes the on board LEDs Figure 2 4 show
19. s default is SPI mode Refer to SPI TWI Switch SW16 on page 2 13 for more information Mic gain values of 14 dB 0 dB or 6 dB are selectable through switch SW5 For more information see MIC Gain Switch SW5 on page 2 10 Microphone bias is provided through a low noise reference voltage A jumper on positions 2 amp 3 of JP15 connects the MICBIAS signal to the audio jack Placing a jumper on positions 1 amp 2 of JP15 connects the bias directly to the mic signal For more information see MIC Select Jumper JP15 on page 2 18 ADSP BF518F EZ Board Evaluation System Manual 1 17 ADC Interface J4 and J5 are 3 5 mm connectors for the audio portion of the board J5 connects the mic on the top portion and line in on the bottom J4 con nects the headphone on the top portion and line out on the bottom If there is no 3 5 mm cable plugged into the bottom of either J4 or J5 the signals are looped back inside the connector For more information see Dual Audio Connectors J4 5 on page 2 26 For testing SW6 positions 1 amp 2 connect the MICIN signal to either the left or right headphone Do not connect the left and right to the MICIN signal at the same time only position 1 or 2 of SW6 should be ON at the same time For more information see Mic HP LPBK Audio Mode Switch SW6 on page 2 10 The EZ Board is shipped with two 3 5 mm cables which allow you to run the example programs provided in the EZ Board
20. 41 0805 2 MUX2 ETHERNET MODE u TAW FXSDI 59 TESTI R63 60 3 01K SW17 TEST2 0402 61 i spo e Misris ISETP NAN KA Fi 2 11 TESTEN R64 SHGN L S HUM M Ws cus 1 0K SEO MOST 5 9 588208 66666666 somen gt gt CUERO ima Ep L SDA 550 KSB893M SENE Res s 128 Poski 0402 ANALOG 2 coton Road 6 7 imami ts i Sc Or 55 C Nashua NH 03063 DIP6 SII E PH 1 800 ANALOGD X Title SPI MODE ON ON ON OFF ON OFF ADSP BF518F EZ BOARD TWI MODE OFF OFF OFF ON OFF ON ETHERN ET SWITCH Size Board No Rev A0217 2008 0 Date 12 3 2008 14 30 Sheet 7 of 16 1 SJ23 SHORTING JUMPER DEFAULT NOT INSTALLLED LED SELO JP11 Ps Mini 77 R91 1 0K 0402 JPx LED Configuration Switch DEFAULT INSTALLLED PxLED1 FULL DPX COL 10LINK ACT OFF OFF ON OFF PxLED3 tri state PD tri state PD ACT PxLED2 LINK ACT 100LINK ACT LINK FULL DPX COL PORT 1 CFG SW7 PEN me L gt X FEN L
21. RD Rx 6 7 7 lt 9 Rp 8 19 R118 R119 R120 R121 56988 49 9 49 9 49 9 49 9 2 2 2 2 0603 0603 0603 0603 HXTT88 c R136 R138 R139 R137 8135 ICS007 75 0 7549 9 7949 9 499 49 9 0603 lt _ 0603 L 0603 lt _ 0603 0603 5 5 4 C108 C109 C107 0 10 04UF 100 0402 0402 77 0805 R134 R133 49 9 49 9 i 0603 0603 e C114 1000PF T 1206 SW m U27 J14 1 16 1 L 2 TD 1 TX i _ 2 3 tx 14 3 1CT4CT 4 5 A lt axe 7 7 r 9 8 L 21 lt RD RX 119 R123 R131 R132 R122 56988 49 9 49 9 49 9 49 9 2 2 2 2 0603 0603 0603 0603 HXTT88 0 R127 R125 R124 81267 R128 ICS007 75 0 7549 9 7949 9 499 49 9 0603 lt _ 0603 0603 lt _ 0603 0603 oe C110 C113 C111 0 10 0 1UF 10UF 0402 0402 T 0805 R129 R130 49 9 49 9 4 4 0603 0603 C112 1000PF T 1206 ANALOG 20 Cotton Road Nashua NH 03063 DEVICES PH 1 800 ANALOGD Title ADSP BF518F EZ BOARD ETHERNET JACKS Size Board No Rev C A0217 2008 02 Date 12 3 2008 14 30 Sheet 9 of 16
22. Several locations are provided for measuring the current draw from vari ous power planes Precision 0 1 ohm shunt resistors are available on the VDDINT VDDEXT VDDMEM and VDDFLASH voltage domains For current draw measuments the associated jumper P8 11 should be removed Once the jumper is removed the voltage across the resistor can be measured using an oscilloscope Once voltage is measured current can be calculated by dividing the voltage by 0 1 For the highest accuracy a differential probe should be used for measuring voltage across the resistor For more information see VDDINT Power Jumper P8 on page 2 19 VDDEXT Power Jumper P9 on page 2 19 VDDMEM Power Jumper P10 on page 2 20 and VDDFLASH Power Jumper P11 on page 2 20 Power On Self Test The power on self test program POST tests all EZ Board peripherals and validates functionality as well as connectivity to the processor Once assembled each EZ Board is fully tested for an extended period of time with a POST EZ Boards are shipped with the POST preloaded into one of its on board flash memories The POST is executed by resetting the board and pressing the proper push button s The POST also can be used as a reference for a custom software design or hardware troubleshooting Note that the source code for the POST program is included in the Visu alDSP installation directory along with the readme text file which describes how the EZ Board is configure
23. Tc J Utin 2 gt e Tu v v URBS CO qe B m ze P SR20UT 9 54 sd SWTO18 SOIC16 KI O M77 CON038 UARTO SETUP mn 0402 R203 10K UART 0 4 aw J3 3 3V 7 DATO a CX 8 RFSO SD D2 9 DAT2 C154 1 0 01UF eMMC ENABL CD DATS 0402 pL CONSE x e __ 55 SW 1 U16 o poe oe a 1 l m TOO i oro L 885888358 b nen 1500065 QIK L _ we gt gt gt gt gt SWTO20 W5 ee as i SW20 CMD busco s DTOPRI SD CMD Ni 2GB eMMC gt DO L MMC Dll m pi IT gt 14 H5 __ _ 02 L 02 a o m C 45 gt 11 455 PB1 DRIPRI MMC D4i 10 J5 aaa al m D6 9 26 m D7 DIP8 50990568 SWTO16 50 2 20297 3 3V nu E 99909999990 i PB2 RFST MMC D5 cp ld pcc FBGA169 188 i RSCLKTMMC QAUF 20 Cotton Road otton Roa Ute Be L Ele Rte Be Site Siir B ANALOG 0402 0402 0402 0402 0402 0402 0402 0402 0402 Nashua NH 03063 lt lt DE V ICES PH 1 800 ANALOGD v e e Title ADSP BF518F EZ BOARD ROTARY ENCODER JTAG RS232 RSI NN Z Size Board No A0217 2008 Rev Date 1 15 2009_11 11 Sheet 100 16 A B C D
24. U10 0402 ee s s 2 18 3 3V PB1 R165 R166 ET QQWE L AOLEDIAMC D7IOTP ENI M 0805 Us 0603 s eee CDG ADC_A1 LED2 1 2 1Y2 gt L CZWADC A2LEDSI 9 SW12 8 12 74LVC14A 1A4 1Y4 gnam lt gt C123 11 9 LED3 LED2 LED1 LED13 m 1UF 9e pal 2Y1 YELLO YELLOW W YELLOW W GREEN POWER 0805 Ee dua LEDOO1 g EDO 5000 __ 2v32 e 17 8 2 4 2YA R159 R158 R160 R157 1 330 330 330 330 PB ENABLE 0603 0603 0603 0603 19 R168 OE2 10K 0402 SSOP20 8167 8169 sw2 0805 0603 TOE CO IPBI DRIPRIMMO DA 1 s gt IPB2 RFS1 MMC_D5___ v SW13 572020 MOMENTARY a SWT024 C124 1UF 0805 SW2 GPIO enable POS FROM TO DEFAULT FUNCTIONS 1 push button 1 DSP U12 PHO ON ON PB1 OFF eMMC ADC Expansion Interface 2 push button 2 DSP U12 PH1 ON ON PB2 OFF eMMC ADC Expansion Interface 3 3V TA e e e e LED9 RESET BED LED001 R268 R154 R156 R155 10K 10K 10K 10K 0402 0402 0402 R153 0402 330 0603 U22 e MR RESET PF RESET e gt IRESET 1 ___ I DA_SOFT_RESET gt 6 PFO amas s SN 4 2 p SOIC8 wi u SN74LVC1G08 MOMENTARV SOTAS5 SWTO24 3 3V Q 3 3V CN 3 3V 3 3V RES ET i w R152 R170 R171 R172 C119 10K 10K 10K 10K 0
25. 01UF ANAI 20 Cotton Road 0402 0402 0402 0402 0402 c 21 r L e 20 x x 0402 I S Nashua NH 03063 5 6 9 8 11 210 13 12 DE V 1 800 ANALOGD 74LVC14A 74LVC14A 74LVC14A 74LVC14A N Z SOIC14 SOIC14 SOIC14 SOIC14 Title ADSP BF51 EZ BOARD PUSHBUTTONS RESET LEDS Size Board No AO 217 2008 Rev Date 1 15 2009 11 11 Sheet 12 of 16 A B D 3 3V LA 3 3V iPS 5V i iPS 5V 1 L 0015 lt gt ta puer LAL F apprt ADDRO a p ie p 4 av GND1 PWR IN1 GND1 IN1 ADDR3 ADDR2 3 h 3 h URS d GND2 PWR IN2 GND2 PWR IN2 ADDR5 ADDR4 5 6 5 6 g GND3 VDDIO1 GND3 X VDDIO1 L ADDR7 ADDR6 L 7 7 r 10 9 r AB GND4 VDDIO2 GND4 VDDIO2 ADDR ADDR8 9 10 9 10 TAT 12 11 Ato GND5 3 3V1 GND5 3 3V1 1 ADDR11 ADDR10 11 12 11 12 13 14 ADDR13 ADDRA2 13 A12 GND6 3 3V2 GND6 3 3V2 TAS 16 15 i Ad 7777 D i 2 3 PPIoFS1 PPIFS2 lt gt iDTOPRUSD CMD 77 po DTOPRUSD gt DR
26. 3 01K 0603 0402 0603 0603 R177 C132 piss DNP 10K 22UF UE 209 0603 0805 1 1UF T 0603 DNP C130 2200 T 0603 16 1UH INDO19 e m UV d 1 ee C201 C200 5 La 10UF 10UF lt t 22UH D9 1210 1210 5 IND024 MBR130LSFT1G SOD 123FL e e PS 5V C206 2 2UF E 0805 e e 1 Lo 3 t 22UH lt t INDO24 4 R350 010 100K C204 MBR130LSFT1G 17 205 0402 2 2UF 1UH 10UF 0805 SOD 123FL ____ 1210 e A rix gc C207 1000PF C203 C202 T 0603 10UF 10UF R348 1210 1210 VR6 44 2K 0603 e OIN o 355 ss N Z 4 1 ND e C210 T 0603 R344 C197 R347 DNP MSOP8 20 0K 7 22000PF gt 499 0402 71 0402 0603 e C198 ANALOG 2000tton Road Nashua NH 03063 e e DEVICES 1 800 AnaLocD N Title ADSP BF518F EZ BOARD Size Board No A021 7 2008 Rev Date 1 15 2009 11 09 Sheet 14 of 16 B D
27. INPUTS SHORTING JUMPER SMA ES DEFAULT 2 amp 3 R214 R222 0 0 SHORTING FERT 2 N 222 0402 R216 TN 0402___ R220 330 E 10 N 1 i 10 0805 5 1 0 AAA DEFAULT 2 amp 3 KI 0603 JP17 KI 0603 JP24 d Pd i SJ12 44 i 2 _ SHORTING ME sss I T a I2 JUMPER MEME DEFAULT 2 amp 3 s 3 3 U2 sib 5 3 IDC3X1 IDC3X1 2 3 3V R215 0805 R221 0805 d ale a7 5 0 0 gt one oe IDOUTA AGKD amp AGKD 5 17 LV 8 22 ADC RANGE ey 8 DOUTB MIIDOUTB I Vi VA2 mmm ciet DEFAULT 283 7 s 10PF WESS Nia ADE SOIR E cue 1 AGND 17 AGND SJ16 jd cs CS 1 21 SHORTING ryz M NPER ss 11 IDC2X1_SMT R225 u L VSEl1 ja R219 R223 5014 SHORTING L 2 v 6 RANGE RANGE 10 N l 1 10 22 JUMPER SGL DIFF 0603 JP18 KI 0603 JP23 2 4 DEFAULT 283 18 B n Sete LLL MEE lt MET MBI A IM ADC AO0LEDI MMC D7 OTP EN __________ 2 m 2 2 5 1 5018 17 w SJ2 Hv d SUM T L Vs 2 A1 ______1 SHORTING 3 3 a 16 L ET ST aS JUMPER C162 C167 DEFAULT 283 E ati VB3 A27 2 _______ J d DEFAULT INSTALLLED
28. LOGIC ANALYZER COMPRESSION LAND GRID ARRAY L Ad P6 P7 101019 bo CO be O IAMSO 1 Mp oO MIG Op lt BBROPRISD Do AMST 1 aS CONDO Aen O ps IRSOLKOSD D4 QOGND10 e uE My O ee EI eq ec 5 t C fANSSSPU SE 3 DN 4 7777 8 0 8883600 gt 5s 0685 7 REESE oF ARE _ 4 wt uec NECI O Oeni e Noi O Onor AMS2 RXDO e iki OO ABE1 SDQM1 ____1 E e pg IERXDT 1 e __ O 2 g 04 1 0 0000 1280 I 77 8PI MISO gt Ado O OGND12 pu ISCAS LN ml IERXDZ 71 Seg r gt 0322 ISCKE Senos IERXDS e A eno Dig e UE Alba e RT TEDA gt 294 O OGND13 pre ABEO SDOMO ET Miis IETXEN 1 LIL GANADO Ops OO pn 7 SMS e AGND4 O 017 BB O 4 S 6 p Al ig O OGNDIH r Seu r 16 is O OGND14
29. Number 104 position 0 025 SMT header SAMTEC QMS 052 11 L D A Mating Connector 104 position 0 025 SMT socket SAMTEC QFS 052 01 L D A RS 232 Connector J 2 Part Description Manufacturer Part Number DB9 female vertical mount NORCOMP 191 009 213 L 571 Mating Cable 2m female to female cable DIGI KEY AE1020 ND Power Connector J 3 The power connector J3 provides all of the power necessary to operate the EZ Board Part Description Manufacturer Part Number 0 65 mm power jack CUI 045 0883R Mating Power Supply shipped with the EZ Board 5 0VDC 2 5A power supply CUI STACK DMS050260 P12P SZ ADSP BF518F EZ Board Evaluation System Manual 2 25 Connectors Dual Audio Connectors J 4 5 Part Description Manufacturer Part Number 3 5 mm dual stereo jack SWITCHCRAFT 35RAPC7JS Mating Cable shipped with the EZ Board 3 5 mm male male 6 cable RANDOM 10A3 01106 SMA Connectors J 7 J 16 26 Part Description Manufacturer Part Number SMA straight jack receptacle JOHNSON COMPONENTS Mating Cable shipped with the EZ Board 142 0701 201 SMA male male 18 cable CRYSTEK CORPORATION CCMA MM 18 Battery Holder J 12 Part Description Manufacturer Part Number 16 mm battery holder MEMORY PROTECTION BH600 Mating Battery shipped with the EZ Board 3V 125MAH 16 mm LI COIN PANASONIC C
30. PPIFS2_ SD_CMD land grid array expansion interface II PG8 TSCLKO RST_CLK TMR6 TACI6 Default TSCLKO SD land grid array expansion interface II PG9 DTOSEC UARTO_TX TMR4 Default UARTO_TX Land grid array expansion interface II PG10 DROSEC UARTO_RX TACI4 Default UARTO_RX Land grid array expansion interface II PG11 SPIO_SS AMS 2 SPI1_SSEL5 Default AMS2 TACLK2 Land grid array expansion interface II PG12 SPIO SCK PPICLK 2 TMRCLK Default SPIO_SCK Land grid array expansion interface II PG13 SPIO MISO TMRO PPIFSI 2 Default SPIO_MISOI Land grid arrav expansion interface II ADSP BF518F EZ Board Evaluation System Manual 2 5 Programmable Hags Table 2 2 PG Port Programmable Flag Connections Cont d Processor Pin Other Processor Function EZ Board Function 614 SPIO MOSI TMRI PPIFS2 2 Default SPIO MOSI PWM_TRIPB Land grid array expansion interface II PG15 SPIO SSEL2 PPIFS3 AMS 3 Default AMS3 SPIO SEL2 land grid array expansion interface II Table 2 3 PH Port Programmable Flag Connections Processor Pin Other Processor Function EZ Board Function PHO DRIPRI SPI1_SS RSI_DATA4 Default PB1 DRIPRI MMC DA land grid array expansion interface II PHI RFS1 SPI1_MISO RSI_DATA5 Default PB2 RFS1 MMC D5 land grid array expansion interface II PH2 RSCLK1 SPI1 SCK RSI DATA6 Default not used RSCLK1 MMC D6 land grid array expansi
31. PPIOD19 PP1DO PPIOD18 RSVD2 RSVD3 NMI gt NMI _ 45 46 45 46 48 by PPHD3 PPIOD21 102 0 20 2 RSVD4 RSVD5 F BGH BG 47 48 47 48 50 kg P PPI1D5 PPI0D23 PPIIDA PPIOD22 RSVD6 RSVD7 52 1 EL 107 PPHD6 P RSvD8 RSVD9 P M cunc era PBT DRIPRIMMC GPIO1 GPIO2 05 ______ 51 2 IDC25X2_SMTA 54 E uM 22 109 PPHD8 P 2 ADC_AO LED1 MMC_D7 OTP_ENI GPIO3 GPIO4 ICDG ADC AT LED2 i sia SSS 777 53 11 PPHD10 P i 38 DATA DATAO P 55 pe 37 58 570 127 PPI1D13 PPHD12 P LE DATAS DATA2 57 bg ad rad 21 PPHD15 PPHD14 105 60 5 Di _ _ MDA MDA ee 3 3V DATAS DATA4 _ 59 60 iPS 5V 71 D7 62 61 06 PPHD17 PPHD16 f WS DATA7 DATA6 62 DS 64 paras paras 68 78 SURE ii m m DITI 66 bs 019 63 SCL RSVDI P Sr DATA11 DATA10 65 Rsvo3 58 ID13 68 67 1012 m P4 DATA13 DATA12 67 68 1 DATA15 DATA14 69 70 3 h Lee RSVD6 RSVD7 GND2 PWR IN2 DATA19 DATA18 7 B 78 DATA20 5 2 ons 9 GNDS z3vi 10 78 parA23 DATA22 7 11 12 GND6 3 3V2 80 DATA25 DATAA S i ke Pert es Pana rt 2225
32. SEMI MBRI130LSFTIG MBRI130LSFTIG SOD 123FL 126 1 22UH 2096 L1 COILCRAFT MSS4020 223MLB INDO18 127 3 1UH 20 L2 L6 7 COILCRAFT ME3220 102MLB INDO19 128 13 33 1 32W 5 RN4 13 RN17 19 PANASONIC EXB 28V330JX RNS005 129 3 1 2K 1 16W 196 R4 5 R186 PANASONIC ERJ 2RKF1201X 0402 130 2 4 3 1 4W 5 R185 R188 PANASONIC ERJ 8GEYJ4R3V 1206 131 1 2 67K 1 16W 1 R187 PANASONIC ERJ 2RKF2671X 0402 132 3 1 0 1 16W 1 R248 250 VISHAY CRCW04021M00FKED 0402 133 2 22UH 20 L8 9 COILCRAFT MSD7342 223MLC IND024 134 4 330 100MHZ FERI FER19 21 MURATA BLM21PG331SN1D 1 5A 0805 A 10 ADSP BF518F EZ Board Evaluation System Manual ADSP BF518F EZ Board Bill Of Materials Ref Qty Description Reference Manufacturer Part Number Designator 135 8 22 1 32W 5 RN1 3 RN14 16 PANASONIC EXB 28V220JX RNS005 RN20 21 136 1 3300PF 50V 5 C198 PANASONIC ECJ 1VB1H332K 0603 137 1 24 0K 1 10W 196 R176 PANASONIC ERJ 3EKF2402V 0603 138 1 140 0K 1 10W R181 PANASONIC ERJ 3EKF1403V 1 0603 139 1 44 2K 1 10W 1 R348 PANASONIC ERJ 3EKF4422V 0603 140 1 1 91K 1 10W 196 R180 SUSUMU RG1608P 1911 B T5 0603 141 1 3 01 1 10W 1 R184 SUSUMU RG1608P 3011 B T1 0603 142 1 20 0K 1 16W 1 R344 VISHAY CRCW040220K0FKED 0402 ADSP BF518F EZ Board Evaluation System Manual A 11 ADSP BF518F EZ Board Evaluation System Manual ADSP BF518F E
33. SW15 The SPORTO enable switch SW15 connects the SPORTO interface of the pro cessor to the audio codec SSM2602 U1 When the SPORTO interface is used on the expansion interface II turn 5915 all OFF By default SW15 is set to all ON SPI Switch SW16 The SPI TWI switch 5016 selects the control interface for the SSM2602 audio codec By default SW16 is ON OFF ON OFF ON OFF and selects the SPI interface TWI is selected by setting SW16 to OFF OFF OFF ON OFF ON ADSP BF518F EZ Board Evaluation System Manual 2 13 Push Button and Switch Settings Ethemet Mode Switch SW17 The Ethernet mode switch SW17 selects the control interface for the KSZ8893M device By default SW17 is ON ON ON OFF ON OFF and selects the SPI interface TWI is selected by setting SW17 to OFF OFF OFF ON OFF ON Ethemet Port 2 Configuration Switch SW18 The Ethernet port 2 configuration switch 518 is used to configure cer tain Ethernet settings related to port 1 via hardware instead of software see Table 2 10 Table 2 10 Ethernet Port 2 Configuration Switch SW18 SW18 Position Default Description Position Function 1 ON Force flow control OFF Disable 0 Enable 2 ON Force full half OFF Half duplex 0 Full duplex 3 ON Force speed OFF 10BaseT 0 100BaseTX 4 OFF Auto negotiation OFF Enable 0 Disable 5 OFF Auto MDI MDI X OFF Enable 0 Disable G OFF MDI MDI X setting OFF MDI X MD
34. boot loader 1 13 INDEX universal asynchronous receiver transmitter See UARTO UARTI USB monitor LED LED4 1 6 V VDDEXT power jumper P9 2 19 voltage domain 1 24 VDDFLASH power jumper P11 2 20 voltage domain 1 24 VDDINT power jumper P8 2 19 voltage domain 1 24 VDDMEM power jumper P10 2 20 voltage domain 1 24 VisualDSP environment 1 6 voltage planes 1 23 W wall adaptor connector 3 1 6 1 22 watchdog timer 1 20 ADSP BF518F EZ Board Evaluation System Manual I 5
35. interface II PELL ERxDO PPIDI1 PWM AH TACI3 Default ERXDO Land grid array expansion interface II PF12 ETxD1 PPID12 PWM AL Default ETXD1 Land grid array expansion interface II PF13 ERxD1 PPIDI13 PWM BH Default ERXD1 Land grid array expansion interface II PF14 ETXEN PPID14 PWM_BL Default ETXEN Land grid array expansion interface II PF15 RMII_PHYINT PPID15 Default RMI 1_PHY INT PWM_SYNC Land grid array expansion interface II 2 4 ADSP BF518F EZ Board Evaluation System Manual ADSP BF518F EZ Board Hardware Reference Table 2 2 PG Port Programmable Flag Connections Processor Pin Other Processor Function EZ Board Function PGO MIICRS RMII Default MIICRS CRS HWAIT SPI1_SSEL3 HWAIT land grid array expansion interface II PG1 ERXER DMAR1 PWM_CH Default ERXER Land grid array expansion interface II PG2 CLK Default MIITXCLK DMARO PWM CL Land grid arrav expansion interface II PG3 DROPRI RSI_DATAO Default DROPRI SPIO_SSEL5 TACLK3 SD_DO land grid array expansion interface II PG4 RSCLKO RSI_DATA1 TMR5 Default RSCLKO TACI5 SD_D1 land grid array expansion interface II PG5 RFSO RSI_DATA2 PPICLK_1 Default RFSO TMRCLK SD_D2 land grid array expansion interface II PG6 TFSO RSI DATA3 TMRO Default TFSO PPIFS1_ SD_D3 land grid array expansion interface II PG7 DTOPRI RSI CMD TMRI Default DTOPRI
36. is used to put the KSZ8893M PHY into a power down mode In this mode the entire chip is powered down and the register configuration is not saved By default JP13 is not installed ADSP BF518F EZ Board Evaluation System Manual 2 17 J umpers OTP Hag Enable J umper J P14 The OTP flag enable jumper JP14 controls the precise ZV OTP voltage regulator When installed JP14 allows OTP writes JP14 must be installed for OTP writes to be successful The nominal 2 5V for OTP is temporarily raised to 7V when PH3 is set high Care must be taken when using the 0TP_FLAG signal in order to avoid driving 7V for an extended amount of time There is a limited amount of time 7V can be applied to the proces sor s OTP interface Violating the specifications listed in the ADSP BF512 ADSP BF514 ADSP BF516 ADSP BF518 Blackfin Embedded Processor data sheet can damage the processor Configured properly JP14 connects the processor s PH3 flag pin to the shut down pin of the ADP1611 switching converter Refer to the ADSP BF51x Blackfin Processor Hardware Reference Manual and the ADSP BF512 ADSP BF514 ADSP BF516 ADSP BF518 Blackfin Embed ded Processor data sheet for more information about OTP writes MIC Select Jumper J P15 The microphone select jumper JP15 connects the MICBIAS signal to the MICIN signal JP15 on positions 1 amp 2 or connects the MICBIAS signal to the 3 5 mm connector 45 JP15 on positions 2 amp 3 By default JP15 is in
37. mz dar e n EN gt sis in l ley aly pape fub Ulu DIZ AA Sisa IRSCLK1 MMC_D6_Z i R3B O D6 Ra Rap A I SPIO SCK Zi lt RsBP SPIO SCKI 7597 1 eA rol 5 S Fe Rage 0007 gm Z RB L Am _ D7 OTP EN 7 lt gt ADC AOLEDIMMC D7ZIOTP EN L fka gm IT AMSZ Zl lt RB 22 3 33 3 RNS005 RNS005 RNS005 RNS005 5005 RN2 RN6 RN10 RN14 RN18 So gt r 4 z ri Ripe 10022 m _1_ 5 Z R1B gt lAMSO B na ripe 127 Zm E R1A ms 7 _UARTO_RX oss 44200102225 enum e m gram n gm es fn aic eh cai ir 1D1 22 21 poA L2 Z rea gt 105 2R2A 1062 R2A T Ir 71 T n nnt 5 7 1 52 ___ RaB 122 22 __ _ _ IARE Z RA R3BP gt IARE m DS Zm R3A RB LT TSCLKO SD _ a a ae ening m oe r af ano pnp 5 Sean 10522 na n 51_2 Ra gt 8 l Bs paa
38. on page 1 9 SDRAM Interface on page 1 11 Parallel Flash Memory Interface on page 1 11 eMMC Interface on page 1 12 SPI Interface on page 1 13 Parallel Peripheral Interface PPI on page 1 15 Rotary Encoder Interface on page 1 15 Ethernet Interface on page 1 16 Audio Interface on page 1 17 ADSP BF518F EZ Board Evaluation System Manual 1 1 ADC Interface on page 1 18 UART Interface on page 1 19 RTC Interface on page 1 20 LEDs and Push Buttons on page 1 21 JTAG Interface on page 1 22 Land Grid Array on page 1 22 Expansion Interface II on page 1 23 Power Measurements on page 1 24 Power On Self Test on page 1 24 Example Programs on page 1 25 Background Telemetry Channel on page 1 25 Reference Design Information on page 1 25 For information about VisualDSP including the boot loading target options and other facilities refer to the online Help For more information about the ADSP BF518F Blackfin processor see documents referred to as Related Documents 1 2 ADSP BF518F EZ Board Evaluation System Manual Using ADSP BF518F EZ Board Package Contents Your ADSP BF518F EZ KIT Lite evaluation system package contains the following items ADSP BF518F EZ Board VisualDSP Installation Quick Reference Card CD containing v VisualDSP software v ADSP BE518F EZ Board debug software
39. pins The three LEDs labeled LED1 through LED3 are accessed via the PH3 PH5 and PH6 pins of the processor respectively For information on how to program the flag pins refer to the ADSP BF51x Blackfin Processor Hard ware Reference is shared with the ADC A0 MMC 07 and OTP EN signals LED2 is shared with the CDG and ADC A1 signals LED3 is shared with the CZM and ADC_A2 signals The LED1 3 signals also connect to the expansion interface II connectors See Expansion Interface II Connector J1 on page 2 25 and Expansion Interface II Connectors P2 and P4 on page 2 27 for more information The two general purpose push buttons are labeled PB1 and P82 The status of each individual button can be read through programmable flag inputs PHO and PH1 The flag reads 1 when a corresponding switch is being pressed When the switch is released the flag reads 0 A connection between the push buttons and processor inputs is established through positions 1 amp 2 of the DIP switch 512 Push buttons 1 and 2 of SW2 are used as GPIO signals the expansion interface II connectors 91 P2 To use the PHO and PH1 port pins as GPIO signals on the expansion interface II turn SW2 to all OFF 1 is shared with the DRIPRI and MMC 04 signals PB2 is shared with the RFS1 and MMC D5 signals An example program is included in the ADSP BF518F installation direc tory to demonstrate functionality of the LEDs and push
40. the software in the order presented in the VisualDSP Installation Quick Reference Card Substitute instructions in step 3 with instructions in this section There are two options to connect the EZ Board hardware to a personal computer PC running VisualDSP 5 0 via an Analog Devices emula tor or via a standalone debug agent module The standalone debug agent allows a debug agent to interface to the ADSP BF518F EZ Board The standalone debug agent is shipped with the kit 1 4 ADSP BF518F EZ Board Evaluation System Manual Using ADSP BF518F EZ Board UARTO SETUP ETHERNET CFG 5 19 ENCODER ENABLE ETHERNET MODE us Ee Ms moe 11 14 LED 7 JP12 gt PORT 1 CFG Jeie LED SELI FLASH ENBL OTP FLAG ENBL sa Em Swis ETHERNET PORT 2 CFG swar Em RANGE m SPORT 1 ENBL FLASH WP m JP21 SPORT 0 ENBL eMMC ENBL cme cm Cm p MIC GAIN Em Exe AUDIO MODE 5 5 SELECT 15 Figure 1 1 Default EZ Board Hardware Setup ADSP BF518F EZ Board Evaluation System Manual 1 5 EZ Board Session Startup To connect the EZ Board to a PC via an emulator 1 Plug the 5V adaptor into connector 43 labeled 5v 2 Attach the emulator header to connector P1 labeled JTAG on the back side of the EZ Board To connect the EZ Board to a PC via a standalone debug agent The debu
41. the three position rotary enable switch 5419 For more information see Encoder Enable Switch SW19 on page 2 14 An example program is included in the EZ Board installation directory to demonstrate how to set up and access the rotary encoder interface Ethemet Interface The ADSP BF518F processor has an integrated Ethernet MAC with media independent interface MII which connects to an external PHY The EZ Board provides a Micrel KSZ8893M Integrated 3 Port 10 100 Managed Switch with PHYs fully compliant with IEEE 802 3u standards The KSZ8893M chip supports 10 5 and 100BASE TX operations The part is attached gluelessly to the processor The Ethernet signals are shared with the PPI signals connected to the expansion interface II The Ethernet mode is set by three switches Switch SW7 controls the con figuration of the port 1 connector SW7 configures the flow control duplex speed and auto negotiation Switch 5118 controls the configura tion of the port 2 connector SW18 configures the flow control duplex speed auto negotiation auto MDI MDI X and MDI MDI X settings Switch SW8 controls the Ethernet IC configuration 548 configures the flow control hardware pin overwrite and serial bus mode See Ethernet Port 1 Configuration Switch SW7 on page 2 11 Ethernet Port 2 Con figuration Switch SW18 on page 2 14 and Ethernet Configuration Switch SW8 on page 2 11 for more information The Ethernet chi
42. v USB driver files v Example programs v ADSP BF518F EZ Board Evaluation System Manual Universal 5 0V DC power supply 256 MB SD card 7 foot Ethernet patch cable Two 6 foot 3 5 mm male to male audio cables 18 inch SMA to SMA coaxial cable If any item is missing contact the vendor where you purchased your EZ Board or contact Analog Devices Inc ADSP BF518F EZ Board Evaluation System Manual 1 3 Default C onfiguration Default Configuration The ADSP BF518F EZ Board board is designed to run outside your per sonal computer as a stand alone unit You do not have to open your computer case The EZ Board evaluation system contains ESD electrostatic discharge sensi tive devices Electrostatic charges readily accumulate on the human body and equipment and can discharge without detection Permanent damage may A occur on devices subjected to high energv discharges Proper ESD precautions are recommended to avoid performance degradation or loss of functionalitv Store unused EZ Board in the protective shipping package When removing the EZ Board from the package handle the board care fully to avoid the discharge of static electricity which can damage some components Figure 1 1 shows the default jumper and switch settings connector locations and LEDs used in installation Confirm that your board is in the default configuration before using the board EZ Board Installation For correct operation install
43. 02 AGND AUDIO CLK PER R54 FER9 R60 100 600 33 0402 0603 0402 3 AUDIO_CLK GND C73 R250 0 01UF OSC003 0402 TS R55 R48 47 0K gt 47 0K C82 C83 C84 C85 0402 0402 100PF 100PF 100PF NEN 100PF 0603 0603 0603 0603 e e icu AGND 3 3V __ AGND Y 21 330 L8 ee s 0805 T 0402 SPORTO ENBL 58 1000 SWAB o L SPI TWI 10K 0805 7777 TFSUSD S CODES DAGURC 777 x pire DTOPRISD CI 2 7777 ite dria ERE C78 i DHOPRUSD B i 2 I was 0 SSELSICUD me css TOO0PF 2 42 325 742252220 0805 C OOO BESUSD Di gt NI o CODEC _____ m ae DNP i TSCLK0SD C PLN pops SPI 2 m 9 COO BS LKo sb_bi 2 m SUA CO FH gt e ANALOG 20 coton Road 5 B SWTO17 i SPIO SEK i m B Nashua NH 03063 men SCL e M SCLK 5 2 DEVICES PH 1 800 ANALOGD SWT017 Title SW15 disconnects DSP from AUDIO CODEC ADSP BF51 EZ BOARD AUDIO CODEC MODE INTERFACE AUDIO CODEC SPI MODE ON OFF ON OFF Si nee TWI MODE OFF ON OFF ON C A0217 2008 02 Date 12 10 2008 14 21 Sheet 6 of 16
44. 1 0K 0402 0402 PHY mode MII 422 Power Down SHORTING JUMPER DEFAULT NOT INSTALLLED PxLEDO SPEED FULL DPX SPEED R94 1 0K 0402 I eee PILED E 3 3V KA LED10 R95 YELLOW 270 LED009 0603 MM jp 210501 4 LED11 R96 YELLOW 270 LED009 0603 i 1 4 LED12 R97 YELLOW 270 LED009 0603 i mg PIED 4 LED4 R98 YELLOW 270 LED009 0603 asua sa q E prO sod 4 LEDS R99 YELLOW 270 LED009 0603 P2LEDO L Y LED6 R100 YELLOW 270 LED009 0603 P2LED1 meam Y LED7 R101 YELLOW 270 LED009 0603 s gt AA m P2LED2 biki Y LED8 R102 YELLOW 270 LED009 0603 x aln 4 ANALOG 20 Cotton Road Nashua NH 03063 DEVICES PH 1 800 ANALOGD Title ADSP BF518F EZ BOARD ETHERNET CONFIG LEDS A0217 2008 Rev 0 2 Date 12 10 2008 14 21 Sheet 16 VOC3A SW m U28 J15 J L IXPI 1 0 y Tx 18 1 e 2 E 2 NI 3 we 1CT4CT 4 5 lt
45. 1 JP3 JP11 14 FCI 90726 402HLF IDC2X1 38 13 IDC 3X1 JP15 JP17 28 FCI 90726 403HLF IDC3X1 39 1 RESETABLE F1 TYCO SMD300F 2 FUS004 40 24 IDC SJ1 24 DIGI KEY 9001 ND 2PIN JUMPER SHORT 41 1 PWR 65MM 3 CUI 045 0883R CON045 42 2 3 5MM J4 5 SWITCHCRAFT 35RAPC7JS DUAL STEREO CONO050 43 1 SD CONN 9PIN J13 DIGI KEY 401 1954 ND CONO51 ADSP BF518F EZ Board Evaluation System Manual A 3 Ref Qty Description Reference Manufacturer Part Number Designator 44 2 RJ45 8PIN J14 15 DIGI KEY 380 1022 ND CON_RJ45_12P 45 3 MOMENTARY SW11 13 PANASONIC EVQ Q2K03W SWT024 46 1 ROTARY_ENC_ SW14 PANASONIC EVQ WKAO001 EDGE SWT025 47 1 QMS 52x2 JI SAMTEC QMS 052 06 75 L D A 52 2_5 48 2 IDC 25 2 P2 P4 SAMTEC TSSH 125 01 L DV A IDC25x2_SMTA 49 1 IDC 35x2 P3 SAMTEC TSSH 135 01 L DV A IDC35x2 SMTA 50 1 IDC 7x2 P1 SAMTEC TSM 107 01 T DV A IDC7x2 SMTA 51 1 BATT_HOLDER J12 MEMORY PRO BH600 16MM TECTI BATT COI 52 2 IDC 2X1 JP4 JP16 SAMTEC TSM 102 01 T SV IDC2X1_SMT 53 1 ROTARY SW1 COPAL S 8010 SWT027 54 3 YELLOW LED 1 3 PANASONIC LN1461C LED001 55 2 100 1 10W 5 R165 R167 VISHAY CRCW0805100RJNEA 0805 56 11 600 100MHZ FER2 9 FER12 DIGI KEY 490 1014 2 ND 200MA 0603 14 57 2 600 100MHZ FERI5 16 STEWARD HZ1206B601R 10 500MA 1206 58 2 10UF 16V 2096 CT1 2 PANASONIC EEE1CA100SR 002 4 ADSP BF518F EZ Board Evaluat
46. 18F EZ Board Evaluation System Manual 1 3 INDEX PH2 programmable flag 2 6 PH3 programmable flag 1 21 2 6 2 18 2 22 PH4 programmable flag 2 6 PH5 6 programmable flags 1 21 2 6 2 22 PH7 programmable flag 2 6 POST power on self test program 1 12 1 19 l 24 2212 power 5V wall adaptor P14 1 3 connector J3 1 6 2 25 LED 013 2 23 measurements 1 24 PPI interface connections 1 15 expansion interface II connector P3 1 15 2 28 programmable flag inputs PHO 1 1 21 R real time clock 1 20 2 3 Reduced Instruction Set Computing RISC xi reference design info 1 25 removable secure interface RSI 1 12 reset LED LED9 2 22 push button SW11 2 12 restrictions of evaluation license 1 8 RFS1 signal 1 21 rotary encoder interface 1 15 enable switch SW19 1 15 2 14 with momentary switch SW14 2 13 RS 232 connector J2 2 25 RTC pin 1 20 S schematic of ADSP BF518F EZ Board B 1 SD connector 13 2 26 SDRAM interface 1 10 1 11 secure digital SD interface 1 12 1 13 serial peripheral interconnect SPI ports See SPI interface session startup procedure 1 6 SMA connectors J7 J16 26 2 26 SPIO_SSEL2 signal 2 18 SPI flash CS enable jumper JP 16 2 18 SPI interface connections 1 13 SPI TWI switch SW16 1 17 SPISELI signal 1 14 SPISEL2 signal 1 13 SPISEL3 signal 1 14 SPORTO enable switch SW15 1 17 2 13 SPORTI enable switch SW4 1 18
47. 2 9 SRAM memory 1 9 SSM2602 audio codec U1 2 13 standalone debug agent xii 1 4 1 6 1 8 1 11 1 22 SW10 UARTO setup switch 2 12 SW11 reset push button 2 12 SW12 13 IO push buttons 2 12 SW14 rotary encoder with momentary switch 2 13 SW15 SPORTO enable switch 1 17 2 13 SW16 SPI TWI config switch 1 17 2 13 SW17 Ethernet mode switch 2 14 SW18 Ethernet port 2 config switch 1 16 2 14 SW19 encoder enable switch 1 16 2 14 SW 1 boot mode select switch 1 12 1 14 2 8 SW20 21 eMMC enable switches 1 12 SW20 eMMC enable switch 2 15 SW21 eMMC enable switch 2 15 SW22 23 test switches 1 19 2 15 SW2 push button enable switch 1 21 2 8 2 13 SW3 flash enable switch 2 9 SW4 SPORTI enable switch 1 18 2 9 SW5 mic gain switch 1 17 2 10 I 4 ADSP BF518F EZ Board Evaluation System Manual SW6 mic select switch 1 18 2 10 SW7 Ethernet port 1 config switch 1 16 2 11 SW8 Ethernet config switch 2 11 switches diagram of locations 2 7 system architecture of this EZ Board 2 2 T thumbwheel control xiv TWI config switch SW8 1 17 U UARTO interface expansion interface II connectors P2 1 19 2 27 reset push button SW11 2 12 setup switch 55 10 2 12 UARTI interface enable switch SW14 2 12 expansion interface II connectors P4 1 19 2 27 RX signal 2 12 2 18 2 19 UARTI TX signal 2 12 2 18 2 19 U Boot universal
48. 3 3V 42 1 SW1 A NS yf BMODEO m 54 BMODEL fF IN TASTID gt TRST ko MEI D 0 BMODE2 A Lr 9 59 tus R12 51 n 33 R9 L EMU EMU W Di 0402 0 53 ROTARY cM d A A EST TCK gt 0402 B 0402 L ICK E VANS COMUNIS 7564 CI VHZ P 52 _ OSC003 L gt gt TDI ADSP BF5T8F LQFP176 SOCKET 5 DSPRTIXI RTXO E SW1 Boot Mode Select Switch POSITION BOOT MODE 810 m pud 0 Idle No Boot 71 Default 1 Boot from 8 or 16 bit external flash memory 2 Boot from internal SPI memory u3 C153 3 Boot from external SPI memory reRwe TERMI e 4 Boot from SPIO host 2 5 Boot from OTP memory C2 C3 6 Boot from SDRAM 18PF 0 008 18PF 0805 0805 Bootifrom host AN Al O 20 Cotton Road Nashua NH 03063 DEVICES 1 800 anatoep Title ADSP BF518F EZ BOARD RTC DSP EBIU CONTROL Size Board No A0217 2008 Rev Date 12 17 2008_11 04 Sheet 2 of 16 A B C D B C D 1 m e ITVDDEXT L C7 C37 C6 C5 C4 C39 8 C22 21 24 C38 m U12 10U
49. 4 dB ON OFF OFF OFF 1 0 dB OFF ON OFF OFF 0 5 6 dB OFF OFF ON OFF default Unused OFF OFF OFF OFF Mic HP LPBK Audio Mode Switch SW6 The 506 switch places the EZ Board a loopback to test the board for signal circuit continuity and functionality 546 positions 1 amp 2 connect the MICIN signal to the headphone s left and right outputs for audio loopback Do not turn SW6 positions 1 amp 2 ON at the same time See Power On Self Test on page 1 24 for more information SW6 positions 3 amp 4 select the control interface for the audio codec SW6 positions 3 ON and 4 OFF select the SPI interface while position 3 OFF and position 4 ON select TWI mode By default SW6 is OFF OFF ON OFF See SPI TWI Switch SW16 on page 2 13 for more information 2 10 ADSP BF518F EZ Board Evaluation System Manual Ethemet Port 1 Configuration Switch SW7 ADSP BF518F EZ Board Hardware Reference The Ethernet port 1 configuration switch SW7 is used to configure cer tain Ethernet settings related to port 1 via hardware instead of software see Table 2 8 Table 2 8 Ethernet Port 1 Configuration Switch SW7 SW7 Position Default Description Position Function 1 ON Force flow control OFF Disable Enable 2 ON Force full half OFF Half duplex 0 Full duplex 3 ON Force speed OFF 10BaseT 0 100BaseTX 4 OFF Auto negotiation OFF Enable 0 Disable
50. 7 JP6 mic select 1 17 P10 VDDMEM power 1 24 2 20 P11 VDDFLASH power 1 24 2 20 P17 28 ADC channel select 1 19 P8 VDDINT power 1 24 2 19 P9 VDDEXT power 1 24 2 19 K KSZ8893M PHY device 2 14 L land grid array connectors P5 7 1 22 2 28 LEDs diagram of locations 2 21 LED10 12 Ethernet 2 22 LED1 3 PH3 5 6 1 21 2 22 LED4 8 Ethernet 2 22 LED4 USB monitor 1 6 LED9 reset 2 22 power LED 13 2 23 LED select jumpers JP11 12 2 17 license restrictions xii 1 8 INDEX M MAC address 1 16 media independent interface MII 1 16 Media Instruction Set Computing MISC xi memory map of this EZ Board 1 9 MICBIAS signal 2 18 MICIN signal 2 18 microphone gain switch SW5 2 10 headphone select SW6 1 18 2 10 select jumper JP15 1 17 2 18 SPI TWI switch 55 8 1 17 Micro Signal Architecture MSA xi MMC signals 1 21 N notation conventions xxi oscilloscope 1 24 OTP_EN signal 1 21 OTP flag enable jumper JP 14 2 18 OTP memory writes 2 18 package contents 1 3 parallel flash memory xiii 1 11 See also NAND flash memory parallel peripheral interface PPI See PPI interface PFO 7 programmable flags 2 3 PF8 programmable flag 2 3 PF9 15 programmable flags 2 3 0 10 programmable flags 2 5 PG11 programmable flag 2 5 PG12 programmable flag 2 5 PG13 15 programmable flags 2 5 PHO 1 programmable flags 1 21 2 6 2 12 ADSP BF5
51. ADSP BF518F EZ Board Evaluation System Manual Revision 1 0 January 2009 Part Number 82 000217 01 Analog Devices Inc One Technology Way ANALOG Norwood Mass 02062 9106 DEVICES Copynght Information 2009 Analog Devices Inc ALL RIGHTS RESERVED This docu ment may not be reproduced in any form without prior express written consent from Analog Devices Inc Printed in the USA Disclaimer Analog Devices Inc reserves the right to change this product without prior notice Information furnished by Analog Devices is believed to be accurate and reliable However no responsibility is assumed by Analog Devices for its use nor for any infringement of patents or other rights of third parties which may result from its use No license is granted by impli cation or otherwise under the patent rights of Analog Devices Inc Trademark and Service Mark Notice The Analog Devices icon bar and logo VisualDSP the VisualDSP logo Blackfin the Blackfin logo the CROSSCORE logo EZ KIT Lite and EZ Extender are registered trademarks of Analog Devices Inc EZ Board is a trademark of Analog Devices Inc other brand and product names are trademarks or service marks of their respective owners Regulatory Compliance The ADSP BF518F EZ Board is designed to be used solely in a laboratory environment The board is not intended for use as a consumer end prod uct or as a portion of a consumer end product The board is an open
52. ANGE SELECT TYPE 0402 0402 0x2030 0000 0x203F FFFF ASYNC BANK 3 FLASH U9 8 0x2020 0000 0x202F FFFF ASYNC BANK 2 FLASH Mun d cp MOSII i 0x2010 0000 0x201F FFFF ASYNC BANK 1 FLASH E E LEE d 5 anaes 0x2000 0000 0 200 FFFF FLASH e ts 0x0000 0000 FFFF NONE SDRAM JP16 a lt a 1 2 9 WP 3 3V JAHN Y AMSS SPIO SEL21 pn TLLA O IDC2XT_SMT oLD GND SPI FLASH CS ENBL s x SJ9 2 SHORTING JUMPER DEFAULT NOT INSTALLED A N A LOG 20 Cotton Road cour G iUF GOlUF 10K 0402 1 0400 0402 71 0402 0402 C46 e E I E Nashua NH 03063 DEVICES i 800 ANALocD e e e Title ADSP BF518F EZ BOARD lt KI EXTERNAL MEMORV Size Board No Rev C A0217 2008 02 Date 1 16 2009 12 36 Sheet 4 of 16 DIFFERENTIAL
53. BARNENN N DP SWT018 SWT Port 1 Configuration Switch Switch Description Position Function 1 Force Flow Control OFF Disable ON Enable 2 Force Full Half OFF Half Duplex ON Full Duplex 3 Force Speed OFF 10BaseT ON 100BaseTX 4 Auto Negotiation OFF Enable ON Disable PORT 2 CFG SW18 r Prom NE PLPXN CN 1 BEEN NI 9 L PANNI 1 PAMDXDISNE S4 DIP6 SWTO17 SW18 Port 2 Configuration Switch Switch Description Position Function 1 Force Flow Control OFF Disable ON Enable 2 Force Full Half OFF Half Duplex ON Full Duplex 3 Force Speed OFF 10BaseT ON 100BaseTX 4 Auto Negotiation OFF Enable ON Disable 5 Auto MDI MDI X OFF Enable ON Disable 6 MDI MDI X Setting OFF MDI X ON MDI 3 3V CONFIG ETHERNET R117 R115 R87 10K 10K 10K 0402 0402 0402 SW8 L gp LLBWPOVENE NU OE f 34 DP 2 SWT018 R116 1 0K 0402 SW8 Ethernet Configuration Switch Switch Description Position Function 1 Advertise Flow Control OFF Disable ON Enable 2 Hardware Pin Overwrite OFF Enable ON Disable 3 4 Serial Bus Mode OFF OFF Not Used OFF ON TWI Slave ON OFF SPI Slave ON ON Not Used L PS ME n L PSO R271 R272 1 0K 1 0K 0402 0402 3 3V A R89 10K v evi ccm 1 JP13 SCONFIGO NU nen P i SCONFIG1 B R88 R105 1 0K
54. Board The ADSP BF518F processor has internal static random access memory SRAM used for instructions and data storage See Table 1 1 The inter nal memory details can be found in the ADSP BF51x Blackfin Processor Hardware Reference The ADSP BF518F EZ Board includes four types of external memory synchronous dynamic random access memory SDRAM serial peripheral interconnect SPI flash parallel flash and eMMC See Table 1 2 For more information about a specific memory type go to the respective sec tion in this chapter Table 1 1 EZ Board Internal Memory Map Start Address Content 0000 BOOT ROM 32K BYTE OxEFOO 8000 Reserved OxFF80 0000 DATA BANKA SRAM 16K BYTE OxFF80 4000 DATA BANKA SRAM CACHE 16K BYTE OxFF80 8000 Reserved OxFF90 0000 DATA BANKB SRAM 16K BYTE OxFF90 4000 DATA BANKB SRAM CACHE 16K BYTE OxFF90 8000 Reserved OxFFAO 0000 INSTRUCTION BANK A SRAM 16K BYTE OxFFAO 4000 Reserved OxFFAO 8000 INSTRUCTION BANK B SRAM 16 BYTE OxFFAO C000 Reserved OxFFA1 0000 INSTRUCTION SRAM CACHE 16K BYTE OxFFA1 4000 Reserved ADSP BF518F EZ Board Evaluation System Manual 1 9 Table 1 1 EZ Board Internal Memory Map Contd Start Address Content OxFFBO 0000 SCRATCHPAD SRAM 4K BYTE OxFFBO 1000 Reserved OxFFCO 0000 SYSTEM MMR REGISTERS OxFFEO 0000 CORE
55. C ERJ 2GEOR00X 206 R209 212 R214 215 R217 218 R221 222 R224 225 R227 228 R230 233 R235 236 R238 239 R267 71 10 22 1 16W 5 R146 151 R241 PANASONIC ERJ 2GEJ220X 0402 244 72 3 33 1 16W 5 R313 314 R325 VISHAY CRCW040233ROJNEA 0402 73 7 33 1 16W 5 R3 R12 R60 R66 VISHAY CRCW040233ROJNEA 0402 67 R78 R199 74 2 18PF 50V 5 C2 3 AVX 08055A180JAT2A 0805 75 2 2 2UF 10V 10 C150 151 AVX 0805ZD225KAT2A 0805 76 24 10PF 50V 5 C155 178 AVX 08055 100 2 0805 77 2 0 1UF 16V C40 C136 AVX 0603YC104KAT2A 10960603 A 6 ADSP BF518F EZ Board Evaluation System Manual ADSP BF518F EZ Board Bill Of Materials Ref Qty Description Reference Manufacturer Part Number Designator 78 5 1UF 16V 10 C79 81 C199 PANASONIC ECJ 1VB1C105K 0603 C208 79 1 68PF 50V 5 C144 AVX 06035A680JAT2A 0603 80 3 4 7UF 6 3V 20 C137 138 C141 PANASONIC ECJ 1VB0J475M 0603 81 1 470PF 50V 5 C143 AVX 06033A47 1JAT2A 0603 82 3 220UF 6 3V 20 CT3 4 CT6 SANYO 10TPE220ML D2E 83 1 10M 1 10W 5 R10 VISHAY CRCWO060310MOFNEA 0603 84 5 330 1 10W 596 R153 R157 160 VISHAY CRCW0603330RJNEA 0603 85 4 0 1 10W 5 0603 R52 53 R195 PHYCOMP 232270296001L R346 86 34 49 9 1 16W 1 R68 R71 77 R79 VISHAY CRCWO060349R9FNEA 0603 84 R118 126 R128 135 R137 139 87 15 10 1 10W 596 R166 R169 R207 VISHAY CRCW0603 10ROJNEA 0603 208 R213 R216 R219 220 R223 R226 R229 R234 R237 R240 R349 88 1 10 0K 1 10W 1
56. D11 PPIODIO f gt IETXDO 1 r PB2 RFS1 MMC_DS51 lt SPIMISO TIMER 5 _ 1 ADDR29 ADRS F 89 3 29 Bon eee 29 0 NM 32 lt C gt pPI0D13 PPIODI2 gt i scl gt 5 SDA lt gt ISDA ADDR31 ADDR30 F se 21 3 lt lt 22 31 200 5 gt gt i 33 L RMILPHVINTI gt PPIOD15 PPIODIA lt gt ETXEN L UARTOTXi gt UARTTX UARTRX UARTO RX lt AO WN 227777777775755 33 33 BA eee 36 B5 gece PPI0D17 PPIODI6 F UARTRTSUARTCTS P SEM ARE LO ARE p unARRYI 35 BAS eee 1 35 36 38 57 22 TSCLKO SD CLK lt _ gt gt _ TIMER2 GPIO TIMERt GPIO 22 IRSCLKO SD 01 H RESET 5 9 RESET lt AMS1 AMSO o 37 be UE EET Sig 3 ees 40 kg RESET gt RESET TIMER3 GPIO lt gt IUARTO TX PB1 DRIPRIMMC_D4 GPIO2 AMS3 SPIO SEL2 lt AMS3 AMS2 gt 52 1 ina 39 ko mener E suu em EU 39 umet 42 h1 derisum 1 PPHFS2 ADC AO LED1 MMO D7 OTP lt gt GPIO4 d ABE1 SDQM11 C ABE1 ABE0 gt ABE0 SDQMO I 41 m lt 41 maps ceca a Ea c PPHFS3 PPHCLK L WAKE RSVDI one 43 44 43 44 46 5 PPIID1
57. E Z III 39 eue d E 143 ___ ee MIITXCLK 9 7 PG2 MIITXCLK RMIIREF CLK DMARO PWM CL DSP CLKINIE CLKIN AWE gt 3 1 38 144 r DROPRI SD DO Zl 4 PG3 DROPRI RSI DATAO SPIO SSELS TACLK3 125 ee RSCLKO SD D1 Z lt gt 37 pG4lRSCLKO RSI DATA1 TMRS TACIS CLKOUT gt ICLKOUT 1 36 RFSO SD_D2_Z lt gt PGS RFSO RSI DATA2 PPICLK TMRCLK 1777 ATXI RTI TES0SD D8 Z lt gt PGe TFSO RSI DATAS TMRO PPIFS1 tok L DSP_RTXO m RTO GND TESTI DTOPRI SD ZI lt 33 pG7 DTOPRVRSI CMD TMR1 PPIFS2 gt _______TSCLKO SD_CLK ZI lt 34 P s TSCLKO RSI_CLK TMR6 TACI6 TP10 a 130 UARTO TX 2 lt 31 pgg DTOSEC UARTO_TX TMR4 MI EXT WAKE 199 1 iie intel 28 27 TPS B i UARTO RX ZI gt lt PG10 DROSEC UARTO_RX TACI4 NMI N DIN aaa usc ee 146 150 vu PEE L AMS2ZI lt 27 PG11 SPIO SS AMS 2JSPI1 SSELS TACLK2 _5 gt CLKBUF gt ICLKBUF _ 1 em 26 vaL MEER 2220 IIISmL lt PG12 SPI0_SCK PPICLK TMRCLK Pores A C gt Pg13 SPI0_MISO TMRO PPIFS1 I lt 21 5G14 SPIO_MOSI TMR1 PPIFS2 PWM_TRIPB band 777 AMSSISPIO SEL2K wn PG15 SPI0_SSEL2 PPIFS3 AMS 3 0 0402 3 3V BOOT MODE T A
58. Ethe met Configuration Switch SW8 The Ethernet configuration switch SW8 is used to configure certain Ethernet settings via hardware instead of software see Table 2 9 Table 2 9 Ethernet Configuration Switch 55 8 SW8 Position Default Description Position Function 1 ON Advertise flow control OFF Disable ON Enable 2 ON Hardware pin overwrite OFF Enable ON Disable 3 4 ON OFF Serial bus mode OFF OFF Not used OFF ON TWI slave ON OFF SPI slave ON ON Not used ADSP BF518F EZ Board Evaluation System Manual Push Button and Switch Settings UART Setup Switch SW10 The UART setup switch SW10 configures the UARTO signals from the GPIO pins of the processor Position 4 is used to place the UARTO port of the processor in a loopback condition The jumper connects the UARTO TX line of the processor to the UARTO_RX signal of the processor This is required when a POST program is run to test the serial port interface By default SW10 is ON OFF ON OFF Reset Push Button SW11 The reset push button SW11 resets the following ICs Processor 012 parallel flash U5 and Ethernet IC U4 The reset push button does not reset the following ICs SDRAM 014 eMMC 016 Audio codec U1 UARTO U21 schmitt trigger hex inverter U6 Digipot U7 power VR1 5 The reset push button does not reset the standalone debug agent once the debug agent is connected to a personal c
59. F 10UF 04UF OMUF 01UF O4UF 0 01UF 0 01UF 0 01UF 0 01UF 0 01UF 0 01UF 0805 717 0805 002 0402 0402 0402 0402 0402 0402 0402 0402 71 0402 VDDEXT1 24 b e VDDEXT2 o PV DDEXT3 GND GND 28 5 e __ GND6 e S yppExr7 5 145 VDDEXT9 o m GNDIO a eem 170 DDEXTHA GND 88 12 59 89 C10 C16 C9 C25 C19 C18 C20 17 C27 C26 9 10UF 10UF 0 1UF 0 1UF 0 01UF 0 01UF 0 01UF 0 01UF O 01UF 0 01UF SS ANA Sania 0805 0805 0402 0402 0402 0402 0402 0402 0402 0402 e vppmema 59 e pDMEM4 GNpD16 e 00 GND173 gt Kg e GNDi8 2 I7 VDBINT 1 4 GNDI9 ee 124 DDMEM8 enp20 34 ____ GND2137 o e 99_ e GND23 29 LI d 30 151 NDDINT3 GND24 e e S8ppiNT4 GND25 57 ___ 79 163 e GND26 e 98 169 C15 C14 C13 C12 c11 C31 C30 C32 C29 C33 C28 C36 9 T 100 O1UF 0
60. HERNET PD J apc RANGE FLASH WP M JP18 MIC SELECT JPIS Figure 2 3 Configuration Jumper Locations 2 16 ADSP BF518F EZ Board Evaluation System Manual ADSP BF518F EZ Board Hardware Reference Flash WP J umper J The flash WP jumper JP3 is used to write protect block 70 of the paral lel flash chip Block 70 contains 64 KB of configuration data at address range 0x203 0000 0 203 FFFFF When the jumper is installed on and the parallel flash driver from Analog Devices is used block 70 is read only By default JP3 is installed ADC Range J umper J P4 The ADC range jumper JP4 is used to select the range of the input signal to the ADC The jumper determines whether the input range for the ADC is 2 5V or 5 V The max voltage range for a signal connected to the SMA connector is 0 5V Any voltage outside of this range can damage the EZ Board By default JP4 is installed LED Select J umpers J P11 12 The LED select jumpers JP11 and JP12 are used to configure how Ether net status is reported on the LEDs By default JP11 is installed and JP12 is not installed The LEDs can be used to report the status of the link activity on the line duplex mode speed and collisions For more informa tion about the LEDs refer to the KSZ8893M data sheet provided by the product manufacturer Ethemet Power Down J umper J The Ethernet power down jumper JP13
61. I Encoder Enable Switc h SW19 The encoder enable switch SW19 disconnects the rotary encoder signals from the GPIO pins of the processor When SW19 is OFF its associated GPIO signals can be used on the expansion interface II see Table 2 11 2 14 ADSP BF518F EZ Board Evaluation System Manual ADSP BF518F EZ Board Hardware Reference Table 2 11 Encoder Enable Switch SW19 SW19 Position Default From To 1 OFF Encoder SW14 Processor U1 PF13 2 OFF Encoder SW14 Processor U1 PF12 3 OFF Encoder SW14 Processor U1 PF11 eMMC Enable Switch SW20 21 The eMMC enable switches 5020 and SW21 connect the RSI signals to the on board eMMC memory device The eMMC interface and the SD interface share the same signals therefore no card should be inserted into the SD connector when the eMMC device is used The default for the switches is all OFF so that the SD connector can be used ADC Loopback Switc hes SW22 23 The ADC loopback switches 522 and SW23 are used for testing only The switches are used to send an analog signal generated from the codec to the ADC circuit for evaluation ADSP BF518F EZ Board Evaluation System Manual 2 15 Jumpers Jumpers This section describes functionality of the configuration jumpers Figure 2 2 shows the jumper locations JP JP14 LED JPI2 JPISL JI LED sett FLASH ENBL FLAG ENBL ET
62. I MMC D6 Z 015 lt 2 PF8 MDC PPID8 SPI1_SSEL4 159 3 PH3 DT1PRI SPI1_MOSI RSI_DATA7 gt ADC_A0LED1 MMC_D7 OTP_EN 2 U lt gt 9 PF9 RMIIMDIO PPID9 TMR2 156 pou Minimi inti 174 PH4 TFS1 AOE SPIO SSEL3 CUD gt gt SPIO_SSEL3 CUD_Z ABE1 SDQM1 gt IABE1 SDQM1_Z L lt 0 PF10 ETXD0 PPID10 TMR3 155 Sioa ae See 109 __ _ __ _ _ _ _ 171 PHS TSCLK1 ARDV ECLK CDG 22 gt ICDG ADC AT LED2 2 ABEO SDQMO gt IABEOR SDQMO 2 i ERXDOI lt 2 PF11 ERXDO PPID11 PWM_AH TACI3 154 Te 55355852 MD d 168 PH6 DT1SEC UART1_TX SPI1_SSEL1 CZM gt ICZM ADC_A2 LED3_Z _ 1 9 9 PFI2 ETXD1 PPID12 PWM AL 153 119 167 PH7 DR1SEC UART1_RX TMR7 TACI2 gt gt gt DRiSEC_Z L _SCKE Zi lt I ERXDII lt gt H PF13 ERXD1 PPIDIS PWM_BH ern mre SWE Zi lt ETXENI 0 gt 168 pF14 ETXEN PPID14 PWM_BL __ 21 lt 1105110 51120 gt JAMSLZ 1 lt gt 169 PF15 RMIL PHYINT PPID15 PWM SYNC 177 S6A8 71 lt scoas AMSQ 29 IAMSO 2 1 L SRAS 21 lt 22777 MIICRS HWAT gt 5 PG0 MIICRS RMIICRS HWAIT SPI1_SSEL3 SMS Zi lt 1185 5 421 _ ERXERI lt gt 11 GI ERXER DMART PWM CH IAR
63. L 5 UNUSED3 e R62 pps 1 0 i ETXD lt gt f_ UNUSEDA e 0402 4 l 4 4 ia R354 P1ANEN UNUSEDS 02 pene mg 0402 P1SPD UNUSED6 03 R70 ISMIXD3 1 104 100 RBA 777 5 1 UNUSED7 0402 AGND 0603 P1FFC uNusEpa 05 CHN P2ANEN LZ o LL LLILL ZIMMER P2SPD UNUSED1 VCCO SW VCCA SW IVCCPLL sw 71 2 UNUSED1 110 m FeR reni 600 600 P2FFC uNusEpi2 1 e 0603 0603 P2MDIX UNUsED13 e e e e P2MDIXDIS UNUSED14 13 9 _ 4 12 114 C95 C96 C97 C98 C99 C100 C106 C105 C104 _ ADVFCI iO ovre UNUSEDIS 10UF 0 01UF 0 01UF 10UF 0 01UF 0 01UF 10UF O 01UF DUE 0402 0402 0805 717 0402 71 0402 0805 RMIIEN UNUSED16 0805 IHWPOVR HwPovR UNUsED17 18 e Mui 89 117 e e e e e e SCONFIGO L SCONFIGO UNUSED18 e 11 aay coNFigt gt SSsGCONFIG1 UNUSED19 9 e gt 150 UNUSED20 9 e N 7 AGKD ipsi UNUSED21 20 e UNUSED22 2 ___ IPWRDN 12 PWRDN UNUSED23 2 e R61 125 1 0K R86 R85 dc 0402 10K 10K 0402 0402 IRESET 15 RESET UNUSED25 7 e AAAA M 4 R69 L LKBUFI 884 1 0 mS 66
64. MMR REGISTERS Table 1 2 EZ Board External Memory Map Start Address End Address Content 0x0000 0000 OxO3FF FFFF SDRAM SDRAM 0x0800 0000 OxIFFF FFFF Reserved 0x2000 0000 0x200F FFFF ASYNC memory bank 0 flash 0x2010 0000 Ox201F FFFF ASYNC memory bank 1 flash 0x2020 0000 0x202F FFFF ASYNC memory bank 2 flash 0x2030 0000 0x203F FFFF ASYNC memory bank 3 flash 0x2040 0000 OxEEFF FFFF Reserved ADSP BF518F EZ Board Evaluation System Manual Using ADSP BF518F EZ Board SDRAM Interface The ADSP BF518F processor connects to a 64 MB Micron MT48LC32M16A2TG 75 chip through the external bus interface unit EBIU The SDRAM chip can operate at a maximum clock frequency of 80 MHz which is the ADSP BF518F processor limitation With a VisualDSP session running and connected to the EZ Board via the USB standalone debug agent the SDRAM registers are configured automatically each time the processor is reset The values are used when ever SDRAM is accessed through the debugger for example when viewing memory windows or loading a program To disable the automatic setting of the SDRAM registers select Target Options from the Settings menu in VisualDSP and uncheck Use XML reset values For more information on changing the reset values refer to the online Help An example program is included in the EZ Board installation directory to demonstrate how to setup and acce
65. PIA 2 18 MEL Jamper TIE 19 siaran 2 18 orl FLASH CS Enable Jumper is ita 2 18 ADC Channel Select Jumpers 1 7 28 iasissiesessasetiaresst tata 2 19 Power Jumper 2 19 YDDEXT Power pimper 2 19 VDDMEM Power Jamper PIO 2 20 YDDPFLASH Power Jumper uu l u as ena HER 2 20 EEDS EP 2 21 GPO LED D u u d a 2 22 Ethernet LEDs LED4 8 LED10 12 2 22 2522 Power LED LEO sad bd qi 2 23 PEE T 2 24 Expansion Ineerisce II Connector THO 2 25 i Comieco CIE sercar A 2 25 Power Connector J3 2 25 Dual Audio Connectors J4 5 0002 2 000000320 2 26 SMA Connectors JZ 10 3 2 26 Daten 2 26 viii ADSP BF518F EZ Board Evaluation System Manual CONTENTS SI Connor 2 26 Esherner Connectors 1114 15 2 27 JTAG Connector PI 2 27 Expansion Interface II Connectors P2 and P4 2 27 Expansion Interface H Connector P3 2 28 DMAX Land Grid Array Connectors P5 7 2 28 Standalone Debug Agent Connector 7 1 ien 2 29 ADSP BF518F EZ BOARD BILL OF MATERIALS ADSP BF518F EZ BOARD SCHEMATIC y p
66. PRI 14 gt IDROPR SD DO _____ EHE ADDR15 ADDR14 iets od e nen 15 16 porc cr 15 16 18 17 AMSS SPIO SEL2 lt gt PPIOFS3 PPIOCLK lt gt IRFSO SD D2 1 p UARTO TX 2 DTSEC gt IUARTO ADDR17 ADDR16 EM 2 22 22 20 19 i AT i ERXD I C5 PPI0D1 ppiopo lt 1 TSCLKO SD GLK gt 8 gt TRSCLKO SD_D1 ADDR19 ADDR18 up ns nn e 222 52 22252 4 22 bi I _ ERXDSI lt gt propa ppiop2 22 lt gt TFSO SD_D3i 2 3 TFS 20 gt IRFSO SD_D2 f ADDR21 ADDR20 f ffe pn 24 ba 9 27 PPI0D5 PPlopa P2 O 1 12222 CZWADC 5 SPISELI sPISEL lt IMICRSHWAT U 1 ADDR23 ADDR22 pomum Te ET 23 ba SMe Tn 23 24 SI n sp ma I 26 b5 NN SPIO SSELII lt gt gt r PPIOD7 F gt 1001 AMS2 f gt SPISEL3 SPICIK IRSCLK1 MMC_D6 _____ ADDR25 ADDR24 25 b6 22254 M M EE 25 28 27 L _ lt gt 7 PPIOD9 008 F gt 22 22 2222 ADC AULEDIMMC D7 OTP gt SPIMOSI SPISS D4 _______ I ADDR27 ADDR26 F 25224 27 2 22 27 bg Ta l 30 29 _ ERXDOI lt gt PPI0
67. Programinable lap sirena 2 ssSusssss 2 3 Push Button aud Swich par ss 2 7 Boot Mode Select Switch SWI eee 2 8 PB Enable Switch SWI uuu u u Qu lasla 2 8 Flash Enable Serta SW 5 2 9 SPORT Enable Switch SW teer 2 9 MIC Gam Sensi Deui ids 2 10 LPBK Audio Mode Switch SW 26 2 10 Ethernet Port 1 Configuration Switch SW7 esses 2 11 Ethernet Configuration Switch 5 2 11 Setup Switch eine 2 12 Reset Push Button 4511 Led 2 12 Programmable Flag Push Buttons SW12 13 2 12 Rotary Encoder with Momentary Switch SW14 2 13 SPORTO ENBL Switch 9 2 13 July o 16 T 2 13 Ethernet Mode Switch WI aaa aq pasaq 2 14 Ethernet Port 2 Configuration Switch 55 18 2 14 Encoder Enable Switch SW19 2 14 eMMC Enable Switch 592021 2 15 ADC Loopback Switches SW22 23 u uuu 2 15 D ERNEUT 2 16 ADSP BF518F EZ Board Evaluation System Manual vii CONTENTS 2 17 binja e e 2 17 LED Select Jumpers JP11 12 nes 2 17 Ethernet Power Down Jumper 2 17 OTP Flag Enable Jumper
68. R1632 SD Connector 13 Part Description Manufacturer Part Number SD 9 pin connector ITT CANON CCM05 5777LFT T50 256 MB Mating Memory Card shipped with the EZ Board SANDISK STACK SDSDB 256 A10 2 2 ADSP BF518F EZ Board Evaluation System Manual ADSP BF518F EZ Board Hardware Reference Ethemet Connectors J 14 15 Part Description Manufacturer Part Number RJ 45 Ethernet jack STEWART SS 6488 NF Mating Cable shipped with the EZ Board Cat 5E patch cable RANDOM PC10 100T 007 J TAG Connector P1 The JTAG header is the connecting point for a JTAG connection to the ADSP BF518F processor The standalone debug agent requires both con nectors P1 and 7 1 Pin 3 is missing to provide keying Pin 3 in the mating connector should have a plug When using an emulator with the EZ Board the standalone debug agent must be removed Follow the installation instructions provided in EZ Board Installation on page 1 4 using P1 as the connection point Expansion Interface Connectors P2 and P2 and P4 are board to board connectors providing signals for the SPI TWI UART SPORT interfaces and GPIO signals of the processor The connectors are located on the upper and lower edges of the board For more information see Expansion Interface II on page 1 23 For avail ability and pricing of the connectors contact Samtec Part Description Manufac
69. RISC media functions and digital signal processing DSP characteristics Blackfin processors deliver signal processing performance in a microprocessor like environment Based on the Micro Signal Architecture MSA Blackfin processors com bine a 32 bit RISC instruction set dual 16 bit multiply accumulate MAC DSP functionality and eight bit video processing performance that had previously been the exclusive domain of very long instruction word VLIW media processors ADSP BF518F EZ Board Evaluation System Manual xi The evaluation board is designed to be used in conjunction with the Visu alDSP development environment to test the capabilities of the ADSP BF518F Blackfin processors The VisualDSP development envi ronment aids advanced application code development and debug such as Create compile assemble and link application programs written in C C and ADSP BF518F assembly Load run step halt and set breakpoints in application programs Read and write data and program memory Read and write core and peripheral registers Plot memory Access to the ADSP BF518F processor from a personal computer PC is achieved through a USB port or an external JTAG emulator The USB interface of the standalone debug agent gives unrestricted access to the ADSP BF518F processor and evaluation board s peripherals Analog Devices JTAG emulators offer faster communication between the host PC and target hardware To learn m
70. Z BOARD SCHEMATIC ANALOG 20 Cotton Road Nashua NH 03063 DEVICES PH 1 800 ANALOGD Title ADSP BF518F EZ BOARD TITLE Size Board No A0217 2008 02 12 3 2008_14 30 Sheet 1 of 16 B D B D 1 19 2 lt 3 3V D 0 15 Z D1 2 D3 R4 R5 D4 u12 1 2K 1 2K D5 0402 0402 D6 D7 L ETXD2I lt gt 19 pFo ETxD2 PPIDO SPI1_SSEL2 TACLK6 08 lt gt 1 1 1 _ 1 7 MS 8514 83 ISCL 1 D9 renali 5 3 PF2 ETXD3 PPID2 PWM AL puspa ee ISDA D10 L _ ERXD3I lt gt 1 PE3 ERXD3 PPID3 PWM_BH TACLKO D11 J ERXCLKI lt gt TT PF4ERXCLK PPID4 PWM_BL TACLK1 D12 ji L ERXDVI lt gt 0 prs ERXDV PPIDS PWM_CH TACIO 162 6 PHO DR1PRI SPI1_SS RSI_DATA4 ___ gt 1 _ 4 Z i D13 lt gt PF6 COL PPIDe PWM 161 ee ili M 5 PHI RFS1 SPI1 MISO RSI DATA5 gt PB2 RFS1 MMC_D5_Z D14 d I SPIO_SSEL1 5 3 PF7 SPI0_SSEL1 PPID7 PWM_SYNC 160 Beso anism eine pce n _ 4 PH2 RSCLK1 SPI1_SCK RSI_DATA6 lt gt IRSCLK
71. Z Board Evaluation System Manual xiii Ethernet interface v Micrel KSZ8893M PHY device v 10 BaseT and 100 BaseTX Ethernet controller v Auto MDIX ADC interface v Analog Devices AD7266 2 MSPS 12 bit 3 channel SAR analog to digital converter Thumbwheel Panasonic EVQ WKAOOL rotary encoder Universal asynchronous receiver transmitter UART ADM3202 RS 232 line driver receiver v DB9 female connector LEDs v Thirteen LEDs one board reset red three general purpose amber eight configurable ethernet LEDs amber and one power green Push buttons v Three push buttons one reset two programmable flags with debounce logic Expansion interface v Next generation of the expansion interface design provides access to most of the ADSP BF518F processor signals Land grid array v Easy probing of all port pins and most EBIU signals xiv ADSP BF518F EZ Board Evaluation System Manual Preface Other features v JTAG ICE 14 pin header v Blackfin power measurement jumpers For information about the hardware components of the EZ Board refer to ADSP BF518F EZ Board Hardware Reference on page 2 1 Purpose of This Manual The ADSP BF518F EZ Board Evaluation System Manual provides instruc tions for installing the product hardware board The text describes operation and configuration of the board components and provides guide lines for running your own code on the ADSP BF518F EZ Board Finally a s
72. ace 2 DSP U12 FLASH U5 ON Expansion Interface 3 DSP U12 FLASH U5 ON Expansion Interface 4 DSP U12 FLASH U5 ON Expansion Interface SPI FLASH CS 3 3V TA 3 3V w C54 0 01UF 0402 e e e cu R13 R14 R15 R16 R17 R269 4JK 7 gt 47 DAJK 4 7K 4 7K 4 7K I 15 040252 040252 0402 lt 0402 lt 0402 lt 0402 NU ABEO SDOMOI gt 700 ABE1 SDQM1 99 MT48LCS2MTGAZTIG 7B TSOP54 FLASH ENBL SU U23 e 4 OS RESET SW3 H7 de VC1G08 BYTE gt WE 8 SOT23 5 o4 50 025 RY BY ea 2 7 g _ gt C C TT 7 4 e e e T 3 6 1 2 _ 52 gt LM 4 T JA AL 4 5 2 C47 C48 C49 C50 C51 C52 C53 AMS3 SPIO SEL 0 0 Ta 897235 C5 0 1UF 0 1UF 0 01UF 0 01UF 0 01UF 0 01UF 0 01UF DP 20123 5 0402 0402 0402 0402 0402 0402 0402 SWTO18 04 22 W29WS20EB 4 TFBGA63 80 2 N Z SOT23 5 RESET LK mem ma L ARE e JP3 N HI SJ SHORTING xy JUMPER FLASH WP nr 16 Mb SPI FLASH 1 MEMORY R18 R20 10K 10K R21 ADDRESS R
73. age of the wizard appears on the screen The page dis plays your selections Check the selections If you are not satisfied click Back to make changes otherwise click Finish VisualDSP creates the new session and connects to the EZ Board Once con nected the main window s title is changed to include the session name set in step 5 To disconnect from a session click the disconnect button EJ or select Session gt Disconnect from Target To delete a session select Session Session List Select the ses sion name from the list and click Delete Click OK Evaluation License Restrictions The ADSP BF518F EZ Board installation is part of the VisualDSP Installation The EZ Board is a licensed product that offers an unrestricted evaluation license for the first 90 days Once the initial unrestricted 90 day evaluation license expires VisualDSP restricts a connection to the ADSP BF518F EZ Board via the USB port of the standalone debug agent interface only Connections to simulators and emulation products are no longer allowed The linker restricts a user s program to 20 KB of memory for code space with no restrictions for data space The EZ Board hardware must be connected and powered up to use VisualDSP with a valid evaluation or permanent license Refer to the VisualDSP Installation Quick Reference Card for details 1 8 ADSP BF518F EZ Board Evaluation System Manual Using ADSP BF518F EZ
74. alled on pins 2823 This setting con nects the signal going to the ADC input to ground and keeps the noise level low When an input signal is connected to the SMA connector the shunt should be installed on position 1 amp 2 For more information see ADC Channel Select Jumpers JP17 28 on page 2 19 For testing switches 5022 23 connect an audio output signal from the codec to the input channels of the ADC Do not connect to the SMA con nectors and have these switches ON at the same time For more information see Mic HP LPBK Audio Mode Switch SW6 on page 2 10 UART Interface The ADSP BF518F processor has two built in universal asynchronous receiver transmitters UARTs UARTO 1 share the processor s pins with other peripherals on the EZ Board UARTO has full RS 232 functionality via the Analog Devices 3 3V ADM3202 line driver and receiver U21 When using UARTO do not set switch SW10 position 4 to ON This setting enables UART loopback and should be installed only when running the POST program UARTO and UART1 are connected to the expansion interface II connectors For more information see Expansion Interface II Connectors P2 and P4 on page 2 27 ADSP BF518F EZ Board Evaluation System Manual 1 19 RIC Interface Example programs are included in the EZ Board installation directory to demonstrate UART and RS 232 operations For more information on the UART interface refer to the ADSP BF5Ix Blackfin Pro
75. brary CD Technical manuals change periodically Check the Web site for the latest manual revisions and associated documentation errata Related Documents For information on product related development software see the follow ing publications Table 1 Related Processor Publications Title Description ADSP BF512 ADSP BF514 ADSP BF516 ADSP BF518 Blackfin Embedded Processor Preliminary Data Sheet General functional description pinout and timing of the processor ADSP BF51x Blackfin Processor Hardware Refer ence Description of internal processor architec ture and all register functions Blackfin Processor Programming Reference Description of all allowed processor assem bly instructions Table 2 Related VisualDSP Publications Title Description ADSP BF518F EZ Board Evaluation System Man ual Description of the hardware capabilities of the evaluation system description of how to access these capabilities in the VisualDSP environment VisualDSP Users Guide Description of VisualDSP features and usage VisualDSP Assembler and Preprocessor Manuals Description of the assembler function and commands VisualDSP C C Complier and Library Man ual for Blackfin Processors Description of the complier function and commands for Blackfin processors ADSP BF518F EZ Board Evaluation System Manual Preface Table 2 Related V
76. buttons ADSP BF518F EZ Board Evaluation System Manual 1 21 Interface Interface The JTAG connector 1 allows the standalone debug agent to connect debug session to the ADSP BF518F processor The debug agent operates only when the external 5V wall adaptor is used J3 When operating the EZ Board from a battery or USB bus power the debug agent is not powered The standalone debug agent can be removed and an external emulator can be attached to the EZ Board Be careful not to damage the connectors when removing the debug agent The emulator connects to P1 on the back side of the board See EZ Board Installation on page 1 4 for more information For more information about emulators contact Analog Devices or go to http www analog com processors blackfin evaluationDevelop ment crosscore Land Grid Array The ADSP BF518F EZ Board has provisions for probing every port pin and the EBIU interface of the processor on connectors 5 7 The connec tor locations are intended for use with a Tektronix DMAX logic analyzer connector but can be probed with any oscilloscope or logic analyzer For pinout information refer to ADSP BF518F EZ Board Schematic on page B 1 For more information on the Tektronix DMAX logic analyzer interface go to the Tektronix Web site 1 22 ADSP BF518F EZ Board Evaluation System Manual Using ADSP BF518F EZ Board Expansion Interface Il The expansion interface II all
77. cessor Hardware Reference RIC Interface The ADSP BF518F processor has a real time clock RTC and a watchdog timer Typically the RTC interface is used to implement a real time watchdog or a life counter of the time elapsed since the last system reset The EZ Board is equipped with a Panasonic CR1632 lithium coin and 3V battery supplying 125 mAh The 3V battery and 3 3V supply of the board connect to the RTC power pin of the processor When the EZ Board is powered the RTC circuit uses the board power to supply voltage to the RTC pin When the EZ Board is not powered the RTC circuit uses the lithium battery to maintain power to the RTC pin After removing the mylar the battery lasts for about one year with the EZ Board unpowered Example programs are included in the EZ Board installation directory to demonstrate the RTC features The EZ Board is shipped with a protective Mylar sheet placed between the coin battery and positive pin of the battery holder Remove the Mylar sheet before using the RTC in the processor For more information on the RTC and watchdog timer refer to the ADSP BF51x Blackfin Processor Hardware Reference 1 20 ADSP BF518F EZ Board Evaluation System Manual Using ADSP BF518F EZ Board LEDs and Push Buttons The EZ Board provides two push buttons and three LEDs for gen eral purpose I O as well as two additional push buttons intended for power down and wake functionality which also can be used as GPIO flag
78. chematic and a bill of materials are provided as a reference for future designs The product software installation is detailed in the VisualDSP Installa tion Quick Reference Card Intended Audience The primary audience for this manual is a programmer who is familiar with Analog Devices processors This manual assumes that the audience has a working knowledge of the appropriate processor architecture and instruction set Programmers who are unfamiliar with Analog Devices processors can use this manual but should supplement it with other texts such as the ADSP BF5 Ix Blackfin Processor Hardware Reference and Blackfin Processor Instruction Set Reference that describe your target architecture Programmers who are unfamiliar with VisualDSP should refer to the VisualDSP online Help and user s or getting started guides For the locations of these documents see Related Documents ADSP BF518F EZ Board Evaluation System Manual xv Manual Contents Manual Contents The manual consists of Chapter 1 Using ADSP BF518F EZ Board on page 1 1 Describes EZ Board functionality from a programmer s perspective and provides an easy to access memory map Chapter 2 ADSP BF518F EZ Board Hardware Reference on page 2 1 Provides information on the EZ Board hardware components Appendix A ADSP BF518F EZ Board Bill Of Materials on page 1 Provides a list of components used to manufacture the EZ Board Appe
79. d to run a POST 1 24 ADSP BF518F EZ Board Evaluation System Manual Using ADSP BF518F EZ Board Example Programs Example programs are provided with the ADSP BF518F EZ Board to demonstrate various capabilities of the product The programs are installed with the VisualDSP software and can be found in the lt install_path gt Blackfin Examples ADSP BF518F EZ Board directory Refer to the readme file provided with each example for more information Background Telemetry Channel The USB debug agent supports the background telemetry channel BTC which facilitates data exchange between VisualDSP and the processor without interrupting processor execution The BTC allows you to read and write data in real time while the proces sor continues to execute For increased performance of the BTC including faster reading and writing please check our latest line of proces sor emulators at http www analog com en embedded processing dsp sharc USB EMU LATOR products product html For more information about BTC see the online help Reference Design Information A reference design info package is available for download on the Analog Devices Web site The package provides information on the design lay out fabrication and assembly of the EZ KIT Lite and EZ Board products The information can be found at http www analog com en embedded processing dsp con tent reference designs fca html ADSP BF518F EZ Board Evaluation Syst
80. em Manual 1 25 Reference Design Information 1 26 ADSP BF518F EZ Board Evaluation System Manual 2 ADSP BF518F EZ BOARD HARDWARE REFERENC E This chapter describes the hardware design of the ADSP BF518F EZ Board board The following topics are covered System Architecture on page 2 2 Describes the ADSP BF518F EZ Board configuration and explains how the board components interface with the processor Programmable Flags on page 2 3 Shows the locations and describes the programming flags PFs Push Button and Switch Settings on page 2 7 Shows the locations and describes the push buttons and switches Jumpers on page 2 16 Shows the locations and describes the configuration jumpers LEDs on page 2 21 Shows the locations and describes the LEDs Connectors on page 2 24 Shows the locations and provides part numbers for the on board connectors In addition the manufacturer and part number infor mation is provided for the mating parts ADSP BF518F EZ Board Evaluation System Manual 2 1 System Architecture System Architecture This section describes the processor s configuration on the EZ Board Figure 2 1 32 768 KHz Oscillator 3 3 volt 50 IDC Conn 14 Pin 0 1 UARTs CLKIN se SPORT SPORT 25 MHz Oscillator 3 3 Volts 4 Differential Inputs
81. en using SW6 JP15 R42 HPGND 18 FERS 0402 Tour HUF AUDIO CODEC INTERFACE MODE MIC ka d TEE SW6 3 ON and SW6 4 OFF SPI MODE NY dal INEN ADV 77547 1 SW6 3 OFF and SW6 4 ON TWI MODE ILLINEIN RDIV 24 LINE IN IDC3X4 C91 LLINEIN mm IRLINEIN ADIV 23 y INEIN dE MIC SELECT gos 2 iMICIN o 54 CT4 R53 FER8 HEAD PHONE S SHORTING 0 600 D2E JUMPER 0603 0603 see LE E 1 DEFAULT 2 amp 3 LHPOUT 13 LHPOUT e LHPOUT_RDIV LINE OUT B MICBIAS AGND 14 RHPOUT FERS R45 C80 RHPOUT ET 1 600 5 6K fe NEIN piii yu yas i DACLRC e 7 __ e Lea 7777 CODEC DACDAT DACDAT FER FER CG MA 600 ax Rp TOF 7777 CODEC ADCDAT ADCDAT 6 tor Hy NER oot P IM RIGHT 0603 0402 0603 pe SR LOUT ___ _ 3 4 5 RLINEIN e Lecca sr j uon 97 ROUT cre ANN Ie BCLK LOUT_RDIV 4 COND uc 5 N C67 C68 C69 70 r AUDIO MODEL MI MODE FS L___ LEFLLPBKIM 100PF 100PF 100PF 100PF 26 LEN IS men 8 0603 0603 0603 0603 ES 0281 CSB 5 CLKOUT BUT B p L SDIN E SDIN x 2 6 SCLK VMID 20 MD e en SSM26 2 TO NC ICS009 R49 FER6 gt m 04
82. f project u boot forum action ForumBrowse amp foru 10 51 SPI flash can be modified For instructions refer to the VisualDSP online Help example program included in the EZ Board installation directory and U Boot documentation U Boot includes an SPI flash driver and can be used to download a new file over Ethernet or serial con nection and write the file to SPI flash By default the EZ Board boots from the 16 bit flash parallel memory SPI flash can be selected as the boot source by setting the boot mode select switch SW1 to position 3 See Boot Mode Select Switch SW 1 page 2 8 The audio codec is set up to use the SPISEL3 signal as the SPI chip select The chip select is shared with the CUD signal For more information refer to Audio Interface on page 1 17 The Ethernet IC is set up to use the SPISELI signal as the SPI chip select For more information refer to Ethernet Interface on page 1 16 1 14 ADSP BF518F EZ Board Evaluation System Manual Using ADSP BF518F EZ Board Parallel Peripheral Interface PPI The ADSP BF518F processor provides a parallel peripheral interface PPI supporting data widths up to 16 bits The PPI interface provides three multiplexed frame syncs a multiplexed clock and 16 multiplexed data lines The full PPI port is accessible on the expansion interface II connector P3 See Expansion Interface Connector P3 on page 2 28 The PPI signals connect to multi
83. functional pins The PPI is shared with the on board codec SD and Ethernet IC To use the PPI on the expansion interface disable the codec by turning switch SW15 to all OFF see SPORTO ENBL Switch SW15 on page 2 13 The is dis abled by turning switches 5120 and SW21 to all OFF and the SPI flash is disabled by removing the jumper from JP16 See eMMC Enable Switch SW20 21 on page 2 15 and SPI FLASH CS Enable Jumper JP16 on page 2 18 The PPI is not used on the EZ Board the PPI is intended for use on the expansion interface II Rotary Enc oder Interface The ADSP BF518F processor has a built in up down counter with sup port for a rotary encoder The three wire rotary encoder interface connects to the thumbwheel rotary switch SW19 and expansion interface II The rotary encoder can be turned clockwise for the up function counter clock wise for the down function or can be pushed towards the center of the board to clear the counter The rotary switch is a two bit quadrature gray code counter with a detent meaning that both the down signal CDG and up signal CUD tog gle when the count register increases on a rotation to the right Upon rotating to the left CDG and CUD toggle and the overall count decreases ADSP BF518F EZ Board Evaluation System Manual 1 15 Ethemet Interface If the processor pins are needed for the expansion interface II disconnect the rotary encoder switch via
84. g agent can be used only when power is supplied from the wall adaptor 1 Attach the standalone debug agent to connectors P1 labeled JTAG and ZP1 on the backside of the EZ Board watching for the keying pin of P1 to connect correctly Plug the 5V adaptor into connector J3 labeled 5v 2 Plugone side of the provided USB cable into the USB connector of the standalone debug agent Plug the other side of the cable into a USB port of the PC running VisualDSP 5 0 update 5 or later 3 Verify that the yellow USB monitor LED on the standalone debug agent LED4 located on the back side of the board is lit This signi fies that the board is communicating properly with the host PC and ready to run VisualDSP EZ Board Session Startup 1 If you are running VisualDSP for the first time navigate to the VisualDSP environment via the Start Programs menu The main window appears Note that VisualDSP is not connected to any session Skip the rest of this step to step 2 If you have run VisualDSP previously the last opened session appears on the screen You can override the default behavior and force VisualDSP to start a new session by pressing and holding 1 6 ADSP BF518F EZ Board Evaluation System Manual Using ADSP BF518F EZ Board down the Ctrl key while starting VisualDSP Do not release the Ctrl key until the Session Wizard appears on the screen Go to step 3 2 To connect to a new EZ KIT Lite session start Ses
85. gent Connector 2 1 ZP1 connects the standalone debug agent to the EZ Board The standalone debug agent requires both the 7 1 and P1 connectors For more informa tion see EZ Board Installation on page 1 4 ADSP BF518F EZ Board Evaluation System Manual 2 29 Connectors 2 30 ADSP BF518F EZ Board Evaluation System Manual ADSP BF518F EZ BOARD BILL OF MATERIALS The bill of materials corresponds to ADSP BF518F EZ Board Schematic on page B 1 Ref Qty Description Reference Manufacturer Part Number Designator 1 1 74LVC14A U6 TI 74LVC14AD SOIC14 2 1 IDT74FCT3244A U10 IDT IDT74FCT3244APYG PY SSOP20 2 1 32 768 7 U3 EPSON 156 32 7680 5 008 ROHS 4 1 25MHZ OSC003 U19 EPSON SG 8002CA MP 5 4 SN74LVC1G08 U23 26 TI SN74LVC1G08DBVR SOT23 5 6 1 MT48LC32M16A 914 MICRON MT48LC32M16A2P 75 2TG 75 TSOP54 7 1 SI4411DY SO 8 U8 VISHAY Si4411DY T1 E3 8 2 1188 5007 U27 28 DIGI KEY 553 1340 ND 9 1 12MHZ OSCO003 U20 EPSON SG 8002CA MP 10 1 SN74AUC1G00 U13 TI SN74AUCIGOODBVR SOT23 5 11 1 KS8893M U4 MICREL KSZ8893MQL PQFP128 12 1 BF518 M25P16 U9 ST MICRO M25P16 VMW6G Uo ADSP BF518F EZ Board Evaluation System Manual Ref Qty Description Reference Manufacturer Part Number Designator 13 1 BF518 U5 STMICRO M29W320EB70ZEGE M29W320EB
86. i ISAO Z i B Ra gt _ 1 BD on Rep 10142 m 1010 22 R2A as sis VES sS 2222222 222222 Coo saints ee ei IPS gt moe s Rsa gp L ICZWADG ABLEDS Z MK ke R3BP O CZM ADG AB LEDS 27227 1iABEOMSDQMOZ MO poa gt IABEOR SDQMO 1 72 3 ra Sg mi Ra a sss 15 71 352757 9822777 LL 22 Rape lt gt IDRISEC 1 iABET SDOMi_Z gt JABE WSDQMI 1 gm 12 gm 08 gm 3 33 RNS005 RNS005 RNS005 RNS005 RNS005 RN21 IBI Z7 73 n ripe 015 jm 77 1 g 01422 1014 gm IBTA ZZ 7 15757 7 Wc rope D 512 77 4 II 1 g 012 Z h 1012 85005 20 Cotton Road Nashua NH 03063 DEVICES PH 1 800 ANALOGD Title ADSP BF518F EZ BOARD SERIES TERMINATORS Size Board No Rev C A0217 2008 02 Date 12 3 2008_14 30 Sheet 16 of 16 INDEX Numerics 2 wire interface TWT 2 3 A AD5258 digipot 2 2 ADC7266 U2 2 9 ADC_AO 2 signal 1 21 ADC channel select jumpers JP 17 28 2 19 ADC range jumper JP4 2 17 ADM3202 line driver receiver 1721 1 19 ADP1715 low dropout regulator LDO 2 2 AMS0 3 select lines 1 11 2 9 2 18 analog audio interface See audio analog to digital co
87. installation directory and learn about the audio interface ADC Interface The ADC interface of the EZ Board consists of a dual 12 bit high speed low power successive approximation analog to digital converter The device contains two converters each preceded by a 3 channel multiplexer a low noise wide bandwidth track and holds an amplifier that can handle input frequencies in excess of 30 MHz There are four differential and four single ended inputs on the EZ Board that are accessed via SMA connectors The ADC connects to the ADSP BF518F processor via the processor s serial port 1 SPORTI is disconnected from the ADC by turning switch SW4 OFF which enables SPORTI for the expansion interface II for the multi function pins in which case the port s signals can be used for the RSI or as push buttons See SPORTI Enable Switch SW4 on page 2 9 for more information 1 18 ADSP BF518F EZ Board Evaluation System Manual Using ADSP BF518F EZ Board The ADC range is controlled by jumper JP4 This jumper selects whether the input range for the ADC is 2 5V or 5 V The max voltage range for a signal connected to the SMA connector is 0 5 Any voltage outside of this range can damage the EZ Board For more information see ADC Range Jumper JP4 on page 2 17 Jumpers JP17 28 are used to connect the SMA connector to the ADC input When there is no input connected to the SMA connector the jumper should have the shunt inst
88. ion of this EZ Board 1 4 down signal CDG 1 15 DRIPRI signal 1 21 E eMMC enable switches SW20 21 1 12 enable switch SW20 21 2 15 interface 1 12 Ethernet interface xiv 1 13 1 16 configuration switch SW8 2 11 connectors J14 15 1 17 2 27 LEDs LED4 8 LED10 12 2 22 mode switch SW17 2 14 PHY IC U29 1 13 port 1 config switch SW7 1 16 2 11 port 2 config switch SW18 1 16 2 14 power down jumper JP13 2 17 reset push button SW11 2 12 example programs 1 25 expansion interface II Jl connector 1 21 1 23 2 25 2 26 P2 connector 1 19 1 21 1 23 2 27 P3 connector 1 15 1 23 2 28 P4 connector 1 19 1 21 1 23 2 27 external memory 1 9 1 10 F features of this EZ Board xiii flag pins See programmable flags by name PFx PGs PHx flash memory enable switch SW6 2 9 flash WP jumper JP3 2 17 G general purpose IO pins GPIO 1 21 2 8 2 12 2 14 2 22 general purpose push buttons PB1 2 1 21 GPIO enable switch See SW2 I installation of this EZ Board 1 4 IO voltage 2 2 I 2 ADSP BF518F EZ Board Evaluation System Manual JTAG interface l 22 connector P1 1 6 1 22 2 27 jumpers diagram of locations 2 16 JP11 12 LED select 2 17 JP13 Ethernet power down 2 17 JP14 flag enable 2 18 JP15 mic select 1 17 2 18 JP16 SPI flash CS enable 1 15 2 18 JP17 28 ADC channel select 2 19 JP3 flash WP 2 17 JP4 ADC range 1 19 2 1
89. ion System Manual ADSP BF518F EZ Board Bill Of Materials Ref Qty Description Reference Manufacturer Part Number Designator 59 1 0 1 10W 596 0805 R69 VISHAY CRCW08050000Z0EA 60 1 190 100MHZ 5 FERI7 MURATA DLW5BSN191SQ2 FER002 61 8 YELLOW LED4 8 LED10 PANASONIC LNJ416Q8YRA LED009 12 62 2 0 47UF 16V 1096 C59 60 AVX 0805YC474KAT2A 0805 63 2 1UF 10V 10 C123 124 AVX 0805ZC105KAT2A 0805 64 18 10UF 6 3V 10 C7 C10 C15 AVX 08056D106KAT2A 0805 16 C37 C41 C61 C64 C66 C71 C75 C88 C90 C94 95 C98 C101 C106 65 1 4 7UF 6 3V 10 145 AVX 08056D475KAT2A 0805 66 47 0 1UF 10V 10 C4 6 C9 C11 AVX 0402ZD104KAT2A 0402 14 C25 C39 C42 45 C47 48 C62 63 C65 C72 C76 C86 87 C89 C108 110 C113 C115 118 C140 C152 C188 194 C211 216 67 59 0 01UF 16V 10 C1 C8 C17 24 AVX 0402YC103KAT2A 0402 C26 36 C38 C46 C49 58 C73 C92 93 C96 97 C99 100 C102 105 C119 122 C139 C154 C179 187 ADSP BF518F EZ Board Evaluation System Manual A 5 Ref Qty Description Reference Manufacturer Part Number Designator 68 48 10K 1 16W 5 R1 R11 R18 21 VISHAY CRCWO040210K0FKED 0402 R26 R56 59 R85 87 R89 R106 108 R110 115 R117 R143 145 R152 R154 156 R161 164 R168 R170 173 R203 R245 R268 R270 R353 355 69 9 4 7K 1 16W 596 R6 8 R13 17 VISHAY CRCW04024K70JNED 0402 R269 70 27 0 1 16W 5 0402 R9 R202 R205 PANASONI
90. isualDSP Publications Contd Title Description VisualDSP Linker and Utilities Manual Description of the linker function and com mands VisualDSP Loader and Utilities Manual Description of the loader splitter function and commands VisualDSP Device Drivers and System Services Description of the device drivers and system Manual for Blackfin Processors services functions and commands Notation Conventions Text conventions used in this manual are identified and described as follows Example Description Close command File menu this that Titles in reference sections indicate the location of an item within the VisualDSP environment s menu system for example the Close com mand appears on the File menu Alternative required items in syntax descriptions appear within curly brackets and separated by vertical bars read the example as this or that One or the other is required this that Optional items in syntax descriptions appear within brackets and sepa rated by vertical bars read the example as an optional this or that this Optional item lists in syntax descriptions appear within brackets delim ited by commas and terminated with an ellipse read the example as an optional comma separated list of this SECTION Commands directives keywords and feature names are in text with letter gothic font filename Non keyword placeho
91. lders appear in text with italic style format ADSP BF518F EZ Board Evaluation System Manual xxi Notation Conventions Example Description Note For correct operation A Note provides supplementary information on a related topic In the online version of this book the word Note appears instead of this symbol Caution Incorrect device operation may result if Caution Device damage may result if A Caution identifies conditions or inappropriate usage of the product that could lead to undesirable results or product damage In the online version of this book the word Caution appears instead of this symbol Warning Injury to device users may result if A Warning identifies conditions or inappropriate usage of the product that could lead to conditions that are potentially hazardous for the devices users In the online version of this book the word Warning appears instead of this symbol xxii ADSP BF518F EZ Board Evaluation System Manual 1 USING ADSP BF518F EZ BOARD This chapter provides specific information to assist you with development of programs for the ADSP BF518F EZ Board evaluation system The following topics are covered Package Contents on page 1 3 Default Configuration on page 1 4 EZ Board Installation on page 1 4 EZ Board Session Startup on page 1 6 Evaluation License Restrictions on page 1 8 Memory
92. ndix B ADSP BF518F EZ Board Schematic on page 1 Provides the resources to allow EZ Board board level debugging or to use as a reference design Appendix B is part of the online Help Whats New in This Manual This is the first revision of the ADSP BF518F EZ Board Evaluation System Manual xvi ADSP BF518F EZ Board Evaluation System Manual Preface Technical or Customer Support You can reach Analog Devices Inc Customer Support in the following ways Visit the Embedded Processing and DSP products Web site at http www analog com processors technical_support E mail tools questions to processor tools support analog co E mail processor questions to processor support analog com World wide support processor europe analog com Europe support processor china analog com China support Phone questions to 1 800 ANALOGD Contact your Analog Devices Inc local sales office or authorized distributor Send questions by mail to Analog Devices Inc One Technology Way Box 9106 Norwood MA 02062 9106 USA Supported Processors This evaluation system supports Analog Devices ADSP BF518F Blackfin embedded processors ADSP BF518F EZ Board Evaluation System Manual Product Information Product Information Product information can be obtained from the Analog Devices Web site VisualDSP online Help system and a technical library CD Analog Devices Web Site The Analog Devices Web site ww
93. ng VDDFLASH 80 6K SOT23 6 e e 0603 D7 CT6 CT5 C145 SH4TTDY MBRS540T3G 2200 2 2UF 4 7UF SO 8 SMC T DE B T 0805 DNP R198 oe Nf 6 x A VDDMEM DEFAULT INSTALLLED PGND fa PGND 1231 ANALO 20 Cotton Road we VDDMEM Nashua NH 03063 DEVICES 1 800 anatoap SJ7 SHORTING d JUMPER Title pm DEFAULT INSTALLLED ADSP BF51 EZ BOARD Go 92 POWER Remove P10 when measuring VDDMEM 5 eorom A0217 2008 p Date 12 10 2008 14 26 Sheet 15 of 15 RN1 RN5 RN9 RN13 RN17 my 1 F r Ar 7 WAREN OS 5 muse cz E E E RE E ER ades mita er EE as 17 A191 ad LC Sa ELEC 1 7 JN R1BP 24 m IRA R1 Be Ag 1 1 1 _ 4 Z as R1 BB PB1 DRIPRIMMC D4 E 1921 R1 Be 2 iy E SPIO MOSI Zi lt R1 W SPIO MOSII Sai 32771 r AG 7 525202222 222004076 A18 Zi 17 74181 Te poa 032 51 2 _____ _ 2 557 lt gt iPBZ RFST MMC D5 i 2 RoB A 3 SPO MISO Zi gt 282 5 MISO 771
94. ns Table 2 1 PG programmable flag pins Table 2 2 PH programmable flag pins Table 2 3 Table 2 1 PF Port Programmable Flag Connections Processor Pin Other Processor Function EZ Board Function PFO ETxD2 PPIDO SPIl SSEL2 TA Default ETXD2 CLK6 Land grid array expansion interface II 1 ERxD2 PPIDI PWM AH TACLK7 Default ERXD2 Land grid array expansion interface II PF2 ETxD3 PPID2 PWM AL Default ETX03 Land grid array expansion interface II PF3 ERxD3 PPID3 PWM BH TACLKO Default ERXD3 Land grid array expansion interface II ADSP BF518F EZ Board Evaluation System Manual 2 3 Programmable Hags Table 2 1 PF Port Programmable Flag Connections Cont d Processor Pin Other Processor Function EZ Board Function PF4 ERx Default ERXCLK CLK PPID4 PWM_BL TACLK1 Land grid array expansion interface II PF5 ERXDV PPID5 PWM_CH TACIO Default ERXDV Land grid array expansion interface II PF6 COL PPID6 PWM CL TACII Default COL Land grid array expansion interface II PF7 SPIO SSELI PPID7 PWM SYNC Default SPIO SSELI Land grid array expansion interface II PF8 MDC PPID8 SPI1_SSEL4 Default MDC Land grid array expansion interface II PF9 RMI IMDIO PPID9 TMR2 Default MDIO Land grid array expansion interface II PF10 ETXDO PPID10 TMR3 Default ETXDO Land grid array expansion
95. nverter ADC 1 12 1 17 1 18 2 15 2 17 architecture of this EZ Board 2 2 ASYNC asynchronous memory control external memory banks 0 3 1 10 audio interface 1 17 codec U31 1 13 1 15 1 17 2 10 dual connectors J4 5 1 18 2 26 SPI TWI select switch SW16 2 13 SPORTO enable SW15 1 17 2 13 test switches SW22 23 1 19 2 15 B background telemetry channel BTC 1 25 battery holder connector J12 2 26 supply 1 20 bill of materials A 1 board schematic ADSP BF518F B 1 boot modes 2 8 mode select switch SW1 1 12 1 14 C CDG signal 1 21 audio codec See audio configuration of this EZ Board 1 4 ADSP BF518F EZ Board Evaluation System Manual I 1 INDEX connectors diagram of locations 2 24 J12 battery holder 2 26 J13 SD 2 26 J14 15 Ethernet 1 17 J14 Ethernet 2 27 J15 Ethernet 2 27 J16 26 SMA 2 26 expansion interface 1 21 2 25 2 26 2 RS 232 2 25 J3 power 1 6 2 25 J4 5 dual audio 1 18 2 26 J7 SMA 2 26 P1 JTAG 1 6 1 22 2 27 P2 expansion interface II 1 21 2 27 P3 expansion interface II 1 15 2 28 P expansion interface II 1 21 2 27 P5 7 DMAX land grid array 1 22 2 28 ZP1 debug agent 2 29 contents of this EZ Board package 1 3 core voltage 2 2 CUD up signal 1 14 1 15 customer support xvii CZM signal 1 21 D Das U Boot universal boot loader 1 13 debug agent connector ZP1 2 29 default configurat
96. oard Evaluation System Manual ADSP BF518F EZ Board Hardware Reference Power LED LED13 When LED13 is lit solid it indicates that the board is powered ADSP BF518F EZ Board Evaluation System Manual 2 23 Connectors Connectors This section describes connector functionality and provides information about mating connectors The connector locations are shown in Figure 2 5 2 Pe T 09 2 X 70 Je P3 X 7 L GI fa ER bsc 2 J12 WM 3 1 1 H J15 J13 H pe 2 2 P9 1 n I CO 7 1 ___ 1 I 1 1 l Hon q H I 1 a i kw L J18 J19 eee 7 18 1 Jee Je3 1 pio HH i 425 424 am J16 i J5 49 Connectors shown with a dotted line are on the backside of the PCB Figure 2 5 Connector Locations 2 24 ADSP BF518F EZ Board Evaluation System Manual ADSP BF518F EZ Board Hardware Reference Expansion Interface Il Connector 1 J1 is a board to board connector providing signals from the external bus interface unit EBIU of the processor The connector is located on the left edge of the board For more information see Expansion Interface on page 1 23 For availability and pricing of the connector contact Samtec Part Description Manufacturer Part
97. omputer PC After communica tion between the debug agent and PC is initialized pushing a reset button does not reset the USB chip on the debug agent The only way to reset the USB chip on the debug agent is to power down the EZ Board Programmable Push Buttons SW12 13 Two momentary push buttons SW12 and 513 are provided for gen eral purpose user input The buttons connect to the PH0 and PH1 GPIO pins of the processor The push buttons are active high and when pressed 2 12 ADSP BF518F EZ Board Evaluation System Manual ADSP BF518F EZ Board Hardware Reference send a high 1 to the processor The GPIO enable switch SW2 discon nects the push buttons from the corresponding push button signals Refer to PB Enable Switch SW2 on page 2 8 for more information Rotary Encoder with Momentary Switch SW14 The rotary encoder SW14 can be turned clockwise for an up count or counter clockwise for a down count The encoder also features a momen tary switch activated by pushing the switch towards the processor which resets the counter to zero The rotary encoder is a two bit quadrature gray code encoder Refer to the Rotary Counter section of the ADSP BF5 Ix Blackfin Processor Hardware Reference for more information The rotary encoder is disconnected from the processor by setting SW19 positions 1 2 and 3 to OFF See Encoder Enable Switch SW19 on page 2 14 for more information SPO ENBL Switch
98. on interface II PH3 5 1 MOSI RSI DATA7 Default LED1 A0 MMC D7 OTP EN land grid array expansion interface II PH4 TFSI AQE SPIO SSEL3 CUD Default SPIO_SSEL3 CUD land grid array expansion interface PHS TSCLK1 ARDY ECLK CDG Default LED2 CDG ADC A1 land grid array expansion interface II PH6 DTISEC UARTI TX SPI1 SSELI CZM Default LED3 CZM ADC_A2 land grid array expansion interface II PH7 DRISEC UARTI RX TMR7 TACI2 Default not used DR1SEC land grid array expansion interface II 2 6 ADSP BF518F EZ Board Evaluation System Manual ADSP BF518F EZ Board Hardware Reference Push Button and Switch Settings This section describ push button and sw es operation of the push buttons and switches The itch locations are shown in Figure 2 2 Isw11 RESET 5 19 ENCODER ENABLE 5 5 Figure 2 2 Push PB ENABLE swe ENCODER Sw3 ENBL Sw7 EX PORT 1 CFG Em 5 18 PORT 2 sw4 SPORT 1 ENBL sweo swis BOOT swee MODE r EE cme LENT swe3 wt P Y gt MIC GAIN UARTO SETUP 510 cue ETHERNET sw8 ETHERNET MODE utton and Switch Locations ADSP BF518F EZ Board Evaluation System Manual 2 7 Push Button and Switch Settings Boot Mode Select S
99. ore about Analog Devices emulators and processor development tools go to http www analog com dsp tools The ADSP BF518F EZ Board provides example programs to demonstrate the capabilities of the product The ADSP BF518F EZ Board installation is part of the Visu alDSP installation As EZ KIT Lite an EZ Board is a licensed product that offers an unrestricted evaluation license for the first 90 days For details about evaluation license restrictions after the 90 days refer to Evaluation License Restrictions on page 1 8 and the VisualDSP Installation Quick Reference Card xii ADSP BF518F EZ Board Evaluation System Manual Preface The board features Analog Devices ADSP BF518F Blackfin processor v Core performance up to 400 MHz v External bus performance up to 80 MHz 176 pin LQFP package 25 MHz crystal Programmable VDDINT core power v Analog Devices AD5258 TWI digital potentiometer v Analog Devices ADP1715 low dropout linear regulator Synchronous dynamic random access memory SDRAM v Micron MT48LC32M16A2TG 64 MB 32M x 16 bits Parallel flash memory v Numonyx M29W320EB 4 MB 2M x 16 bits eMMC flash memory v Micron MTFC2GDKDM 2 GB SPI flash memory v Numonyx 25 16 16 Mb Analog audio interface v Analog Devices SSM2602 low power audio codec One stereo LINE OUT jack One headphone LINE IN One input MIC jack One input stereo LINE IN jack ADSP BF518F E
100. ory U5 and allows other devices to utilize the signals via the expansion interface II For each switch listed in Table 2 6 that is turned OFF the size of available flash memory is reduced by 1 MB AMS3 is shared with SPIO SEL2 of the external SPI flash When using the external SPI flash the available size for parallel flash is 3 MB Table 2 6 Flash Enable Switch SW3 SW3 Switch Position Default Processor Signal 1 ON AMSO 2 ON AMS1 3 ON AMS2 4 ON AMS3 SPORTI Enable Switch SW4 The SPORTI enable switch SW4 connects the SPORTI interface of the pro cessor to the ADC7266 U2 device When the SPORT1 interface is used on the expansion interface II turn 54 all OFF SW4 is set to all OFF by default ADSP BF518F EZ Board Evaluation System Manual 2 9 Push Button and Switch Settings The SPORT1 interface is shared with other on board components such as the eMMC device and push buttons MIC Gain Switch SW5 The microphone gain switch SW5 sets the gain of the MIC signal which is connected to the top 3 5 mm jack J5 The gain can be set to 14 dB 0 dB or 6 dB by turning position 1 2 or 3 of 545 ON see Table 2 7 When the corresponding position for the desired gain is ON the remaining positions must be OFF Refer to Audio Interface on page 1 17 for more information about the audio codec Table 2 7 MIC Gain Switch SW5 Gain SW5 Switch Settings 5 1
101. oss the entire VisualDSP documentation set for any topic of interest For easy printing supplementary Portable Documentation Format pdf files for all manuals are provided on the VisualDSP installation CD Each documentation file type is described as follows File Description chm Help system files and manuals in Microsoft help format htmor Dinkum Abridged C library and FLEXnet License Tools software documenta html tion Viewing and printing the html files requires a browser such as Internet Explorer 6 0 or higher pdf VisualDSP and processor manuals in PDF format Viewing and printing the pdf files requires a PDF reader such as Adobe Acrobat Reader 4 0 or higher Technical Library CD The technical library CD contains seminar materials product highlights a selection guide and documentation files of processor manuals Visu alDSP software manuals and hardware tools manuals for the following processor families Blackfin SHARC TigerSHARC ADSP 218x and ADSP 219x To order the technical library CD go to http www analog com proces sors technical library navigate to the manuals page for your processor click the request CD check mark and fill out the order form ADSP BF518F EZ Board Evaluation System Manual xix Product Information Data sheets which can be downloaded from the Analog Devices Web site change rapidly and therefore are not included on the technical li
102. ows an Analog Devices EZ Extender or a custom design daughter board to be tested across various hardware plat forms that have the same expansion interface The expansion interface II implemented on the ADSP BF518F EZ Board consists of four connectors three of which are 0 1 in shrouded headers 2 4 and the last of which is Samtec QMS series header J1 The con nectors contain a majority of the ADSP BF518F processor signals For pinout information go to ADSP BF518F EZ Board Schematic on page B 1 The mechanical dimensions of the expansion connectors can be obtained by contacting Technical or Customer Support For more information about daughter boards visit the Analog Devices Web site at http www analog com processors blackfin evaluationDevelop ment crosscore Limits to current and interface speed must be taken into consideration when using the expansion interface II Current for the expansion interface II is sourced from the EZ Board therefore the current should be limited to 1 for 5V and 500 mA for the 3 3V planes If more current is required then a separate power connector and a regulator must be designed on a daughter card Additional circuitry can add extra loading to signals decreasing their maximum effective speed Analog Devices does not support and is not responsible for the effects of additional circuitry ADSP BF518F EZ Board Evaluation System Manual 1 23 Power Measurements Power Measurements
103. p and access the SD interface SPI Interface The ADSP BF518F processor has two serial peripheral interface SPI ports with multiple chip select lines The SPIO port connects directly to serial flash memory audio codec Ethernet IC and the expansion interface II Serial flash memory is a 16 Mb ST M25P16 device which is selected using the SPISEL2 line of the processor SPI flash memory is factory programmed with Das U Boot the universal boot loader Das U Boot U Boot for short is open source firmware for embedded processors including the ADSP BF518F Blackfin processors U Boot can load files from a variety of peripherals such as a serial connec tion an Ethernet network connection or flash memories U Boot is executed at system reset which automatically loads up another application such as the Linux kernel or a stand alone application U Boot can parse many types of files on many types of storage devices ADSP BF518F EZ Board Evaluation System Manual 1 13 SPI Interface U Boot is controlled via a serial connection The default setting is 56700 baud 8 data bits No parity 1 stop bit See RS 232 Connector J2 on page 2 25 for information on the serial connector For more information about U Boot refer to the online documentation at http docs blackfin uclinux org doku php id bootloaders u boot For U Boot support on the Blackfin processors refer to the online help forums at httpi black fin uclinux org g
104. p is pre loaded with a MAC address The MAC address for the EZ Board is stored in the configuration flash section of the parallel flash memory and can be found on a sticker on the bottom side of the board 1 16 ADSP BF518F EZ Board Evaluation System Manual Using ADSP BF518F EZ Board The PHY portion of the Ethernet chip connects to a Pulse HX1188 mag netics then to standard RJ 45 Ethernet connectors J14 and J15 For more information see Ethernet Connectors J14 15 on page 2 27 Example programs are included in the EZ Board installation directory to demonstrate how to use the Ethernet interface Audio Interface The audio interface of the EZ Board consists of a low power stereo codec SSM2602 with an integrated headphone driver and associated passive components There are two inputs a stereo line in and a mono micro phone as well as two outputs a headphone and a stereo line out The codec has integrated stereo ADCs digital to analog converters DACs and requires minimal external circuitry The codec connects to the ADSP BF518F processor via the processor s serial port 0 The SPORTO is disconnected from the codec by turning switch SW15 OFF which enables SPORTO for the SD eMMC interface or the expan sion interface II See SPORTO Switch SW15 on page 2 13 for more information The control interface of the codec is selected by switching 5016 between the 2 wire interface TWI and SPI The board
105. r face RSI which allows the 2 Gb Micron eMMC device to be attached gluelessly to the processor The eMMC device is attached via the proces sor s specific RSI control and data lines The eMMC device shares pins with the secure digital SD interface push buttons analog to digital con verter ADC and expansion interface II The RSI signals can be disconnected from the eMMC device by turning switches SW20 and SW21 all OFF See eMMC Enable Switch SW20 21 on page 2 15 for more information For more information about the eMMC device refer to the Micron Web site http www micron com An example program is included in the EZ Board installation directory to demonstrate how to setup and access the eMMC device 1 12 ADSP BF518F EZ Board Evaluation System Manual Using ADSP BF518F EZ Board SD Interface The ADSP BF518F processor has a secure digital interface The SD inter face consists of a clock pin a command pin and a four bit data bus The SD interface of the processor connects gluelessly to the on board SD con nector The SD interface is attached via the processor s specific RSI control and data lines The interface shares pins with the eMMC interface codec and expansion interface II The memory can be written to in both one bit and four bit modes For more information refer to SD Connec tor J13 on page 2 26 An example program is included in the EZ Board installation directory to demonstrate how to setu
106. s the LED locations LEDI3 POWER LE LED10 LEDU CI LED12 LED4 LEDS LED6 LED7 LJ LEDs CI Figure 2 4 LED Locations ADSP BF518F EZ Board Evaluation System Manual 2 21 LEDs GPIO LEDs LED1 3 Three LEDs connect to three general purpose I O pins of the processor see Table 2 12 The LEDs are active high and lit by writing a 417 to the correct programmable flag signal Table 2 12 GPIO LEDs LED Reference Designator Processor Programmable Flag Pin LEDI PH3 LED2 PH5 LED3 PH6 Ethemet LEDs LED4 8 LED10 12 The Ethernet LEDs LED4 8 and LED10 12 are used to report the status of port 1 and port 2 of the KSZ8893M switch The status displayed by the LEDs is controlled by jumpers JP11 and JP12 The LEDs can be used to report the status of the link activity on the line duplex mode speed and collisions For more information on the LEDs refer to the KSZ8893M data sheet provided by the product manufacturer For more information see LED Select Jumpers JP11 12 on page 2 17 Reset LED LED9 When LED9 is lit it indicates that the master reset of all major ICs is active The reset LED is controlled by the Analog Devices ADM708 supervisory reset circuit You can assert the reset push button SW11 to assert the master reset and activate LED9 For more information see Reset Push Button SW11 on page 2 12 2 22 ADSP BF518F EZ B
107. sion Wizard by selecting one of the following From the Session menu New Session From the Session menu Session List Then click New Ses sion from the Session List dialog box From the Session menu Connect to Target 3 The Select Processor page of the wizard appears on the screen Ensure Blackfin is selected in Processor family In Choose a target processor select ADSP BF518F Click Next 4 The Select Connection Type page of the wizard appears on the screen For standalone debug agent connection select EZ KIT Lite and click Next For emulator connection select Emulator and click Next 5 The Select Platform page of the wizard appears on the screen For standalone debug agent connection ensure that the selected platform is ADSP BF518F EZ KIT Lite via Debug Agent For emulator connection choose the type of emulator that is connected Specify your own Session name for the session or accept the default name The session name can be a string of any length although the box displays approximately 32 characters The session name can include space characters If you do not specify a session name VisualDSP creates a session name by combining the name of the selected platform with the selected processor The only way to change a session name later is to delete the session and open a new ADSP BF518F EZ Board Evaluation System Manual 1 7 Evaluation License Restictions D session Click Next The Finish p
108. ss the SDRAM interface For more information on how to initialize the registers after a reset search the Visu alDSP online Help for reset values Parallel Hash Memory Interface The parallel flash memory interface of the ADSP BF518F EZ Board con tains a 4 MB 2M x 16 bits Numonyx M29W320EB chip Flash memory connects to the 16 bit data bus and address lines 1 through 19 Chip enable is decoded by the 50 3 select lines through NAND and AND gates The address range for flash memory is 0x2000 0000 to 0x203F FFFF ADSP BF518F EZ Board Evaluation System Manual 1 11 Interface Flash memory is pre loaded with boot code for the power on self test POST program For more information refer to Power On Self Test on page 1 24 Flash memory also is preloaded with configuration flash information which contains board revision BOM revision and other data By default the EZ Board boots from the 16 bit parallel flash memory The processor boots from flash memory if the boot mode select switch SW1 is set to position 1 see Boot Mode Select Switch SW 1 page 2 8 Flash memory code can be modified For instructions refer to the online Help and example program included in the EZ Board installation directory For more information about the parallel flash device refer to the Num onyx Web site http www numonyx com eMMC Interface The ADSP BF518F processor is equipped with a removable storage inte
109. stalled on positions 2 amp 3 SPI FLASH CS Enable J umper J P16 The SPI flash CS enable jumper JP16 connects the SPIO_SSEL2 signal to the SPI flash When installing JP16 position 3 of SW3 needs to be turned OFF since the SPIO_SSEL2 signal is shared with the AMS3 signal connected 2 18 ADSP BF518F EZ Board Evaluation System Manual ADSP BF518F EZ Board Hardware Reference to parallel flash When using SPI flash the available memory that is acces sible on parallel flash is reduced from 4 MB to 3 MB By default JP16 is not installed ADC Channel Select J umpers J P17 28 The ADC channel select jumpers JP17 28 are used to connect the SMA connector to the ADC input When there is no input connected to the SMA connector the jumper should have the shunt installed on pins 2 amp 3 This connects the signal going to the ADC input to ground and keeps the noise level low When an input signal is connected to the SMA connector the shunt should be installed on position 1 amp 2 By default JP17 28 are installed on positions 2 amp 3 VDDINT Power J umper P8 The VDDINT power jumper P8 is used to measure the core voltage and current supplied to the processor core P8 is ON by default and the power flows through the two pin IDC header To measure power remove P8 and measure voltage across the 0 1 ohm resistor Once voltage is measured power can be calculated For more information refer to Power Measure ments on page 1 24
110. system design which does not include a shielded enclosure and therefore may cause interference to other electrical devices in close proximity This board should not be used in or near any medical equipment or RF devices The ADSP BF518F EZ Board is currently being processed for certifica tion that it complies with the essential requirements of the European EMC directive 89 336 EEC amended by 93 68 EEC and therefore carries the CE mark The EZ Board evaluation system contains ESD electrostatic discharge sensitive devices Electrostatic charges readily accumulate on the human body and equipment and can discharge without detection Permanent A damage occur on devices subjected to high energv discharges Proper ESD precautions are recommended to avoid performance degradation or loss of functionality Store unused EZ Board boards in the protective ship ping package CONTENTS PREFACE Purpose ot This Manual ise dicens bended u u ROM MEM ME Manaa ORO kasi ai IRE HR xvi Shots New m Ihis Manual etr T xvi Technical or Customer SUpport xvii Supported Processors asi und bib DIM aaO UM xvii Product xviii Devices Web SIE qe kasi xviii VisualDSP Online Documentation
111. turer Part Number 50 position 0 1 SMT header SAMTEC TSSH 125 01 L DV A ADSP BF518F EZ Board Evaluation System Manual 2 27 Connectors Part Description Manufacturer Part Number Mating Connector SAMTEC SSW 125 22 F D VS 50 position 0 1 SMT socket Expansion Interface Il Connector P3 is a board to board connector providing signals for the PPI TWI and GPIO signals of the processor The connector is located on the upper edge of the board For more information see Expansion Interface II on page 1 23 For availability and pricing of the connector contact Samtec Manufacturer Part Number TSSH 135 01 L DV A Part Description 70 position 0 1 SMT header SAMTEC Mating Connector SAMTEC SSW 135 22 F D VS 70 position 0 1 SMT socket DMAX Land Array Connectors P5 7 The land grid array areas 5 7 are intended for the probing of the pro cessor signals The pads are exposed and designed to attach a Tektronix logic analyzer to the connectors listed in the following table For more information about the land grid array consult the Tektronix Web site Part Description Manufacturer Part Number Primary retention TEKTRONIX 020290800 Alternate retention TEKTRONIX 020291000 2 28 ADSP BF518F EZ Board Evaluation System Manual ADSP BF518F EZ Board Hardware Reference Standalone Debug A
112. w analog com provides information about a broad range of products analog integrated circuits amplifiers converters and digital signal processors To access a complete technical library for each processor family go to http www analog com processors technical_library The manuals selection opens a list of current manuals related to the product as well as a link to the previous revisions of the manuals When locating your manual title note a possible errata check mark next to the title that leads to the current correction report against the manual Also note MyAnalog com is a free feature of the Analog Devices Web site that allows customization of a Web page to display only the latest infor mation about products you are interested in You can choose to receive weekly e mail notifications containing updates to the Web pages that meet your interests including documentation errata against all manuals MyAnalog com provides access to books application notes data sheets code examples and more Visit MyAnalog com to sign up If you are a registered user just log on Your user name is your e mail address xviii ADSP BF518F EZ Board Evaluation System Manual Preface VisualDSP Online Documentation Online documentation comprises the VisualDSP Help system software tools manuals hardware tools manuals processor manuals Dinkum Abridged library and FLEXnet License Tools software documenta tion You can search easily acr
113. witch SW1 The boot mode select switch SW1 determines the boot mode of the pro cessor Table 2 4 shows the available boot mode settings By default the ADSP BF518F processor boots from the on board parallel flash memory The selected position of SW1 is marked by the notch down the entire rotating portion of the switch not the small arrow Table 2 4 Boot Mode Select Switch SW 1 SW1 Position Processor Boot Mode 0 Reserved 1 Boot from 8 or 16 bit external flash memory default 2 Boot from 16 bit asynchronous FIFO 3 Boot from serial SPI memory 4 Boot from SPI host device 5 Boot from serial TWI memory 6 Boot from TWI host 7 Boot from UARTO host PB Enable Switch SW2 The PB enable switch SW2 disconnects the associated push buttons from the GPIO pins of the processor and allows the signals to be used for other purposes see Table 2 5 2 8 ADSP BF518F EZ Board Evaluation System Manual ADSP BF518F EZ Board Hardware Reference Table 2 5 Push Button Enable Switch SW2 SW2 Position Default From To Function 1 ON Push button 1 SW12 Processor ON PB1 U12 PHO OFF ADC DRIPRI eMMC expansion interface II 2 ON Push button 2 SW13 Processor ON PB2 U12 PH1 OFF ADC RFS1 eMMC expansion interface II Flash Enable Switch SW3 The flash enable switch 53 disconnects the AMSx signals from parallel flash mem
114. xix l hy NEL CI t xix dr s MIS is NN Dd N tation Conventions NEM xxi USING ADSP BF518F EZ BOARD t NODE etek E 1 3 oo n4 rl 1 4 lus T Nie Url ME m n 1 4 EZ Board 1 6 ADSP BF518F EZ Board Evaluation System Manual CONTENTS Evaluation License Restrictions 1 8 letni dori M 1 9 SDRAM LT IT EUREN UR 1 11 Parallel Flash Memory Interface 1 11 EMN Int uu a dT 1 12 SI DUEB hentai aes 1 13 PP 1 13 Tarallel Peripheral e i 1 15 Rotary Encoder Interlace uuu a ivan tns du Muse M Eis 1 15 Erhernet DONEC Ev pa ord odii dn 1 16 Aude aria 1 17 LT AME a NN P 1 18 LT 7 PT P 1 19 ED DES E Loan MOM eas 1 20 LEDs and 1 21 IE BUS ae EA E E A E E TE 1 22 Land id ANI 1 22 IE ia gi 1 23 Power u uu om eas 1 24 Possit a BOSE ak 1 24 Se PSU ONU dead d d RIP Md 1 25 Dorn CM n rux ril M 1 25 Reference Design Inpnformatioll bii 1 25 vi ADSP BF518F EZ Board Evaluation System Manual CONTENTS ADSP BF518F EZ BOARD HARDWARE REFERENCE opc BEI 2 2

ANALOG DEVICES ADSP-BF518F EZ-Board Evaluation System Manual (Revision 1.0 January 2009)

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