intersil ISL4221E ISL4223E handbook
Contents
1. lt gt A A lt s s f 10 Depending on the method of lead termination at the edge of the package a maximum 0 15mm pull back L1 maybe present L minus L1 to be equal to or greater than 0 3mm 12 intersil ISL4221E ISL4223E Quad Flat No Lead Plastic Package QFN Micro Lead Frame Plastic Package MLFP L20 5x5 20 LEAD QUAD FLAT NO LEAD PLASTIC PACKAGE CONPLIANT TO JEDEC MO 220VHHC ISSUE C MILLIMETERS lt lt gt SYMBOL MIN NOMINAL MAX NOTES lt gt A 0 80 0 90 1 00 A1 0 05 lt gt A2 2 1 00 0 20 REF 7 REN b 0 23 0 28 0 38 5 8 2 5 00 BSC di 1 Ymm y D1 4 75 BSC 9 D2 2 95 3 10 3 25 7 8 Se y E 5 00 BSC 5 E1 4 75 BSC 9 E2 2 95 3 10 3 25 7 8 s lt Y 5 0 65 BSC UTR gm k 0 25 I s ANY 77 CA A L 0 35 0 60 0 75 8 x L1 0 15 10 EN x N 20 2 gt lt Nd 3 gt AD Ne 3 P 0 60 9 lt gt ND 12 9 Y is NX Rev 3 10 02 A Y NOTES iM eua ced 1 Dimensioning and tolerancing conform to ASME Y14 5 1994 Y E Y Y 2 N is the number of terminals KL VAT A 3 Nd and Ne refer the number of terminals each D 4 All dimensions are in millimeters Angles are in degrees gt lt 5 Dimension b applies to the metallized terminal and is measured 0 between 0 15mm and 0 30mm from the terminal2. lt gt 0 80 0 90 1 00 gt 1 0 05 071 2 2 1 00 f A3 0 20 REF 7 REN b 0 28 0 33 0 40 5 8 2 5 00 BSC l Your I y D1 4 75 BSC 9 D2 2 55 2 70 2 85 7 8 AS Y E 5 00 BSC 2 E1 4 75 BSC 9 E2 2 55 2 70 2 85 7 8 s lt Y 5 0 80 BSC UTR gm k 0 25 I s ANY 77 CA A L 0 35 0 60 0 75 8 L1 z 0 15 10 EN x N 16 2 gt lt Nd 3 gt AD Ne 4 3 P 0 60 9 lt gt ND 12 9 Y is NX Rev 2 10 02 A Y NOTES iM eua ced 1 Dimensioning and tolerancing conform to ASME Y14 5 1994 Y E Y Y 2 N is the number of terminals B 3 Nd and refer to the number of terminals each D and E 4 All dimensions are in millimeters Angles are in degrees gt lt 5 Dimension b applies to the metallized terminal and is measured 0 between 0 15mm and 0 30mm from the terminal tip 6 The configuration of the pin 1 identifier is optional but must be located within the zone indicated The pin 1 identifier may be either a mold or mark feature 25 7 Dimensions D2 2 for the exposed pads which provide improved electrical thermal performance 8 Nominal dimensions are provided to assist with PCB Land Pattern Design efforts see Intersil Technical Brief TB389 Y y 9 Features and dimensions A2 A3 D1 E1 P amp 0 are present when 1m RA Y nA Y Anvil singulation method is used and not present for saw singulation
3. Has eu rs rg i Data Sheet QFN Packaged 15kV ESD Protected 2 7V to 5 5V 150Nanoamp 250kBps RS 232 Transmitters Receivers The Intersil ISL422XE devices are 2 7V to 5 5V powered RS 232 transmitters receivers which meet EIA TIA 232 and V 28 V 24 specifications even at Vcc 3 0V Additionally they provide 15kV ESD protection IEC61000 4 2 Air Gap and Human Body Model on transmitter outputs and receiver inputs RS 232 pins Targeted applications are PDAs Palmtops and hand held products where the low operational and even lower standby power consumption is critical Efficient on chip charge pumps coupled with manual and automatic powerdown functions reduce the standby supply current to a 150nA trickle Tiny 5mm x 5mm Quad Flat No Lead QFN packaging and the use of small low value capacitors ensure board space savings as well Data rates greater than 250kBps are guaranteed at worst case load conditions ISL4221E is a 1 driver 1 receiver device and the ISL4223E is a 2 driver 2 receiver device that coupled with the 5x5 QFN package provide the industry s smallest lowest power serial port suitable for PDAs and hand held applications The 5x5 QFN requires 40 less board area than a 20 lead TSSOP and is nearly 20 thinner ISL422XE features an automatic powerdown function that powers down the on chip power supply and driver circuits This occurs when an attached peripheral device is shut off or t
4. INPUT INPUT INPUT OUTPUTS OUTPUTS OUTPUT MODE OF OPERATION NO H H L Active Active L Normal Operation NO H H H Active High Z L Auto Powerdown Disabled YES H L L Active Active H Normal Operation YES H L H Activa High Z H Auto Powerdown Enabled NO H L L High Z Active L Powerdown Due to Auto Powerdown NO H L H High Z High Z p aca YES L X L High Z Active H Manual Powerdown YES L X H High Z High Z H Manual Powerdown w Rcvr Disabled NO L X L High Z Active L Manual Powerdown NO L X H High Z High Z L Manual Powerdown w Rcvr Disabled mode For always enabled operation FORCEON and FORCEOFF are both strapped high To switch between active and powerdown modes under logic or software control only the FORCEOFF input need be driven The FORCEON state isn t critical FORCEOFF dominates over FORCEON Nevertheless if strictly manual control over powerdown is desired the user must strap FORCEON high to disable the automatic powerdown circuitry Connecting FORCEOFF and FORCEON together disables the automatic powerdown feature enabling them to function as a manual SHUTDOWN input see Figure 4 FORCEOFF INVALID IER Te De FIGURE 4 CONNECTIONS FOR MANUAL POWERDOWN WHEN NO VALID RECEIVER SIGNALS ARE PRESENT The time to recover from automatic powerdown mode is typically 100us POWER MASTER POWERDOWN LINE MANAGEMENT UNIT FORCEON FORCEOFF ISL422XE FIGURE 5 CIRCUIT TO PREVENT AUTO POW
5. The time to recover from automatic powerdown mode is typically 100us INVALID Output The INVALID output always indicates whether or not a valid RS 232 signal see Figure 6 is present at any of the receiver inputs see Table 2 giving the user an easy way to determine when the interface block should power down Invalid receiver levels occur whenever the driving peripheral s outputs are shut off powered down or when the RS 232 interface cable is disconnected In the case of a disconnected interface cable where all the receiver inputs are floating but pulled to GND by the internal receiver pull down resistors the INVALID logic detects the invalid levels and drives the output low The power management logic then uses this indicator to power down the interface block Reconnecting the cable restores valid levels at the receiver inputs INVALID switches high and the power management logic wakes up the interface block INVALID can also be used to indicate the DTR or RING INDICATOR signal as long as the other receiver inputs are floating or driven to GND as in the case of a powered down driver VALID RS 232 LEVEL ISL422XE IS ACTIVE 2 7V INDETERMINATE POWERDOWN MAY OR MAY NOT OCCUR 0 3V INVALID LEVEL POWERDOWN OCCURS AFTER 30us 0 3V INDETERMINATE POWERDOWN MAY OR MAY NOT OCCUR 2 7V VALID RS 232 LEVEL ISL422XE IS ACTIVE FIGURE 6 DEFINITION OF VALID RS 232 RECEIVER LEVELS INVALID switches low after invalid level
6. of third parties which may result from its use No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries For information regarding Intersil Corporation and its products see www intersil com 13 imntersil
7. operating at full speed Under more typical conditions of Voc 2 3 3V and C 250pF transmitter easily operates at 900kBps Transmitter inputs float if left unconnected and may cause Icc increases Connect unused inputs to GND for the best performance Receivers All the ISLA22XE devices contain standard inverting receivers that three state via the EN control line All the receivers convert RS 232 signals to CMOS output levels and accept inputs up to 25V while presenting the required 3kQ to 7 input impedance see Figure 1 even if the power is off Vcc OV The receivers Schmitt trigger input stage uses hysteresis to increase noise immunity and decrease errors due to slow input signal transitions Vcc RXIN RxoUT 25V lt lt 25V GND lt Vrout lt Vcc GND FIGURE 1 INVERTING RECEIVER CONNECTIONS Receivers driving a powered down UART must be disabled to prevent current flow through and possible damage to the UART s protection diodes see Figures 2 and 3 This can be accomplished on the ISL422XE by driving the EN input high whenever the UART powers down Figure 3 also shows that the INVALID output can be used to determine when the UART should be powered down When the RS 232 cable is disconnected INVALID switches low indicating that the UART is no longer needed Reconnecting the cable drives INVALID back high indicating that the UART should be powered up Low Power Operation The
8. 5 0V 25 1 8 2 4 V Input Hysteresis 25 0 5 V Input Resistance 25 3 5 7 kQ TRANSMITTER OUTPUTS Output Voltage Swing All Transmitter Outputs Loaded with to Ground Full 5 0 5 4 V Output Resistance Vcc V V 0V Transmitter Output 2V Full 300 10M i Output Short Circuit Current Full 35 60 mA Output Leakage Current VouT 12V Vcc OV to 5 5V Full 25 Automatic Powerdown FORCEOFF GND TIMING CHARACTERISTICS Maximum Data Rate RL C 1000pF One Transmitter Switching Full 250 500 kBps Receiver Propagation Delay Receiver Input to Receiver 25 0 15 us Output 150pF 25 _ 0 15 _ m Receiver Output Enable Time Normal Operation 25 200 ns Receiver Output Disable Time Normal Operation 25 200 ns Transmitter Skew Note 2 25 100 ns Receiver Skew tPLH 25 50 ns Transition Region Slew Rate Vec 3 3V RL to 7kO C 150pF to 2500pF 25 4 30 V us 2 dd C 150 to 100006 25 6 30 Vus ESD PERFORMANCE RS 232 Pins Tour RIN Human Body Model 25 15 kV IEC61000 4 2 Contact Discharge 25 8 kV 61000 4 2 Air Gap Discharge 25 15 kV All Other Pins Human Body Model 25 2 kV NOTE 2 Transmitter skew is measured at the transmitter zero crossing points Detailed Description Charge Pump The ISL422XE operate from a single 2 7V to 5 5V supply Intersil s new ISL422XE devices utilize regulated on ch
9. ERDOWN FOR 100ms AFTER FORCED POWERUP Automatic Powerdown Even greater power savings is available by using the automatic powerdown function When no valid RS 232 voltages see Figure 6 are sensed on any receiver input for 30us the charge pump and transmitters powerdown thereby reducing supply current to 10 Invalid receiver levels occur whenever the driving peripheral s outputs are shut off powered down or when the RS 232 interface cable is disconnected The ISL422XE powers back up whenever it detects a valid RS 232 voltage level on any receiver input This automatic powerdown feature provides additional System power savings without changes to the existing operating system Automatic powerdown operates when the FORCEON input is low and the FORCEOFF input is high Tying FORCEON high disables automatic powerdown but manual powerdown is always available via the overriding FORCEOFF input Table 2 summarizes the automatic powerdown functionality Some applications may need more time to wake up from shutdown If automatic powerdown is being utilized the RS 232 device will reenter powerdown if valid receiver levels aren t reestablished within 30us of the ISL422XE powering up Figure 5 illustrates a circuit that keeps the ISL422XE 7 intersil ISL4221E ISL4223E from initiating automatic powerdown for 100ms after powering up This gives the slow to wake peripheral circuit time to reestablish valid RS 232 output levels
10. NSMITTER LOOPBACK TEST CIRCUIT 5V DIV Tiour Riour iss 1 Vcc 3 3 C1 C4 O 1uF 5us DIV FIGURE 10 LOOPBACK TEST AT 120kBps 5V DIV Tiour Riour I l T Vcc 3 3V C1 C4z 0 1uF 2us DIV FIGURE 11 LOOPBACK TEST AT 250kBps Interconnection with 3V and 5V Logic The ISL422XE directly interface with 5V CMOS and TTL logic families Nevertheless with the ISLA22XE at 3 3V and the logic supply at 5V AC HC and CD4000 outputs can drive ISLA22XE inputs but ISL422XE outputs do not reach the minimum Vj for these logic families See Table for more information TABLE 3 LOGIC FAMILY COMPATIBILITY WITH VARIOUS SUPPLY VOLTAGES SYSTEM Vcc POWER SUPPLY SUPPLY VOLTAGE VOLTAGE V V COMPATIBILITY 3 3 3 3 Compatible with all CMOS families 5 5 Compatible with all TTL and CMOS logic families 5 3 3 Compatible with ACT and HCT CMOS and with TTL ISL422XE outputs are incompatible with AC HC and CD4000 CMOS inputs 9 intersil ISL4221E ISL4223E 15kV ESD Protection All pins on ISL422XE devices include ESD protection structures but the RS 232 pins transmitter outputs and receiver inputs incorporate advanced structures which allow them to survive ESD events up to 15kV The RS 232 pins are particularly vulnerable to E
11. ORCEOFF Voc 3 3V Full 2 0 EN Vcc 5 0V Full 2 4 Input Leakage Current Tin FORCEON FORCEOFF EN Full 0 01 1 0 Output Leakage Current EN Vcc Full 0 05 10 Output Voltage Low lout 1 6mA Full 0 4 Output Voltage High lout 1 0 Full Vcc 0 6 Vcc 0 1 AUTOMATIC POWERDOWN FORCEON GND FORCEOFF Vcc Receiver Input Thresholds to ISL422XE Powers Up See Figure 6 Full 2 7 2 7 V Enable Transmitters Receiver Input Thresholds to ISL422XE Powers Down See Figure 6 Full 0 3 0 3 V Disable Transmitters INVALID Output Voltage Low lout 1 6mA Full 0 4 INVALID Output Voltage High louT 1 0mA Full Vcc 0 6 Receiver Threshold to Transmitters 25 100 us Enabled Delay twu Receiver Positive or Negative 25 1 us Threshold to INVALID High Delay tINVH Receiver Positive or Negative 25 30 us Threshold to INVALID Low Delay tINVL 4 Intersil ISL4221E ISL4223E Electrical Specifications Test Conditions Voc 3V to 5 5V C4 0 1uF Unless Otherwise Specified Typicals at TA 25 C Continued PARAMETER TEST CONDITIONS O MIN TYP UNITS RECEIVER INPUTS Input Voltage Range 25 25 i 25 V Input Threshold Low Voc 3 3V 25 0 6 1 2 V Voc 5 0V 25 0 8 1 5 V Input Threshold High Voc 3 3V 25 1 5 2 4 V Voc
12. SD damage because they typically connect to an exposed port on the exterior of the finished product Simply touching the port pins or connecting a cable can cause an ESD event that might destroy unprotected ICs These new ESD structures protect the device whether or not it is powered up protect without allowing any latchup mechanism to activate and don t interfere with RS 232 signals as large as 25V Human Body Model HBM Testing As the name implies this test method emulates the ESD event delivered to an IC during human handling The tester delivers the charge through a 1 5kQ current limiting resistor making the test less severe than the IEC61000 test which utilizes a 330Q limiting resistor The HBM method determines an ICs ability to withstand the ESD transients typically present during handling and manufacturing Due to the random nature of these events each pin is tested with respect to all other pins The RS 232 pins on E family devices can withstand HBM ESD events to 15kV 61000 4 2 Testing The IEC61000 test method applies to finished equipment rather than to an individual IC Therefore the pins most likely to suffer an ESD event are those that are exposed to the outside world the RS 232 pins in this case and the IC is tested in its typical application configuration power applied rather than testing each pin to pin combination The lower current limiting resistor coupled with the larger charge storage capaci
13. apacitor as close as possible to the IC Transmitter Outputs when Exiting Powerdown Figure 8 shows the response of two transmitter outputs when exiting powerdown mode As they activate the two transmitter outputs properly go to opposite RS 232 levels with no glitching ringing nor undesirable transients Each transmitter is loaded with 3kQ in parallel with 2500pF 8 intersil ISL4221E ISL4223E Note that the transmitters enable only when the magnitude of the supplies exceed approximately 3V 5V DIV FORCEOFF T1 2V DIV T2 3 3 C1 C4 O 1uF TIME 20us DIV FIGURE 8 TRANSMITTER OUTPUTS WHEN EXITING POWERDOWN Operation Down to 2 7V ISL422XE transmitter outputs meet RS 562 levels 3 7V at the full data rate with Vcc as low as 2 7V RS 562 levels typically ensure inter operability with RS 232 devices High Data Rates ISL422XE maintain the RS 232 5V minimum transmitter output voltages even at high data rates Figure 9 details a transmitter loopback test circuit and Figure 10 illustrates the loopback test result at 120kBps For this test all transmitters were simultaneously driving RS 232 loads in parallel with 1000pF at 120kBps Figure 11 shows the loopback results for a single transmitter driving 1000pF and an RS 232 load at 250kBps The static transmitters were also loaded with an RS 232 receiver ISL422XE FIGURE 9 TRA
14. he RS 232 cable is removed conserving system power automatically without changes to the hardware or operating system It powers up again when a valid RS 232 voltage is applied to any receiver input Table 1 summarizes the features of the ISLA22XE while Application Note AN9863 summarizes the features of each device comprising the 3V RS 232 family ISL4221E ISL4223E FN6045 1 August 2004 Features Available in Near Chip Scale QFN 5Smmx5mm Package which is 40 Smaller than a 20 Lead TSSOP ESD Protection for RS 232 I O Pins to 15kV IEC61000 Meets EIA TIA 232 and V 28 V 24 Specifications at 3V RS 232 Compatible with Vcc 2 7V On Chip Voltage Converters Require Only Four External 0 1uF Capacitors Manual and Automatic Powerdown Features Receiver Hysteresis For Improved Noise Immunity Guaranteed Minimum Data Rate 250kBps Wide Power Supply Range Single 2 7V to 5 5V Low Supply Current in Powerdown State 150nA Pb free Available as an Option Applications Any Space Constrained System Requiring RS 232 Ports Battery Powered and Portable Equipment Hand Held Products GPS Receivers Bar Code Scanners etc PDAs and Palmtops Data Cables Cellular Mobile Phones Digital Cameras Related Literature Technical Brief TB363 Guidelines for Handling and Processing Moisture Sensitive Surface Mount Devices Technical Brief TB379 Thermal Characterizati
15. ip guarantee a 250kBps minimum data rate require only four dual charge pumps as voltage doublers and voltage small external 0 1uF capacitors feature low power inverters to generate 5 5V transmitter supplies from a Voc consumption and meet all EIA RS 232C and V 28 supply as low as 3 0V This allows them to maintain RS 232 specifications even with Vcc 3 0V The circuit is divided compliant output levels over the 10 tolerance range of into three sections The charge pump the transmitters and 3 3V powered systems The efficient on chip power supplies the receivers require only four small external 0 1uF capacitors for the voltage doubler and inverter functions The charge pumps operate discontinuously i e they turn off as soon as the V 5 intersil ISL4221E ISL4223E and V supplies are pumped up to the nominal values resulting in significant power savings Transmitters The transmitters are proprietary low dropout inverting drivers that translate TTL CMOS inputs to EIA TIA 232 output levels Coupled with the on chip 5 5V supplies these transmitters deliver true RS 232 levels over a wide range of single supply system voltages All transmitter outputs disable and assume a high impedance state when the device enters the powerdown mode see Table 2 These outputs may be driven to 12V when disabled The devices guarantee a 250kBps data rate for full load conditions and 1000pF Vcc 3 0V with one transmitter
16. l 1 Maximum Junction Temperature Plastic Package 1509C Maximum Storage Temperature Range 65 C to 150 C Maximum Lead Temperature Soldering 105 300 C Operating Conditions Temperature Range ISLA22XEIR 409C to 859 CAUTION Stresses above those listed in Absolute Maximum Ratings may cause permanent damage to the device This is a stress only rating and operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied NOTE 1 Oja is measured in free air with the component mounted on a high effective thermal conductivity test board with direct attach features See Tech Brief TB379 and Tech Br ief TB389 Electrical Specifications Test Conditions Voc 3V to 5 5V C4 0 1uF Unless Otherwise Specified Typicals are at TA 259C TEMP PARAMETER TEST CONDITIONS 9C MIN TYP MAX UNITS DC CHARACTERISTICS Supply Current Automatic All RiN Open FORCEON GND FORCEOFF Vcc 25 0 15 1 Powerdown Supply Current Powerdown FORCEOFF GND 25 0 15 1 Supply Current All Outputs Unloaded Vcc 3 15V 25 0 3 1 0 mA Automatic Powerdown Disabled FORCEON FORCEOFF Vcc LOGIC AND TRANSMITTER INPUTS AND RECEIVER OUTPUTS Input Logic Threshold Low Tin FORCEON FORCEOFF Full 0 8 Input Logic Threshold High FORCEON F
17. nation finish which is compatible with both SnPb and ISLA223EIRZ 40 to 85 20Ld QFN 120 5 5 Pb free soldering operations Intersil Pb free products are MSL Note Pb free classified at Pb free peak reflow temperatures that meet or exceed the Pb free requirements of IPC JEDEC J Std 020B Pinouts 5 4221 QFN 5 4223 VIEW VIEW e e o olg s 26 1 1 GND V 115 Tlout TiouT C1 FORCEON C24 2 L 3 Laed Laed L 3 Z 4 zi x 2 a Pin Descriptions PIN FUNCTION Vcc System power supply input 2 7V to 5 5V V Internally generated positive transmitter supply 5 5V V Internally generated negative transmitter supply 5 5V GND Ground connection C1 External capacitor voltage doubler is connected to this lead C1 External capacitor voltage doubler is connected to this lead C2 External capacitor voltage inverter is connected to this lead C2 External capacitor voltage inverter is connected to this lead TIN TTL CMOS compatible transmitter Inputs TOUT 15kV ESD Protected RS 232 level nominally 5 5V transmitter outputs RIN 15kV ESD Protected RS 232 compatible receiver inputs RoUT TTL CMOS level receiver outputs INVALID Active low output that indicates if no valid RS 232 levels are present on any receiver input FORCEOFF Active low
18. on of Packages for ICs Technical Brief TB389 PCB Land Pattern Design and Surface Mount Guidelines for QFN Packages TABLE 1 SUMMARY OF FEATURES PART NO OF NO OF QFN PKG DATA RATE Rx ENABLE MANUAL AUTOMATIC POWERDOWN NUMBER Tx Rx AVAILABLE kBps FUNCTION POWERDOWN FUNCTION ISL4221E 1 1 YES 250 YES YES YES ISL4223E 2 2 YES 250 YES YES YES 1 CAUTION These devices are sensitive to electrostatic discharge follow proper IC Handling Procedures 1 888 INTERSIL or 321 724 7143 Intersil and design is a registered trademark of Intersil Americas Inc Copyright Intersil Americas Inc 2004 All Rights Reserved All other trademarks mentioned are the property of their respective owners ISL4221E ISL4223E Ordering Information Ordering Information Continued PART NO TEMP RANGE C PACKAGE PKG DWG PART NO TEMP RANGE C PACKAGE PKG DWG ISL4221EIR 40 to 85 16 Ld QFN L16 5x5 ISL4223EIR T 40 to 85 20 Ld QFN 120 5 5 ISL4221EIR T 40 to 85 16 Ld QFN L16 5x5 Tap Tape amp Reel ISLA223EIRZ T 40 to 85 20Ld QFN 120 5 5 ISL4221EIRZ T 40 to 85 1619 QFN Ll6 5x5 Note Tape amp Reel Note Tape amp Reel Pb free Pb free NOTE Intersil Pb free products employ special Pb free material ISL4223EIR 40 to 85 20Ld QFN L20 5x5 sets molding compounds die attach materials and 100 matte tin plate termi
19. s have persisted on all of the receiver inputs for more than 30us see Figure 7 INVALID switches back high 1us after detecting a valid RS 232 level on a receiver input INVALID operates in all modes forced or automatic powerdown or forced on so it is also useful for systems employing manual powerdown circuitry When automatic powerdown is utilized INVALID 0 indicates that the 151 422 is powerdown mode RECEIVER 7 INVALID INPUTS _ UN _ REGION l TRANSMITTER i OUTPUTS l V INVALID tINVL tINVH OUTPUT o I uc FIGURE 7 AUTOMATIC POWERDOWN AND INVALID TIMING DIAGRAMS Capacitor Selection The charge pumps require 0 1 pF or greater capacitors for proper operation Increasing the capacitor values by a factor of 2 reduces ripple on the transmitter outputs and slightly reduces power consumption When using minimum required capacitor values make sure that capacitor values do not degrade excessively with temperature If in doubt use capacitors with a larger nominal value The capacitors equivalent series resistance ESR usually rises at low temperatures and it influences the amount of ripple on V and V Power Supply Decoupling In most circumstances a 0 1uF bypass capacitor is adequate In applications that are particularly sensitive to power supply noise decouple Vcc to ground with a capacitor of the same value as the charge pump capacitor C4 Connect the bypass c
20. se 3V devices require a nominal supply current of 0 even at Vcc 5 5V during normal operation not in powerdown mode This is considerably less than the 5mA to 11mA current required by comparable 5V RS 232 devices allowing users to reduce system power simply by switching to this new family Powerdown Functionality The already low current requirement drops significantly when the device enters powerdown mode In powerdown supply current drops to 150nA because the on chip charge pump turns off V collapses to Vcc V collapses to GND and the transmitter outputs three state Receiver outputs are unaffected by powerdown refer to Table 2 for details This micro power mode makes the ISL422XE ideal for battery powered and portable applications CURRENT POWERED DOWN UART OLD RS 232 CHIP FIGURE 2 POWER DRAIN THROUGH POWERED DOWN PERIPHERAL TRANSITION DETECTOR ISL422XE INVALID FIGURE 3 DISABLED RECEIVERS PREVENT POWER DRAIN Software Controlled Manual Powerdown The ISL422XE family provides pins that allow the user to force the IC into the low power standby state The ISL422XE utilize a two pin approach where the FORCEON and FORCEOFF inputs determine the IC s 6 intersil ISL4221E ISL4223E TABLE 2 POWERDOWN AND ENABLE LOGIC TRUTH TABLE RS 232 SIGNAL m PRESENT AT FORCEOFF FORCEON EN TRANSMITTER RECEIVER INVALID RECEIVER INPUT
21. tip 6 The configuration of the pin 1 identifier is optional but must be located within the zone indicated The pin 1 identifier may be either a mold or mark feature 25 7 Dimensions D2 E2 for the exposed pads which provide improved electrical thermal performance 8 Nominal dimensions are provided to assist with PCB Land Pattern Design efforts see Intersil Technical Brief TB389 Y y 9 Features and dimensions A2 A3 D1 E1 P amp 0 are present when 1m RA Y nA Y Anvil singulation method is used and not present for saw 7 1 singulation lt gt A lt s 10 Depending on the method of lead termination at the edge of the package a maximum 0 15mm pull back L1 maybe present L minus L1 to be equal to or greater than 0 3mm All Intersil U S products are manufactured assembled and tested utilizing ISO9000 quality systems Intersil Corporation s quality certifications can be viewed at www intersil com design quality Intersil products are sold by description only Intersil Corporation reserves the right to make changes in circuit design software and or specifications at any time without notice Accordingly the reader is cautioned to verify that data sheets are current before placing orders Information furnished by Intersil is believed to be accurate and reliable However no responsibility is assumed by Intersil or its subsidiaries for its use nor for any infringements of patents or other rights
22. to shut down transmitters and on chip power supply This overrides any automatic circuitry and FORCEON see Table 2 FORCEON Active high input to override automatic powerdown circuitry thereby keeping transmitters active FORCEOFF must be high EN Active low receiver enable control 2 intersil ISL4221E ISL4223E Typical Operating Circuits ISL4221E C3 0 1uF 0 1uF C2 0 1uF C4 xU uF TiN Tout TTL CMOS RS 232 POI LEVELS LEVELS R1ouT R1 Vcc TO POWER FORCEON ds INVALID CONTROL LOGIC ISL4223E 3 3V o Cy T 0 1uF C4 0 1 uF TiN Tiour T2IN T2ouT TTL CMOS RS 232 LOGIC LEVELS LEVELS RloUT R1IN R2ourT lt R2IN Vcc TO POWER FORCEON INVALID CONTROL LOGIC 3 intersil ISL4221E ISL4223E Absolute Maximum Ratings Vcc to Ground V to Ground V to Ground V to V Input Voltages Tin FORCEOFF FORCEON EN SINCERE thua N Output Voltages Tour Rout INVALID Short Circuit Duration TOUT 0 3V to 6V 0 3V to 7V 0 3V to 7V 14V 0 3V to 6V VO 25V 13 2V 0 3V to Vcc 0 3V Continuous See Specification Table Thermal Information Thermal Resistance Typical Note 1 Oya 9C W 16 Ld QFN 35 20 Ld QFN 32 Moisture Sensitivity see Technical Brief TB363 QEN Package px bx bh RR pu EORR Leve
23. tor yields a test that is much more severe than the HBM test The extra ESD protection built into this device s RS 232 pins allows the design of equipment meeting level 4 criteria without the need for additional board level protection on the RS 232 port AIR GAP DISCHARGE TEST METHOD For this test method a charged probe tip moves toward the IC pin until the voltage arcs to it The current waveform delivered to the IC pin depends on approach speed humidity temperature etc so it is difficult to obtain repeatable results The E device RS 232 pins withstand 15kV air gap discharges CONTACT DISCHARGE TEST METHOD During the contact discharge test the probe contacts the tested pin before the probe tip is energized thereby eliminating the variables associated with the air gap discharge The result is a more repeatable and predictable test but equipment limits prevent testing devices at voltages higher than 8kV All E family devices survive 8kV contact discharges on the RS 232 pins 10 _imtersil ISL4221E ISL4223E Typical Performance Curves vc 3 3V Ta 25 C 6 eee OO IA _ u Vour 4 9 gt 1 TRANSMITTER AT 250kBps n OTHER TRANSMITTERS AT 30kBps E 0 o x 2 2 2 V lt 4 OUT ME a LL l a i l iii ai 0 1000 2000 3000 4000 5000 LOAD CAPACITANCE pF FIGURE 12 TRANSMITTER OUTPUT VOLTAGE
24. vs LOAD CAPACITANCE ISL4221E 250kBps 20 120kBps SUPPLY CURRENT mA 10 20kBps 0 0 1000 2000 3000 4000 5000 LOAD CAPACITANCE pF FIGURE 14 SUPPLY CURRENT vs LOAD CAPACITANCE WHEN TRANSMITTING DATA NO LOAD ALL OUTPUTS STATIC SUPPLY CURRENT mA 2 5 3 0 3 5 4 0 4 5 5 0 5 5 6 0 SUPPLY VOLTAGE V FIGURE 16 SUPPLY CURRENT vs SUPPLY VOLTAGE 25 20 T i 15 SLEW ul o SLEW 10 So 1000 2000 3000 4000 5000 LOAD CAPACITANCE pF FIGURE 13 SLEW RATE vs LOAD CAPACITANCE 45 r ISL4223E T tc tc 2 o 21 2 o 5 0 0 1000 2000 3000 4000 5000 LOAD CAPACITANCE pF FIGURE 15 SUPPLY CURRENT vs LOAD CAPACITANCE WHEN TRANSMITTING DATA Die Characteristics SUBSTRATE POTENTIAL POWERED UP GND TRANSISTOR COUNT ISL4221E 286 151 4223 357 PROCESS Si Gate CMOS 11 intersil ISL4221E ISL4223E Quad Flat No Lead Plastic Package QFN Micro Lead Frame Plastic Package MLFP L16 5x5 16 LEAD QUAD FLAT NO LEAD PLASTIC PACKAGE CONPLIANT TO JEDEC MO 220VHHB ISSUE C MILLIMETERS lt lt gt SYMBOL MIN NOMINAL MAX NOTES
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