ANALOG DEVICES AD926x Family 16-Bit 10 MHz Bandwidth Continuous-Time Sigma-Delta (CTSD) Analog-to-Digital Converters Manual
Contents
1. Amp ifia is Yyg Ming TIA AD926x Family 16 Bit 10 MHz Bandwidth Continuous Time Sigma Delta CTSD Analog to Digital Converters Features Excellent low noise wide bandwidth and high level of integration e SNR 84 5 dBFS to 10 MHz input e SFDR 87 dBc to 10 MHz input e Noise figure 15 dB e Input impedance of 1 KO e Power 350 mW channel e 1 8 V analog supply e 1 8 V to 3 3 V output supply e Output data rate 30 MSPS to 160 MSPS e Selectable bandwidth e 5 MHz 10 MHz 20 MHz complex e 2 5 MHz 5 MHz 10 MHz dual real e Integrated decimation filter e Integrated sample rate converter e Integrated PLL clock multiplier e Low drift voltage reference Benefits Simplifies system design e No antialias filters required e Removes need for driver amplifier e Simplifies or eliminates need for AGC e Relaxes system linearity requirements e Capable of high input voltage swings REDUCE PART COUNT REDUCE SYSTEM COST REDUCE DESIGN TIME analog is everywhere ANZ LHP ae New Family of CTSD ADCs Efficiently Achieves High Dynamic Range and Wide Bandwidth Performance Data converters play a pivotal role in a tremendously wide and growing range of electronic systems such as wireless communications medical imaging and instrumentation The rapidly escalating performance requirements of today s end applications are demanding ever increasing sampling speeds in combination with higher resolution superior noise pe2. decimation filters sample rate converter PLL decimation filters sample rate converter PLL decimation filters sample rate converter PLL PLL decimation filters sample rate converter FPGA DIGITAL PROCESSING Analog Devices Inc Worldwide Headquarters Analog Devices Inc One Technology Way P O Box 9106 Norwood MA 02062 9106 U S A Tel 781 329 4700 800 262 5643 U S A only Fax 781 461 3113 Analog Devices Inc Europe Headquarters Analog Devices Inc Wilhelm Wagenfeld Str 6 80807 Munich Germany Tel 49 89 76903 0 Fax 49 89 76903 157 Analog Devices Inc Japan Headquarters Analog Devices KK New Pier Takeshiba South Tower Building 1 16 1 Kaigan Minato ku Tokyo 105 6891 Japan Tel 813 5402 8200 Fax 813 5402 1064 Analog Devices Inc Southeast Asia Headquarters Analog Devices 22 F One Corporate Avenue 222 Hu Bin Road Shanghai 200021 China Tel 86 21 2320 8000 Fax 86 21 2320 8222 2008 Analog Devices Inc All rights reserved Trademarks and registered trademarks are the property of their respective owners Printed in the U S A ANALOG DEVICES PHO7863 15 11 08 www analog com AD9262
3. ation filter sample rate converter PLL clock multiplier and voltage reference The AD9267 is a 4 bit 640 MSPS modulator only version intended for offloading signal processing functions to FPGAs and other processors These unique features enabled by the CTSD architecture allow designers to significantly reduce or completely eliminate the need for antialiasing filters driver amplifiers and automatic gain control used in conventional designs thus reducing cost size power consumption and time to market for their products An example of this is shown above using the AD9262 in combination with ADI s high performance ADL5382 quadrature demodulator and AD9520 clock generation and distribution products to implement a high performance and low part count 700 MHz to 2 7 GHz direct conversion receiver The AD926x family is available in several different versions including channel count bandwidth and level of integration AD926x Continuous Time gt A Converter Family AD9262 16 BIT CTSD ADC TO Tx FPGA AD9262 AD9262 5 AD9262 10 AD9267 AD9261 10 16 16 16 4 bit modulator 16 16 bit CMOS 16 bit CMOS 16 bit CMOS 4 bit LVDS 16 bit CMOS AD9267 is a CTSD modulator providing 4 bit 640 MSPS LVDS output enabling 85 dBFS SNR over a dc to 10 MHz BW 9mm x 9mm 64 lead LFCSP 9mm x 9mm 64 lead LFCSP 9mm x 9mm 64 lead LFCSP 9mm x 9mm 64 lead LFCSP 7mm x 7mm 48 lead LFCSP PLL
4. rformance and lower power consumption Engineers typically have had to settle for a compromise between these challenging requirements With the advent of continuous time A analog to digital converters designers can achieve breakthrough performance in their designs without compromising on bandwidth noise performance power consumption and ease of use AVDD DRVDD Utilizing an innovative converter architecture the AD926x family of CTSD ADCs from Analog Devices offers up to 10 MHz of bandwidth with 86 dB dynamic range at only 350 mW channel This combination erre of performance characteristics enables designers to build next generation system architectures with fewer components running on less power in smaller form factors and with less design and test time than before VIN B VIN B AD9262 Block Diagram www analog com AD9262 ANALOG DEVICES iwen ee a as BSS K NS so Santas S i PS se 525 rD a oa PS 2 in aS J D15A CLK CLK R QpP158 as anla ES CTSD ADC System Level Benefits The AD926x family of CTSD ADCs offers significant Q ADL5382 j N IQ DEMODULATOR system level advantages to the design engineer H P by providing a high level of dynamic performance ne RS y Qe efficiency integration and ease of use NA 90 PHASE AEE SHIFTER Performance og The ADC provides an extremely low 15 dB noise figure which is nearly a 7 dB impro
5. vement over current state of the art wideband converters The low noise figure reduces the front end gain thereby relaxing linearity requirements in an RF system In addition the high dynamic range of 86 dB makes it possible to eliminate the automatic gain control commonly employed in many communication systems Furthermore the purely resistive 1 KO input structure of the converter significantly relaxes the requirements of the ADC driver amplifier This results in the AD926x requiring 3 dBm input power to achieve a 2 V p p input voltage swing which is 7 dBm lower than conventional switched capacitor input converters In fact if no additional gain is required in the system the driver can be completely eliminated Example Application Communication Receiver Efficiency At approximately 350 mW channel the AD926x is at least 2 lower in power consumption than converters with similar dynamic range noise performance and bandwidths In addition the high dynamic range and ease of input drive help reduce or eliminate signal chain components providing further reductions in system level power consumption The internal low pass loop filter response attenuates aliases and out of band signals thereby eliminating the need for an antialiasing filter at the input of the ADC and resulting in a reduction of system level components Integration In addition to their excellent performance and efficiency the AD9262 and AD9261 have an integrated digital decim
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ANALOG DEVICES AD926x Family 16 Bit 10 MHz Bandwidth Continuous Time Sigma Delta (CTSD) Analog to Di