FAIRCHILD AN-5001J handbook
Contents
1. www fairchildsemi com 147 TLOOS NV 1 XA1 1SOW2. A B 5 A B 74LVX3245 74LVX4245 LVX 3V 5VCMOS TR 4 5 5 5V 5VCMOS 2 7 3 6V 3V OE T R A 0 A oo 1 74LVX3245 1999 Fairchild Semiconductor Corporation ANS00439 74LVX3245 74LVX4245 5V 3V A B O V 1 74LVX3245 A V IO 3V 2 7 3 6V
3. AN 5001J CMOS LVX FAIRCHILD SEMICONDUCTOR TM CMOS LVX CMOS 74LVX3245 74LVX4245 74LVXC3245 74LVXC4245 3V 5VCMOS 5VCMOS V 3 5V LVX 2 A B
4. V OE V 4 74LVXC4245 A V I O 5V 4 5 5 5V B V I O 2 7 5 5V 0 RR ho 4 74LVX4245 T R V A V 1
5. Device Type Aside Floatable Pin OE IO Allowed 74LVX3245 Power up 1st Power up 2nd ramp Logic with Voc OV or Vaca Ne V 74LVX4245 0 Power up 1st Power up 2nd ramp Logic 6 No with Voca OV or V 3V 3V to 5 5V 74LVXC3245 Power up 1s configurable ramp Logic yes V and B with Vaca OV orV MO s wOE HIGH SV 2 7V to 5 5V Power up 1st configurable 74LVXC4245 ramp Logic yes V and B with Voc OV or Vac O s w OE HIGH www fairchildsemi com 74LVXC3245 74LVXC4245 V OE H B V 3V 5V MO T R H AtoB A IO
6. OE H CMOS LVXC B www fairchildsemi com 1 17 4 TLO0S NV XA1 4 SOW AN 5001J 3 74LVXC3245 A V O 3V 2 7 3 6V B V O 3 0 5 5V 0 NW Oo NM 3 74LVX3245 3 3V 5V 1
7. B V I O 5V 4 5 5 5V 2 74LVX4245 A V 1 O 5V 4 5 5 5V B V O 3V 2 7 3 6V 2 74LVX4245 A B 74LVXC3245 74LVXC4245 LVXC PCMCIA B IO 3V 5V LVXC V PCMCIA V PCMCIA 3V 5V OE T R A LVXC B V B O
8. LVXC 74LVX3245 74LVX4245 1 c 3 b
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