TEXAS INSTRUMENTS CDC304 OCTAL DIVIDE-BY-2 CIRCUIT/CLOCK DRIVER handbook
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1. INVOLVE POTENTIAL RISKS OF DEATH PERSONAL INJURY OR SEVERE PROPERTY OR ENVIRONMENTAL DAMAGE CRITICAL APPLICATIONS TI SEMICONDUCTOR PRODUCTS ARE NOT DESIGNED AUTHORIZED OR WARRANTED TO BE SUITABLE FOR USE IN LIFE SUPPORT DEVICES OR SYSTEMS OR OTHER CRITICAL APPLICATIONS INCLUSION OF TI PRODUCTS IN SUCH APPLICATIONS IS UNDERSTOOD TO BE FULLY AT THE CUSTOMER S RISK In order to minimize risks associated with the customer s applications adequate design and operating safeguards must be provided by the customer to minimize inherent or procedural hazards Tl assumes no liability for applications assistance or customer product design TI does not warrant or represent that any license either express or implied is granted under any patent right copyright mask work right or other intellectual property right of TI covering or relating to any combination machine or process in which such semiconductor products or services might be or are used Tl s publication of information regarding any third party s products or services does not constitute Tl s approval warranty or endorsement thereof Copyright 1998 Texas Instruments Incorporated2. the end of this data sheet PRODUCTION DATA information is current as of publication date Products conform to specifications per the terms of Texas Instruments l standard warranty Production processing does not necessarily include testing of all parameters EXAS POST OFFICE BOX 655303 DALLAS TEXAS 75265 1 Copyright 1995 Texas Instruments Incorporated CDC304 OCTAL DIVIDE BY 2 CIRCUIT CLOCK DRIVER SCAS325A JULY 1990 REVISED NOVEMBER 1995 logic diagram positive logic PRE m CLK 1 CLR 14 absolute maximum ratings over operating free air temperature range unless otherwise noted t Supply voltage VCC scteciecaekedeeieetedades gud trida u EE riiete i eri i Ana Ei a 7V MOW VONAGS V serepet kE EEE NE aN E TA R A TE R deena guests EEE EE EES 7V Maximum power dissipation at Ta 55 C in still air see Note 1 D package 0 77 W N package 25 1 2W Storage temperature range Tstg esse e eee eee ee 65 C to 150 C T Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device These are stress ratings only and functional operation of the device at these or any other conditions beyond those indicated under recommended operating conditions is not implied Exposure to absolute maximum rated conditions for extended periods may affect device reliability NOTE 1 The maximum package power dissipation is cal
3. CDC304 AV RS CDC304 OCTAL DIVIDE BY 2 CIRCUIT CLOCK DRIVER SCAS325A JULY 1990 REVISED NOVEMBER 1995 Replaces SN74AS304 D j A Maximum Output Skew of 1 ns Maximum Pulse Skew of 1 5 ns TTL Compatible Inputs and Outputs Center Pin Vcc and GND Configurations Minimize High Speed Switching Noise Package Options Include Plastic Small Ouitline D Package and Standard Plastic N 300 mil DIPs description The CDC304 contains eight flip flops designed to have low skew between outputs The eight outputs in phase with CLK toggle on successive CLK pulses Preset PRE and clear CLR inputs are provided to set the Q outputs high or low independent of the clock CLK input The CDC304 has output and pulse skew parameters tsk o and tsk p to ensure performance as a clock driver when a divide by two function is required The CDC304 is characterized for operation from 0 C to 70 C FUNCTION TABLE OUTPUTS Q1 Q8 L CLR PRE CLK H Lt Qo Qo t This configuration does not persist when PRE or CLR returns to its inactive high level logic symbol Q1 Q2 Q3 Q4 Q5 Q6 Q7 Q8 10 PRE 11 CLK 14 t This symbol is in accordance with ANSI IEEE Std 91 1984 and IEC Publication 617 12 Please be aware that an important notice concerning availability standard warranty and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at
4. culated using a junction temperature of 150 C and a board trace length of 300 mils except for the N package which has a trace length of zero For more information refer to the Package Thermal Considerations application note in the 1994 ABT Advanced BiCMOS Technology Data Book literature number SCBDO02B recommended operating conditions Voc Supply voltage 4 5 5 5 5 VIH High level input voltage VIL Low level input voltage IOH High level output current IOL Low level output current fclock Input clock frequency TA Operating free air temperature ki TEXAS INSTRUMENTS 2 POST OFFICE BOX 655303 DALLAS TEXAS 75265 CDC304 OCTAL DIVIDE BY 2 CIRCUIT CLOCK DRIVER SCAS325A JULY 1990 REVISED NOVEMBER 1995 electrical characteristics over recommended operating free air temperature range unless otherwise noted PARAMETER TEST CONDITIONS MIN TYPTtT MAX UNIT Voc 4 5 V IOH 2 mA Voc 4 5 V IO H 24 mA T All typical ane are at Voc 5 V Ta 25 C The output conditions have been chosen to produce a current that closely approximates one half of the true short circuit output current IOS NOTE 2 Icc is measured with CLK and PRE grounded then with CLK and CLR grounded timing requirements Twin MAX un fclock Clock frequency tw Pulse duration ns eow f e tsu Setup time before CLK CLR or PRE inactive 6 ns switching characteristics over recommended operating free air temperature range se
5. e Figure 1 FROM PARAMETER n ana TEST CONDITIONS MIN TYPT MAX UNIT tmaxS T E a a e ee tp oa e pe Ae ee RL 5002 C 10pF to 30 pF pe foe es Figure 2 t a RL 5002 C 10 pF to 30 pF o sk p o oF L L 10p p All typical values are at Vcc 5 V Ta 25 C fmax minimum values are at CL 0 to 30 pF wy TEXAS INSTRUMENTS POST OFFICE BOX 655303 DALLAS TEXAS 75265 3 CDC304 OCTAL DIVIDE BY 2 CIRCUIT CLOCK DRIVER SCAS325A JULY 1990 REVISED NOVEMBER 1995 CLR or PRE CLK PARAMETER MEASUREMENT INFORMATION From Output ___ Test Point Under Test a CL RL see Note A LOAD CIRCUIT 3 5 V 0 3 V 3 5 V 0 3 V VOH VOL NOTES A Cy includes probe and jig capacitance B Input pulses are supplied by generators having the following characteristics PRR lt 10 MHz tr 2 5 ns tf 2 5 ns Figure 1 Load Circuit and Voltage Waveforms ki TEXAS INSTRUMENTS POST OFFICE BOX 655303 DALLAS TEXAS 75265 CDC304 OCTAL DIVIDE BY 2 CIRCUIT CLOCK DRIVER SCAS325A JULY 1990 REVISED NOVEMBER 1995 PARAMETER MEASUREMENT INFORMATION CLR PRE a NC E E E ee 0 CLK gt t tpLH1 gt PACI Qi tpLH2 gt 4 gt _ tPHL2 Q2 tpLH3 lt gt gt _ tPHL3 Q3 Z N tPLH4 gt 4 gt tPHL4 Q4 tpLH5 4 gt 4 gt tPHL5 Q5 7 N tPLHe 4 gt lt gt tPHL6 Q6 tpLH7 gt
6. gt tPHL7 Q7 N tPLH8 4 gt lt gt tPHLs NOTES A tsk o CLK to Q is calculated as the greater of the following The difference between the fastest and slowest of tPLHn The difference between the fastest and slowest of tPHLn n B tsk p is defined at the greater of tPLHn tPHLn N 1 2 3 8 Figure 2 Waveforms for Calculation of tsk o and tsk p ki TEXAS INSTRUMENTS POST OFFICE BOX 655303 DALLAS TEXAS 75265 5 IMPORTANT NOTICE Texas Instruments and its subsidiaries Tl reserve the right to make changes to their products or to discontinue any product or service without notice and advise customers to obtain the latest version of relevant information to verify before placing orders that information being relied on is current and complete All products are sold subject to the terms and conditions of sale supplied at the time of order acknowledgement including those pertaining to warranty patent infringement and limitation of liability Tl warrants performance of its semiconductor products to the specifications applicable at the time of sale in accordance with Tl s standard warranty Testing and other quality control techniques are utilized to the extent TI deems necessary to support this warranty Specific testing of all parameters of each device is not necessarily performed except those mandated by government requirements CERTAIN APPLICATIONS USING SEMICONDUCTOR PRODUCTS MAY
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TEXAS INSTRUMENTS CDC304 OCTAL DIVIDE BY 2 CIRCUIT/CLOCK DRIVER handbook