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FAIRCHILD FQPF27P06 Manual

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1. Continued 12 25 20r ETF 8 EN E 15 F I 26 28 10H o9L i i X Notes c cz 1 Vs DN E 0 5 3X Notes j 2 2500A 1 Va 10V 2 1 135A 08 i i L i L 0 0 i i i 1 1 100 50 0 50 100 150 200 100 50 0 50 100 150 200 T Junction Temperature C T Junction Temperature C Figure 7 Breakdown Voltage Variation Figure 8 On Resistance Variation vs Temperature vs Temperature Paice sess 18 i Operation in This Area is Limited by R s 10 5 3 amp 8 a 10 3 Notes d 1 T 25 C 2 T 175 C 3 Single Pulse 10 1 0 L L if L L 10 10 10 25 50 75 100 125 150 175 Vps Drain Source Voltage V Te Case Temperature C Figure 9 Maximum Safe Operating Area Figure 10 Maximum Drain Current vs Case Temperature o o 2 i D 0 5 SZ 10 o H i D 21 x Notes 1 Z t 3 19 C W Max G 14 2 Duty Factor D t t E 8 T To Pow Ze solt o 05 ic a I k 10 i tate 0 02 I P 9 0177 nt N E single pulse 10 10 10 10 10 107 10 10 t Square W ave Pulse Duration sec Figure 11 Transient Thermal Response Curve 92001 Fairchild Semiconductor Corporation Rev A2 May 2001 90dZcddO4d Gate Charge Test Circuit amp Waveform Resistive Switching Test Circuit amp Waveforms Charge Vos t 92001 Fairchild Semiconductor Corporation Rev A2 May 2001 90dZ
2. TinyLogic DOME HiSeC Qs UHC EcoSPARK ISOPLANAR QT Optoelectronics UltraFET E2CMOSTM LittleFET Quiet Series VCX EnSigna MicroFET SLIENT SWITCHER FACT MICROWIRE SMART START FACT Quiet Series OPTOLOGIC Stealth DISCLAIMER FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY FUNCTION OR DESIGN FAIRCHILD DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT RIGHTS NOR THE RIGHTS OF OTHERS LIFE SUPPORT POLICY FAIRCHILD S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION As used herein 1 Life support devices or systems are devices or systems which a are intended for surgical implant into the body or b support or sustain life or c whose failure to perform when properly used in accordance with instructions for use provided in the labeling can be reasonably expected to result in significant injury to the user 2 A critical component is any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system or to affect its safety or effectiveness PRODUCT STATUS DEFINITIONS D
3. Static Drain Source I Vos 10 V Ip 8 5 A 18 07 o On Resistance es D 00992 n JFS Forward Transconductance Vps 30 V Ip 8 5A Note 4 12 Dynamic Characteristics Ciss Input Capacitance Vps 25 V Vos 0 V 1100 1400 pF Coss Output Capacitance f 1 0 MHz 510 660 pF Cras Reverse Transfer Capacitance 120 155 pF Switching Characteristics ld on Turn On Delay Time Vpp 30 V Ip 13 5 A 18 45 ns t Turn On Rise Time Rg 250 185 380 ns ld oft Turn Off Delay Time 30 70 ns lr Turn Off Fall Time Note 4 5 90 190 ns Qy Total Gate Charge Vps 48 V Ip 27 A 33 43 nC Qgs Gate Source Charge Ves 10 V 6 8 nC Qga Gate Drain Charge Note 4 5 18 nc Drain Source Diode Characteristics and Maximum Ratings ls Maximum Continuous Drain Source Diode Forward Current 17 A Jeu Maximum Pulsed Drain Source Diode Forward Current 68 A Vsp Drain Source Diode Forward Voltage Ves V lg 17 A 4 0 V trr Reverse Recovery Time Ves 0 V ls 27 A 105 SS ns Qr Reverse Recovery Charge de dt 100 A us Note 4 0 41 uc Notes 2001 Fairchild Semiconductor Corporation Rev A2 May 2001 90dZ24d04 Typical Characteristics o o Ross 0 Drain Source On Resistance o o 8 e 0 00 Ves Top 150V H 100V a a BON 70V 60V 55V aut ae E 10 sov EE Bottom 45V Ge See Pa B 2 i ZH x
4. a t 5 i Li Lice 10 X Notes E im S 1 250u s Pulse Test 2 T 25C 10 10 10 Vps Drain Source Voltage V Figure 1 On Region Characteristics 0 24 0 20 X Note T 25 C 3000 Ee 10 20 30 40 50 60 70 80 90 100 110 120 130 lp Drain Current A Figure 3 On Resistance Variation vs Drain Current and Gate Voltage Capacitance pF G C shorted Cu Cy VD Ca D Vps Drain Source Voltage V Figure 5 Capacitance Characteristics Vas Gate Source Voltage V 10 00 02 04 06 08 10 12 14 16 18 20 22 24 26 28 10 lt E 175 E 10 Lac 6 A X Notes 1 Vy 30V 2 2504 s Pulse Test P i i i 2 4 6 8 10 Na Gate Source Voltage V Figure 2 Transfer Characteristics y T e lt g a g vk E e WB oc olm i i i i H i 3X Notes s amp 1 Vs 0V R 2 2501 s Pulse Test 1 T L L l L L L T L L L L L Vsp Source Drain Voltage V Figure 4 Body Diode Forward Voltage Variation vs Source Current and Temperature X Note l 27 A i i 1 ji 1 10 15 20 25 30 35 Q Total Gate Charge nC Figure 6 Gate Charge Characteristics 2001 Fairchild Semiconductor Corporation Rev A2 May 2001 90dZ24d04 Typical Characteristics lp Drain Current A BV pss Normalized Drain Source Breakdown Voltage
5. cddO4d Peak Diode Recovery dv dt Test Circuit amp Waveforms Compliment of DUT N Channel e dv dt controlled by Ra Isp controlled by pulse period Gate Pulse Width Von Body Diode Forward Voltage Drop Body Diode Recovery dv dt Vas eeler Gate Pulse Period Driver l Body Diode Reverse Current SD DUT lou di dt Ip Body Diode Forward Current Vps Vsp DUT 92001 Fairchild Semiconductor Corporation Rev A2 May 2001 90dZ24d04 Package Dimensions TO 220F 10 16 0 20 93 18 0 10 2 54 10 20 o 7 00 0 70 m rg La SE ea Xa cl 8 E 8 Ke S ce Ti N S 3 1 00x45 i eo ceo 15 MAX1 47 0 80 0 10 9 75 0 30 E 1 0 35 0 10 0 10 as 0 50 5 05 _ _ 2 76 0 20 2 54TYP 2 54TYP 2 54 0 20 2 54 0 20 a 9 40 0 20 2 lt F l d 2001 Fairchild Semiconductor Corporation Rev A2 May 2001 90dZcddO4J TRADEMARKS The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is not intended to be an exhaustive list of all such trademarks ACEx FAST OPTOPLANAR SuperSOT 3 Bottomless FASTr PACMAN SuperSOT 6 CoolFET FRFET POP SuperSOT 8 CROSSVOLT GlobalOptoisolator PowerTrench SyncFET DenseTrench GTO QFET
6. efinition of Terms Advance Information Formative or In This datasheet contains the design specifications for Design product development Specifications may change in any manner without notice Preliminary First Production This datasheet contains preliminary data and supplementary data will be published at a later date Fairchild Semiconductor reserves the right to make changes at any time without notice in order to improve design No Identification Needed Full Production This datasheet contains final specifications Fairchild Semiconductor reserves the right to make changes at any time without notice in order to improve design Obsolete Not In Production This datasheet contains specifications on a product that has been discontinued by Fairchild semiconductor The datasheet is printed for reference information only 2001 Fairchild Semiconductor Corporation Rev H2
7. kw I FAIRCHILD May 2001 ucc xi SEMICONDUCTOR QFET FQPF27P06 60V P Channel MOSFET General Description Features These P Channel enhancement mode power field effect 17A 60V Rps o 0 072 Vas 10 V transistors are produced using Fairchild s proprietary Low gate charge typical 33 nC planar stripe DMOS technology Low Crss typical 120 pF This advanced technology has been especially tailored to Fast switching minimize on state resistance provide superior switching 100 avalanche tested performance and withstand a high energy pulse in the Improved dv dt capability avalanche and commutation modes These devices are 175 C maximum junction temperature rating well suited for low voltage applications such as automotive DC DC converters and high efficiency switching for power management in portable and battery operated products GDS TO 220F FQPF Series Absol ute Maxi mum Rati ngs Tc 25 C unless otherwise noted Symbol Parameter FQPF27P06 Vpss Drain Source Voltage 60 Ip Drain Current Continuous Tc 25 C 17 Continuous Tc 100 C 12 IDM Drain Current Pulsed 68 Gate Source Voltage 25 Single Pulsed Avalanche Energy 560 Avalanche Current 17 Repetitive Avalanche Energy 4 7 Peak Diode Recovery dv dt 7 0 Power Dissipation Tc 25 C 47 Derate above 25 C 0 31 Operating and Storage Temperature Range 55 to 175 Maximum lead temperature for soldering purposes 300 1 8 from case for 5
8. seconds Thermal Characteristics Symbol Parameter Rejc Thermal Resistance Junction to Case Rosa Thermal Resistance Junction to Ambient 2001 Fairchild Semiconductor Corporation Rev A2 May 2001 90dZcddO4J Elerical Characteristics Tc 25 C unless otherwise noted 2 L 2 25mH 3 Isp lt 27A lag 17A Vpp 25V Rg 25 Q Starting Tj 25 C di dt lt 300A us Vpp lt BVpss Starting Ty 25 C 4 Pulse Test Pulse width lt 300us Duty cycle lt 2 5 Essentially independent of operating temperature 1 Repetitive Rating Pulse width limited by maximum junction temperature Symbol Parameter Test Conditions Min Typ Max Units Off Characteristics BVpss Drain Source Breakdown Voltage Ves 0 V Ip 250 uA 60 V ABVpss Breakdown Voltage Temperature lp 250 uA Referenced to 25 C 0 vie ATJ Coefficient D 0 06 CS Joes I Vps 60 V Ves 0 V H 4 uA Zero Gate Voltage Drain Current Vos 48 V Tc 150 C 7 A0 T lassF Gate Body Leakage Current Forward Vas 25 V Vps 0 V 100 nA lassr Gate Body Leakage Current Reverse Vas 25 V Vps 0 V 100 nA On Characteristics Vasith Gate Threshold Voltage Vps Ves lp 250 pA 2 0 m 4 0 Rps on

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