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FAIRCHILD FQP9N30 300V N-Channel MOSFET handbook

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1. 35 iis grs Forward Transconductance Vps 50V Ip 4 5A Note 4 ER 4 9 Ex Dynamic Characteristics Ciss Input Capacitance Vps 25 V Veg 0 V 570 740 pF Coss Output Capacitance f 1 0 MHz 120 155 pF Criss Reverse Transfer Capacitance 16 20 pF Switching Characteristics lajon Turn On Delay Time Vpp 150 V Ip 9 0 A 16 40 ns t Turn On Rise Time Rg 250 120 250 ns la oft Turn Off Delay Time 27 65 ns tr Turn Off Fall Time Ne ESI 48 110 ns Qg Total Gate Charge Vps 240 V Ip 9 0 A 17 22 nC Qgs Gate Source Charge Veg 10V 3 9 nC Qga Gate Drain Charge Note 4 5 9 2 a nc Drain Source Diode Characteristics and Maximum Ratings ls Maximum Continuous Drain Source Diode Forward Current 9 0 A Ism Maximum Pulsed Drain Source Diode Forward Current 36 A Vsp Drain Source Diode Forward Voltage Ves 0 V Ig 9 0 A 1 5 V trr Reverse Recovery Time Ves 0 V Ig 9 0 A 170 ns Qr Reverse Recovery Charge dle dt 100 A us Note 4 s 14 Ed uC Notes 2000 Fairchild Semiconductor International Rev A May 2000 0 N6dOJ FQP9N30 Typical Characteristics Rogan 2 Drain Source On Resistance a T Capacitance pF 25 m T a T o T 00 i i i i 0 1200 Vas Top 150V L 1 100V i 80V R 70V E esv 60V Bottom 55V i iode cr e 5 0 10 lt
2. Reja Thermal Resistance Junction to Case Rocs Thermal Resistance Case to Sink Rosa Thermal Resistance Junction to Ambient 2000 Fairchild Semiconductor International Rev A May 2000 Electrical Characteristics Tc 25 C unless otherwise noted 4 Pulse Test Pulse width lt 300us Duty cycle lt 2 5 Essentially independent of operating temperature 1 Repetitive Rating Pulse width limited by maximum junction temperature 2 L 8 64mH las 9 0A Vpp 50V Re 25 Q Starting Ty 25 C 3 Isp 9 0A di dt lt 200A us Vpp lt BVpss Starting Ty 25 C Symbol Parameter Test Conditions Min Typ Max Units Off Characteristics BVpss Drain Source Breakdown Voltage Ves 0 V Ip 250 uA 300 V ABVpss Breakdown Voltage Temperature Ip 250 uA Referenced to 25 C AT Coefficient D 0 28 S Ipss Vps 300 V Vas 0 V z 1 uA Zero Gate Voltage Drain Current Vos 240 V Tc 125 C E 10 A lessF Gate Body Leakage Current Forward Vas 30 V Vps 0 V 100 nA lassrn Gate Body Leakage Current Reverse Vos 30 V Vps 0 V 400 nA On Characteristics Vesith Gate Threshold Voltage Vps Vas lp 250 pA 3 0 5 0 Rps on Static Drain Source Ves 10 V Ip 4 5 A On Resistance gt R 0
3. FQP9N30 sma ae SAH FAIRCHILD May 2000 ieee eek en ee ee QFET SEMICONDUCTOR m FQP9N30 300V N Channel MOSFET General Description Features These N Channel enhancement mode power field effect 9 0A 300V Rps on 0 452 Vgs 10 V transistors are produced using Fairchild s proprietary Low gate charge typical 17 nC planar stripe DMOS technology Low Crss typical 16 pF This advanced technology has been especially tailored to Fast switching minimize on state resistance provide superior switching 100 avalanche tested performance and withstand high energy pulse in the Improved dv dt capability avalanche and commutation mode These devices are well suited for high efficiency switching DC DC converters switch mode power supply Dg 4 TO 220 FQP Series Absol ute Maxi mum Rati ngs Tc 25 C unless otherwise noted Symbol Parameter FQP9N30 Vpss Drain Source Voltage 300 Ip Drain Current Continuous Tc 25 C 9 0 Continuous Tc 100 C 5 7 IDM Drain Current Pulsed 36 Gate Source Voltage 30 Single Pulsed Avalanche Energy 420 Avalanche Current 9 0 Repetitive Avalanche Energy 9 8 Peak Diode Recovery dv dt 4 5 Power Dissipation Tc 25 C 98 Derate above 25 C 0 78 Operating and Storage Temperature Range 55 to 150 Maximum lead temperature for soldering purposes 1 8 from case for 5 seconds 300 Thermal Characteristics Symbol Parameter
4. amp 7 X Notes 1 250 us Pulse Test 10 E ti i ctr RT 250 10 10 10 Vps Drain Source Voltage V Figure 1 On Region Characteristics X Note T 25 6 12 18 24 30 Drain Current A Figure 3 On Resistance Variation vs Drain Current and Gate Voltage G G shorted oss Cu Cu di G 2 s Vps Drain Source Voltage V Figure 5 Capacitance Characteristics 10 T 5 E 10 5 _ pa i 55 C 3 Notes 1 Vs 50V 2 250s Pulse Test i i 2 4 6 8 10 Vos Gate Source Voltage V Figure 2 Transfer Characteristics 10 5 E 5 5 10 L 8 i 5 m i ss Wen d amp 150C 25 1 cV 2 2504s Pulse Test 107 L L L L L 0 2 04 06 08 10 12 14 16 18 Vso Source Drain voltage V Figure 4 Body Diode Forward Voltage Variation vs Source Current and Temperature 12 10r o 89r amp B 8 2 gt 3 Note 9 0A L a 1 1 Q Total Gate Charge nC Figure 6 Gate Charge Characteristics 2000 Fairchild Semiconductor International Rev A May 2000 Typical Characteristics BV oss Normalized Drain Source Breakdown Voltage Continued 1 2 11 1 0 o9 3 Notes LING 0V l 250 HA 08 i I 1 i 100 50 0 50 100 150 200 T Junction Temperature C Figure 7 Breakdown Voltage Variati
5. cs CROSSVOLT HiSeC Quiet Series DOME ISOPLANAR SuperSOT 3 E CMOS MICROWIRE SuperSOT 6 EnSigna OPTOLOGIC SuperSOT 8 FACT OPTOPLANAR SyncFET FACT Quiet Series PORIN TinyLogic FAST PowerTrench UHC DISCLAIMER FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TOANY PRODUCTS HEREIN TO IMPROVE RELIABILITY FUNCTION OR DESIGN FAIRCHILD DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT RIGHTS NOR THE RIGHTS OF OTHERS LIFE SUPPORT POLICY FAIRCHILD S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION As used herein 1 Life support devices or systems are devices or 2 A critical component is any component of a life Systems which a are intended for surgical implant into support device or system whose failure to perform can the body or b support or sustain life or c whose be reasonably expected to cause the failure of the life failure to perform when properly used in accordance support device or system or to affect its safety or with instructions for use provided in the labeling can be effectiveness reasonably expected to result in significant injury to the user PRODUCT STATUS DEFINITIONS Definition of T
6. erms Advance Information Formative or This datasheet contains the design specifications for In Design product development Specifications may change in any manner without notice Preliminary First Production This datasheet contains preliminary data and supplementary data will be published at a later date Fairchild Semiconductor reserves the right to make changes at any time without notice in order to improve design No Identification Needed Full Production This datasheet contains final specifications Fairchild Semiconductor reserves the right to make changes at any time without notice in order to improve design Obsolete Not In Production This datasheet contains specifications on a product that has been discontinued by Fairchild semiconductor The datasheet is printed for reference information only
7. ild Semiconductor International Rev A May 2000 Peak Diode Recovery dv dt Test Circuit amp Waveforms Same Type as DUT Vop e dv dt controlled by Re Isp controlled by pulse period Gate Pulse Width Vas AD a aa aa a aa Gate Pulse Period Driver lem Body Diode Forward Current Isp DUT di dt la Body Diode Reverse Current Vos DUT Body Diode Recovery dv dt Body Diode Forward Voltage Drop 0 N6dOJ 2000 Fairchild Semiconductor International Rev A May 2000 FQP9N30 Package Dimensions TO 220 E 10 00 0 20 9 90 0 20 e 8 70 e 3 gt 93 60 0 10 2 4 I i i T 3 7 e gt R lt S S 9 s e 2 A S 3 QN wl 7 O lt e rT e c TOP S S Ex 9 S E 1273010 _ 152204 S 1 n 0 80 0 10 2 54TYP 2 54TYP 2 54 0 20 2 54 0 20 0 10 0 50 1005 4 50 0 20 1 30 0 05 0 10 2 40 0 20 2000 Fairchild Semiconductor International Rev A May 2000 TRADEMARKS The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is not intended to be an exhaustive list of all such trademarks ACEx FASTr QFET VCX Bottomless GlobalOptoisolator Qs CoolFET GTO QT Optoelectroni
8. on vs Temperature T 10 F i Operation in This Area E is Limited by R s 10 5 E md o E E zi d P lt s 8 E E E 3 Notes L 1 7 25 C 7 L 2 7 150 C 3 Single Pulse 10 1 10 10 10 Vos Drain Source Voltage V Figure 9 Maximum Safe Operating Area Roson Normalized Drain Source On Resistance lp Drain Current A 3 0 25r 20r 15r 1 0 F 3 Notes oor 1 Vgg 10V 21 4 5A 05 i i i i i 100 50 0 50 100 150 200 T Junction Temperature C Figure 8 On Resistance Variation vs Temperature 10 0 i i i 25 50 75 100 125 150 T Case Temperature C Figure 10 Maximum Drain Current vs Case Temperature aie C W Max 2 Duty Factor D t t 8 Ta Te Pom Zo t Z yt Thermal Response 10 10 ETL ty kadi 107 10 t Square W ave Pulse Duration sec Figure 11 Transient Thermal Response Curve 2000 Fairchild Semiconductor International Rev A May 2000 0 N6dOJ FQP9N30 Gate Charge Test Circuit amp Waveform Same Type as DUT 12V Charge Resistive Switching Test Circuit amp Waveforms 90 10 eh cm t on aa t off Unclamped Inductive Switching Test Circuit amp Waveforms BE BVpss up A BVpss Voo BVpss las Ip t Vpp Vps t Fa t Time 2000 Fairch

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