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FAIRCHILD FQAF16N50 500V N-Channel MOSFET handbook

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1. DESIGN FAIRCHILD DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT RIGHTS NOR THE RIGHTS OF OTHERS LIFE SUPPORT POLICY FAIRCHILD S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR INTERNATIONAL As used herein result in significant injury to the user 1 Life support devices or systems are devices or systems 2 A critical component is any component of a life support which a are intended for surgical implant into the body device or system whose failure to perform can be or b support or sustain life or c whose failure to perform reasonably expected to cause the failure of the life support when properly used in accordance with instructions for use device or system or to affect its safety or effectiveness provided in the labeling can be reasonably expected to PRODUCT STATUS DEFINITIONS Definition of Terms Advance Information Formative or In This datasheet contains the design specifications for Design product development Specifications may change in any manner without notice Preliminary First Production This datasheet contains preliminary data and supplementary data will be published at a later date Fairchild Semiconductor reserves the right to make changes at any time without notice in order to improv
2. amp fe fe a a a 10 zs 3K Notes m 4 7 25 C KARERE T 3 Single Pulse 10 L 0 i i i i 10 10 10 10 25 50 75 100 125 150 T Case Temperature C Figure 10 Maximum Drain Current vs Case Temperature Notes 1 Z t 1 14 CIW Max 2 Duty Factor D t It 3 Tay Te Pow Z sel Z 9 ThermalResponse single pulse zu d 10 10 107 107 107 10 10 t Square Wave Pulse Duration sec Figure 11 Transient Thermal Response Curve 02000 Fairchild Semiconductor International Rev A April 2000 OSN9LAVOS FQAF16N50 Gate Charge Test Circuit amp Waveform Same Type as DUT Charge Resistive Switching Test Circuit amp Waveforms 9096 10 GS m eun ton ta Unclamped Inductive Switching Test Circuit amp Waveforms BVoss Eas EC lag EE A Vy er 2 BVoss b Von BVoss las lp t Vbo Vps t l4 t Time 02000 Fairchild Semiconductor International Rev A April 2000 Peak Diode Recovery dv dt Test Circuit amp Waveforms Same Type as DUT Vpp dv dt controlled by Re Isp controlled by pulse period Gate Pulse Width Ves zoL E Gate Pulse Period Driver lem Body Diode Forward Current Isp DUT di dt Ig Body Diode Reverse Current Vps DUT Body Diode Recovery dv dt Body Diode F
3. 5 g 3H 064 a gg j 04 E E E 10 E B 150 0 25 02 7 5 i pi 3 Note T 25 C t i i i i 2 250 s Pulse Test 0 0 i i i i i 1 107 i i i i i i i 0 19 20 aD 20 m o 20 02 04 06 08 10 12 14 16 18 20 Drain Current A V Source Drain Voltage M Figure 3 On Resistance Variation vs Figure 4 Body Diode Forward Voltage Drain Current and Gate Voltage Variation vs Source Current and Temperature 12 10 D 3 gt eL 8 5 B 8 Bol i i i xut i d gt X Note 7 16A 0 i i i i i i y 10 10 0 10 20 30 40 50 60 70 A Total Gate Charge nC V Drain Source Voltage V Qs ge nC Figure 5 Capacitance Characteristics Figure 6 Gate Charge Characteristics 2000 Fairchild Semiconductor International Rev A April 2000 Typical Characteristics Vps Drain Source Voltage V Figure 9 Maximum Safe Operating Area Continued 12 30 25r 11r 8 E E 20 5 10F 5 amp 15F t E p g do 10F Boo F 3 Noles amp 1 V 0V amp amp 21 204A o5 d i i i i i id 1 100 50 0 50 100 150 200 100 50 0 50 100 150 200 T Junction Temperature C T Junction Temperature C Figure 7 Breakdown Voltage Variation Figure 8 On Resistance Variation vs Temperature vs Temperature I T 15 Operation in This Area 10 is Limited by R pg E 10 z E 2 10 me 3 bo 3
4. FQAF16N50 April 2000 QFET E FAIRCHILD E SEMICONDUCTOR w FQAF16N50 500V N Channel MOSFET General Description Features These N Channel enhancement mode power field effect 11 3A 500V Rps on 0 320 Vas 10 V transistors are produced using Fairchild s proprietary Low gate charge typical 60 nC planar stripe DMOS technology Low Crss typical 35 pF This advanced technology has been especially tailored to Fast switching minimize on state resistance provide superior switching 100 avalanche tested performance and withstand high energy pulse in the Improved dv dt capability avalanche and commutation mode These devices are well suited for high efficiency switch mode power supply power factor correction electronic lamp ballast based on half bridge TO 3PF GDS FQAF Series Absol ute Maximu m Ratings Tg 25 C unless otherwise noted Symbol Parameter FQAF16N50 Vpss Drain Source Voltage 500 Ip Drain Current Continuous Tc 25 C 11 3 Continuous Tc 100 C 7 15 lpm Drain Current Pulsed 45 2 Gate Source Voltage 30 Single Pulsed Avalanche Energy 980 Avalanche Current 11 3 Repetitive Avalanche Energy 11 Peak Diode Recovery dv dt 4 5 Power Dissipation Tc 25 C 110 Derate above 25 C 0 88 Operating and Storage Temperature Range 55 to 150 Maximum lead temperature for soldering purposes 1 8 from case for 5 seconds 200 Thermal Char
5. Forward Transconductance Vps 50 V Ip 5 65A Note 4 11 Dynamic Characteristics Ciss Input Capacitance Vos 25 V Vas 0 V 2300 3000 pF Coss Output Capacitance f 1 0 MHz 325 420 pF Cras Reverse Transfer Capacitance 35 45 pF Switching Characteristics ta on Turn On Delay Time Vpp 250 V Ip 16 A 45 100 ns t Turn On Rise Time Rg 250 180 370 ns ta off Turn Off Delay Time 130 270 ns tr Turn Off Fall Time Note 4 5 E 49015210 ns Qg Total Gate Charge Vps 400 V Ip 16 A 60 75 nC Qgs Gate Source Charge Vas 10V 14 x nC Qoa Gate Drain Charge Note 4 5 28 8 nC Drain Source Diode Characteristics and Maximum Ratings ls Maximum Continuous Drain Source Diode Forward Current 11 3 A Ism Maximum Pulsed Drain Source Diode Forward Current 45 2 A Vsp Drain Source Diode Forward Voltage Ves 0 V lg 11 3A cz 1 4 V m Reverse Recovery Time Ves 0 V lg 16 A 340 ns Qr Reverse Recovery Charge dle dt 100 A us Note 4 3 2 uC Notes 2000 Fairchild Semic onductor International Rev A April 2000 OSN9LAVOS FQAF16N50 Typical Characteristics 10 Go Zz E s 5 amp 16 a 4 10 10 10 10 10 2 4 6 8 10 Vis Drain Source Voltage V Vos Gate Source Voltage V Figure 1 On Region Characteristics Figure 2 Transfer Characteristics 10 08 T g a
6. acteristics Symbol Parameter ReJc Thermal Resistance Junction to Case Raya Thermal Resistance Junction to Ambient 2000 Fairchild Semiconductor International Rev A April 2000 Electrical Characteristics Tc 25 C unless otherwise noted 4 Pulse Test Pulse width lt 300us Duty cycle lt 2 5 Essentially independent of operating temperature 1 Repetitive Rating Pulse width limited by maximum junction temperature 2 L 13 8mH las 11 3A Vpp 50V Rg 25 Q Starting Ty 25 C 3 Isp 16A di dt lt 200A us Vpp BVpss Starting T 25 C Symbol Parameter Test Conditions Min Typ Max Units Off Characteristics BVpss Drain Source Breakdown Voltage Ves 0 V lp 250 uA 500 zx zx V ABVpss Breakdown Voltage Temperature lp 250 uA Ref d to 25 C 2 E o I AT Coefficient D PASOS PRU 0 33 MES I Vos 500 V Veg 0 V 1 A DSS Zero Gate Voltage Drain Current m 400 V T 125 C 10 lessr Gate Body Leakage Current Forward Vas 30 V Vps 0 V zs 100 nA lessr Gate Body Leakage Current Reverse Vas 30 V Vps 0 V 2 Es 100 nA On Characteristics Vestth Gate Threshold Voltage Vos Vos lp 250 uA 3 0 5 0 Rps on Static Drain Source On Resistance Ves 10 V Ip 5 65 A 0 25 0 32 Q Ors
7. e design No Identification Needed Full Production This datasheet contains final specifications Fairchild Semiconductor reserves the right to make changes at any time without notice in order to improve design Obsolete Not In Production This datasheet contains specifications on a product that has been discontinued by Fairchild semiconductor The datasheet is printed for reference information only 2000 Fairchild Semiconductor International Rev A January 2000
8. orward Voltage Drop OSN9LAVOS 2000 Fairchild Semiconductor International Rev A April 2000 FQAF16N50 Package Dimensions TO 3PF 5 50 0 20 S 15 50 0 20 93 60 0 20 3 00 0 20 e 1 50 LO y i Q 5 e e o o DO men EN S E D 2 138 P a OF o A o o a a a o N o HH A o l e Fi 2 n Fi 9 ai B e 8 g 2 A T e FI co D id I roy e I 1 2 00 0 20 Ex 2 00 0 20 BR 2 00 0 20 2 00 40 20 ES 4 00 0 20 Y 3 30 0 20 0 75 70 20 pos m 5 45TYP 5 45TYP 0 20 5 45 0 30 5 45 0 30 0 90 0 10 TI l gl el 8 8 Ss D ceo N LO 02000 Fairchild Semiconductor International Rev A April 2000 TRADEMARKS The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is not intended to be an exhaustive list of all such trademarks ACEx HiSeC SuperSOT 8 Bottomless ISOPLANAR SyncFET CoolFET MICROWIRE TinyLogic CROSSVOLT POP UHC E CMOS TM PowerTrench VOX FACT QFET FACT Quiet Series Qs FAST Quiet Series FASTr SuperSOT 3 GTO SuperSOT 6 DISCLAIMER FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY FUNCTION OR

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