MOTOROLA MMSF4P01HD handbook
Contents
1. M MOTOROLA Motorola Inc 1996 MMSF4P01HD ELECTRICAL CHARACTERISTICS Tc 25 C unless otherwise noted 1 haste Sem e me uw OFF CHARACTERISTICS Drain Source Breakdown Voltage V BR DSS Vdc Vas 0 Vac Ip 250 uAdc 12 Temperature Coefficient Positive 22 mV C Zero Gate Voltage Drain Current Ipss uAdc Vps 12 Vdc Vas 0 Vdc 1 0 Vps 12 Vdc Vas 0 Vdc Ty 125 C 10 Gate Body Leakage Current Vas 8 0 Vdc Vps 0 lass 1 made ON CHARACTERISTICS 2 Gate Threshold Voltage Vps Vas Ip 250 wAde Temperature Coefficient Negative Static Drain to Source On Resistance VGS 4 5 Vdc Ip 4 0 Adc Vas 2 7 Vde Ip 2 0 Adc Forward Transconductance Vps 2 5 Vdc Ip 2 0 Adc 7 0 omes DYNAMIC CHARACTERISTICS Input Capacitance Vps 10 Vdc VGs 0 Vac Output Capacitance f 1 0 MHz Reverse Transfer Capacitance SWITCHING CHARACTERISTICS 3 Turn On Delay Time Rise Time Vps 6 0 Vde Ip 4 0 Adc Vas 2 7 Vac Turn Off Delay Time RG 6 0 Q Fall Time Turn On Delay Time Rise Time Vpp 6 0 Vde Ip 4 0 Adc Vas 4 5 Vac Turn Off Delay Time RG 6 0 9 Fall Time Gate Charge Vps 10 Vac Ip 4 0 Adc VGs 4 5 Vdc SOURCE DRAIN DIODE CHARACTERISTICS 2 Forward On Voltage 2 ls 4 0 Ade VGS 0 Vdo Is 4 0 Adc VGs 0 Vdc Ty 125 C Reverse Recovery Time Ig 4 0 Adc VGs 0 Vdc2. dis dt 100 A us Reverse Recovery Stored Charge 1 Negative sign for P Channel device omitted for clarity 2 Pulse Test Pulse Width lt 300 us Duty Cycle lt 2 3 Switching characteristics are independent of operating junction temperature 2 Motorola TMOS Power MOSFET Transistor Device Data MMSF4P01HD TYPICAL ELECTRICAL CHARACTERISTICS p DRAIN CURRENT AMPS 0 0 02 04 06 08 1 12 14 16 18 2 Vps DRAIN TO SOURCE VOLTAGE VOLTS Figure 1 On Region Characteristics 0 16 0 12 0 08 0 04 Vps 2 10 V p DRAIN CURRENT AMPS 0 1 0 09 0 08 0 07 1 2 14 1 6 1 8 2 2 2 24 Vas GATE TO SOURCE VOLTAGE VOLTS Figure 2 Transfer Characteristics Ty 25 C Ves 2 7V Rps on DRAIN TO SOURCE RESISTANCE OHMS 0 2 4 6 8 VGs GATE TO SOURCE VOLTAGE VOLTS Figure 3 On Resistance versus Gate To Source Voltage NORMALIZED DRAIN TO SOURCE RESISTANCE Rps on 50 25 0 25 50 75 100 125 150 TJ JUNCTION TEMPERATURE C Figure 5 On Resistance Variation with Temperature Motorola TMOS Power MOSFET Transistor Device Data RDS on DRAIN TO SOURCE RESISTANCE OHMS 100 Ipgg LEAKAGE nA Ip DR
3. MQOTOROLA D 0 0 Order this document SEMICONDUCTOR TECHNICAL DATA by MMSF4P01HD D Designers Data Sheet Medium Power Surface Mount Products MMSF4P01HD TM oS pP Chan nel Motorola Preferred Device Field Effect Transistors SINGLE TMOS POWER FET MiniMOS devices are an advanced series of power MOSFETs 4 0 AMPERES which utilize Motorola s High Cell Density HDTMOS process 12 VOLTS These miniature surface mount MOSFETs feature ultra low RDS on RDS on 0 08 OHM and true logic level performance They are capable of withstanding high energy in the avalanche and commutation modes and the drain to source diode has a very low reverse recovery time MiniMOS devices are designed for use in low voltage high speed switching applications where power efficiency is important Typical applications are dc dc converters and power management in i coi portable and battery powered products such as computers printers cellular and cordless phones They can also be used for low voltage motor controls in mass storage products such as disk drives and tape drives G CASE 751 05 Style 13 SO 8 e Ultra Low RDS on Provides Higher Efficiency and Extends Battery Life Logic Level Gate Drive Can Be Driven by Logic ICs e Miniature SO 8 Surface Mount Package Saves Board Space N C Diode Is Characterized for Use In Bridge Circuits Diode Exhibits High Speed With Soft Recovery e Ipss Specified at El
4. between the board and the package With the correct pad geometry the packages will self align when subjected to a solder reflow process 0 060 1 52 E M 0 155 4 0 ER A 0 024 l l p 0 050 0 6 1270 inches mm SO 8 POWER DISSIPATION The power dissipation of the SO 8 is a function of the input pad size This can vary from the minimum pad size for soldering to the pad size given for maximum power dissipation Power dissipation for a surface mount device is determined by TJ max the maximum rated junction temperature of the die RgJA the thermal resistance from the device junction to ambient and the operating temperature TA Using the values provided on the data sheet for the SO 8 package Pp can be calculated as follows Pp TJ max TA ReJA The values for the equation are found in the maximum ratings table on the data sheet Substituting these values into the equation for an ambient temperature Ta of 25 C one can calculate the power dissipation of the device which in this case is 2 5 Watts 150 C 25 C 50 C W 2 5 Watts The 50 C W for the SO 8 package assumes the recommended footprint on a glass epoxy printed circuit board to achieve a power dissipation of 2 5 Watts using the footprint shown Another alternative would be to use a ceramic substrate or an aluminum core board such as Thermal Clad Using board material such as Thermal Clad the power dissipation can be doubled usin
5. max 0 01 0 1 1 10 100 Vps DRAIN TO SOURCE VOLTAGE VOLTS Figure 12 Maximum Rated Forward Biased Safe Operating Area Motorola TMOS Power MOSFET Transistor Device Data MMSF4P01HD TYPICAL ELECTRICAL CHARACTERISTICS 10 a wm W 2 1 D 05 ty Eo 0 2 gt wn E ul 0 1 Oo 0 1 Hz 0 05 Normalized to 6ja at 10s ul gn 0 0 Chip 0 01632 0 0652 0 19882 06440 095020 J SE 0 01 SIMI NEST SEM 0 01 1 Tow F Tos F Toss F Tow F Trener Ambient J SINGLE PULSE 1 0 001 1 0E 05 1 0E 04 1 0E 08 1 0E 02 1 0E 01 1 0E 00 1 0E 01 1 0E 02 1 0E 03 t TIME s Figure 13 Thermal Response TIME Figure 14 Diode Reverse Recovery Waveform Motorola TMOS Power MOSFET Transistor Device Data 7 MMSF4P01HD INFORMATION FOR USING THE SO 8 SURFACE MOUNT PACKAGE MINIMUM RECOMMENDED FOOTPRINT FOR SURFACE MOUNTED APPLICATIONS Surface mount board layout is a critical portion of the total design The footprint for the semiconductor packages must be the correct size to ensure proper solder connection interface
6. 25 0 10 0 25 79 6 20 0 50 Exe Ze m 7 og m E Apo EUOO O OOUuUc o m 2g SEATING PLANE sx D 0 25 0 010 T B z v z ce o m o oj wvo CASE 751 05 SO 8 ISSUE P Motorola reserves the right to make changes without further notice to any products herein Motorola makes no warranty representation or guarantee regarding the suitability of its products for any particular purpose nor does Motorola assume any liability arising out of the application or use of any product or circuit and specifically disclaims any and all liability including without limitation consequential or incidental damages Typical parameters which may be provided in Motorola datasheets and or specifications can and do vary in different applications and actual performance may vary overtime All operating parameters including Typicals must be validated for each customer application by customer s technical experts Motorola does not convey any license under its patent rights nor the rights of others Motorola products are not designed intended or authorized for use as components in systems intended for surgical implant into the body or other applications intended to support or sustain life or for any other application in which the failure of the Motorola product could create a situation where pe
7. AIN CURRENT AMPS Figure 4 On Resistance versus Drain Current and Gate Voltage 100 C 3 6 9 12 Vps DRAIN TO SOURCE VOLTAGE VOLTS Figure 6 Drain To Source Leakage Current versus Voltage MMSF4P01HD POWER MOSFET SWITCHING Switching behavior is most easily modeled and predicted by recognizing that the power MOSFET is charge controlled The lengths of various switching intervals At are deter mined by how fast the FET input capacitance can be charged by current from the generator The published capacitance data is difficult to use for calculat ing rise and fall because drain gate capacitance varies greatly with applied voltage Accordingly gate charge data is used In most cases a satisfactory estimate of average input current IG AV can be made from a rudimentary analysis of the drive circuit so that t Q IG AV During the rise and fall time interval when switching a resis tive load VGS remains virtually constant at a level known as the plateau voltage Vsqp Therefore rise and fall times may be approximated by the following tr Q2 x RG VGG VasP tt Qo x RG VGSP where VGG the gate drive voltage which varies from zero to VGG RG the gate drive resistance and Qo and VGsSP are read from the gate charge curve During the turn on and turn off delay times gate current is not constant The simplest calcu
8. ed to minimize common inductance in the drain and gate circuit loops and is believed readily achievable with board mounted components Most power electronic loads are inductive the data in the figure is taken with a resistive load which approximates an optimally snubbed inductive load Power MOSFETs may be safely op erated into an inductive load however snubbing reduces switching losses 4800 Vps 0V Ves 0V Ty 25 C 4000 Gi amp 3200 Lu z amp 2400 o 5 Cres 3 1600 Giss o 800 Gass C 0 ss 8 4 0 4 8 12 Ves Vps GATE TO SOURCE OR DRAIN TO SOURCE VOLTAGE VOLTS Figure 7 Capacitance Variation Motorola TMOS Power MOSFET Transistor Device Data VGS GATE TO SOURCE VOLTAGE VOLTS 0 5 10 15 20 25 QG TOTAL GATE CHARGE nC Figure 8 Gate To Source and Drain To Source Voltage versus Total Charge SL10N SOVIIOA 39uf0S 01 NIVHG SOA MMSF4PO1HD 1000 100 t TIME ns 10 1 10 100 RG GATE RESISTANCE OHMS Figure 9 Resistive Switching Time Variation versus Gate Resistance DRAIN TO SOURCE DIODE CHARACTERISTICS The switching characteristics of a MOSFET body diode are very important in systems using it as a freewheeling or commutating diode Of particular int
9. erest are the reverse re covery characteristics which play a major role in determining switching losses radiated noise EMI and RFI System switching losses are largely due to the nature of the body diode itself The body diode is a minority carrier de vice therefore it has a finite reverse recovery time trr due to the storage of minority carrier charge QRR as shown in the typical reverse recovery wave form of Figure 14 It is this stored charge that when cleared from the diode passes through a potential and defines an energy loss Obviously repeatedly forcing the diode through reverse recovery further increases switching losses Therefore one would like a diode with short trr and low QRR specifications to minimize these losses The abruptness of diode reverse recovery effects the amount of radiated noise voltage spikes and current ring ing The mechanisms at work are finite irremovable circuit parasitic inductances and capacitances acted upon by high di dts The diode s negative di dt during t is directly con trolled by the device clearing the stored charge However the positive di dt during th is an uncontrollable diode charac teristic and is usually the culprit that induces current ringing Therefore when comparing diodes the ratio of tp t serves as a good indicator of recovery abruptness and thus gives a comparative estimate of probable noise generated A ratio of 1 is considered ideal and values less than 0 5 are con
10. evated Temperature e Mounting Information for SO 8 Package Provided Gate Source Source MAXIMUM RATINGS Ty 25 C unless otherwise noted 1 Drain to Source Voltage Drain to Gate Voltage Rs 1 0 MQ Gate to Source Voltage Continuous Drain Current Continuous TA 25 C Continuous 9 TA 100 C Single Pulse tp 10 us Total Power Dissipation TA 25 C 2 Operating and Storage Temperature Range Thermal Resistance Junction to Ambient 2 RoJA Maximum Lead Temperature for Soldering Purposes 1 8 from case for 10 seconds 260 DEVICE MARKING S4P01 1 Negative sign for P Channel device omitted for clarity 2 Mounted on 2 square FR4 board 1 sq 2 oz Cu 0 06 thick single sided 10 sec max ORDERING INFORMATION Device Tape Width Quantity MMSF4P01HDR2 12 mm embossed tape 2500 units Designer s Data for Worst Case Conditions The Designer s Data Sheet permits the design of most circuits entirely from the information presented SOA Limit curves representing boundaries on device characteristics are given to facilitate worst case design Designer s HDTMOS and MiniMOS are trademarks of Motorola Inc TMOS is a registered trademark of Motorola Inc Thermal Clad is a trademark of the Bergquist Company Preferred devices are Motorola recommended choices for future use and best overall value REV 5
11. g the same footprint SOLDERING PRECAUTIONS The melting temperature of solder is higher than the rated temperature of the device When the entire device is heated to a high temperature failure to complete soldering within a short time could result in device failure Therefore the following items should always be observed in order to minimize the thermal stress to which the devices are subjected e Always preheat the device e The delta temperature between the preheat and soldering should be 100 C or less e When preheating and soldering the temperature of the leads and the case must not exceed the maximum temperature ratings as shown on the data sheet When using infrared heating with the reflow soldering method the difference shall be a maximum of 10 C e The soldering temperature and time shall not exceed 260 C for more than 10 seconds e When shifting from preheating to soldering the maximum temperature gradient shall be 5 C or less e After soldering has been completed the device should be allowed to cool naturally for at least three minutes Gradual cooling should be used as the use of forced cooling will increase the temperature gradient and result in latent failure due to mechanical stress e Mechanical stress or shock should not be applied during cooling Soldering a device without preheating can cause excessive thermal shock and stress which can result in damage to the device Motorola TMOS Power MOSFET Trans
12. istor Device Data MMSF4P01HD TYPICAL SOLDER HEATING PROFILE For any given circuit board there will be a group of control settings that will give the desired heat pattern The operator must set temperatures for several heating zones and a figure for belt speed Taken together these control settings make up a heating profile for that particular circuit board On machines controlled by a computer the computer remembers these profiles from one operating session to the next Figure 15 shows a typical heating profile for use when soldering a surface mount device to a printed circuit board This profile will vary among soldering systems but it is a good starting point Factors that can affect the profile include the type of soldering System in use density and types of components on the board type of solder used andthe type of board or substrate material being used This profile shows temperature versus time The line on the graph shows the actual temperature that might be experienced on the surface of a test board at or near a central solder joint The two profiles are based on a high density and a low density board The Vitronics SMD310 convection in frared reflow soldering system was used to generate this profile The type of solder used was 62 36 2 Tin Lead Silver with a melting point between 177 189 C When this type of furnace is used for solder reflow work the circuit boards and solder joints tend to heat first The component
13. lation uses appropriate val ues from the capacitance curves in a standard equation for voltage change in an RC network The equations are td on RG Ciss In VGG Vaa VasP l td off RG Ciss In VaG VGsP The capacitance Ciss is read from the capacitance curve at a voltage corresponding to the off state condition when cal culating td on and is read at a voltage corresponding to the on state when calculating tg off At high switching speeds parasitic circuit elements com plicate the analysis The inductance of the MOSFET source lead inside the package and in the circuit wiring which is common to both the drain and gate current paths produces a voltage at the source which reduces the gate drive current The voltage is determined by Ldi dt but since di dt is a func tion of drain current the mathematical solution is complex The MOSFET output capacitance also complicates the mathematics And finally MOSFETS have finite internal gate resistance which effectively adds to the resistance of the driving source but the internal resistance is difficult to mea sure and consequently is not specified The resistive switching time variation versus gate resis tance Figure 9 shows how typical switching performance is affected by the parasitic circuit elements If the parasitics were not present the slope of the curves would maintain a value of unity regardless of the switching speed The circuit used to obtain the data is construct
14. rsonal injury or death may occur Should Buyer purchase or use Motorola products for any such unintended or unauthorized application Buyer shall indemnify and hold Motorola and its officers employees subsidiaries affiliates and distributors harmless against all claims costs damages and expenses and reasonable attorney fees arising out of directly or indirectly any claim of personal injury or death associated with such unintended or unauthorized use even if such claim alleges that Motorola was negligent regarding the design or manufacture of the part Motorola and are registered trademarks of Motorola Inc Motorola Inc is an Equal Opportunity Affirmative Action Employer How to reach us USA EUROPE Locations Not Listed Motorola Literature Distribution JAPAN Nippon Motorola Ltd Tatsumi SPD JLDC 6F Seibu Butsuryu Center P O Box 20912 Phoenix Arizona 85036 1 800 441 2447 or 602 303 5454 3 14 2 Tatsumi Koto Ku Tokyo 135 Japan 03 81 3521 8315 MFAX RMFAX0 email sps mot com TOUCHTONE 602 244 6609 ASIA PACIFIC Motorola Semiconductors H K Ltd 8B Tai Ping Industrial Park INTERNET http Design NET com 51 Ting Kok Road Tai Po N T Hong Kong 852 26629298 M MOTOROLA MMSF4P01HD D
15. s on the board are then heated by conduction The circuit board because it has a large surface area absorbs the thermal energy more efficiently then distributes this energy to the components Because of this effect the main body of a component may be up to 30 degrees cooler than the adjacent solder joints STEP STEP2 STEP3 STEP 4 STEP5 STEP6 STEP 7 PREHEAT VENT HEATING HEATING HEATING VENT COOLING ZONE1 SOAK ZONES2 amp 5 ZONES3 amp 6 ZONES4 amp 7 RAMP RAMP SOAK SPIKE 205 TO 219 C 200 C E PEAK AT DESIRED CURVE FOR HIGH 170 C STEER ONT MASS ASSEMBLIES 160 C 150 C 150 C 14 100 C MASS ASSEMBLIES 50 C DESIRED CURVE FOR LOW SOLDER IS LIQUID FOR 40 TO 80 SECONDS DEPENDING ON MASS OF ASSEMBLY 0 C TIME 3 TO 7 MINUTES TOTAL TMAX Figure 15 Typical Solder Heating Profile Motorola TMOS Power MOSFET Transistor Device Data MMSF4P01HD PACKAGE DIMENSIONS MENSIONS A AND B ARE DATUMS AND T IS A ATUM SURFACE MENSIONING AND TOLERANCING PER ANSI 4 5M 1982 MENSIONS ARE IN MILLIMETER MENSION A AND B DO NOT INCLUDE MOLD ROTRUSION AXIMUM MOLD PROTRUSION 0 15 PER SIDE MENSION D DOES NOT INCLUDE MOLD ROTRUSION ALLOWABLE DAMBAR ROTRUSION SHALL BE 0 127 TOTAL IN EXCESS F THE D DIMENSION AT MAXIMUM MATERIAL DITION MILLIMETERS MIN MAX 4 80 5 00 3 80 4 00 1 35 1 75 0 35 0 49 0 40 1 25 1 27 BSC 0 18 0
16. sidered snappy Compared to Motorola standard cell density low voltage MOSFETs high cell density MOSFET diodes are faster shorter trr have less stored charge and a softer reverse re covery characteristic The softness advantage of the high cell density diode means they can be forced through reverse recovery at a higher di dt than a standard cell MOSFET diode without increasing the current ringing or the noise gen erated In addition power dissipation incurred from switching the diode will be less due to the shorter recovery time and lower switching losses 4 Vas 0V Ty 25 C 3 2 Ig SOURCE CURRENT AMPS 0 03 04 05 06 07 08 09 1 11 12 13 Vsp SOURCE TO DRAIN VOLTAGE VOLTS Figure 10 Diode Forward Voltage versus Current Motorola TMOS Power MOSFET Transistor Device Data MMSF4P01HD di dt 300 A us Standard Cell Density trr High Cell Density i trr th ta Is SOURCE CURRENT t TIME Figure 11 Reverse Recovery Time trr SAFE OPERATING AREA The Forward Biased Safe Operating Area curves define the maximum simultaneous drain to source voltage and drain current that a transistor can handle safely when it is for ward biased Curves are based upon maximum peak junc tion temperature and a case temperature TC of 25 C Peak repetitive pulsed power limits are determined b
17. y using the thermal response data in conjunction with the procedures discussed in AN569 Transient Thermal Resistance Gen eral Data and Its Use Switching between the off state and the on state may tra verse any load line provided neither rated peak current IDM nor rated voltage Vpss is exceeded and that the transition time tr tf does not exceed 10 us In addition the total power averaged over a complete switching cycle must not exceed TJ MAX TO ReJC A power MOSFET designated E FET can be safely used in switching circuits with unclamped inductive loads For reli able operation the stored energy from circuit inductance dis sipated in the transistor while in avalanche must be less than the rated limit and must be adjusted for operating conditions differing from those specified Although industry practice is to rate in terms of energy avalanche energy capability is not a constant The energy rating decreases non linearly with an increase of peak current in avalanche and peak junction tem perature 100 Vas 10V SINGLE PULSE x 10 ms z Fa T gt f EE 1 2 o z T T RDs on LMI 3 01 THERMAL LIMIT icc PACKAGE LIMIT Mounted on 2 sq FR4 board 1 sq 2 oz Cu 0 06 thick single sided 10s
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MOTOROLA MMSF4P01HD handbook