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FAIRCHILD FDMC510P Manual

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1. Tl m g Typical Characteristics 1 25 c unless otherwise noted O1 mach 20000 eo S H ul 10000 kb S E Ciss LL S S D Lu e z 5 o E D o o O z H T 100 SC 2 a m f 1 MHz pd Ves 0V o Criss SS 0 20 40 60 80 100 0 1 1 10 20 Qg GATE CHARGE nC Vps DRAIN TO SOURCE VOLTAGE V o bat amp Figure 7 Gate Charge Characteristics Figure8 Capacitancevs Drain to Source Voltage O o Tl 20 60 A T lt E 10 S Lu B Ty 25 C e 2 tc 3 T Ty 100 C z z a m a lt Ty 125 C T lt E Limited by Package Rouc 3 C W 1 0 0 1 1 10 100 1000 25 50 75 100 125 150 tay TIME IN AVALANCHE ms Te CASE TEMPERATURE C Figure9 UnclampedlInductive Figure 10 Maximum Continuous Drain Switching Capability Current vs Case Temperature 100 1000 TRU el Ir FEIS SINGLE PULSE 10 PARA L N I i Roya 125 C W CN t EI N 1 ms Oo 100 Tas 25 C Ww a N Tur ON Tx D a SLON si TN S10 ms gt N IN d N LLI 1 THIS AREAIS DR d NTT g z LIMITED BY roson SINUM 10 5 SINGLE PULSE s s lies e 0 1 Ty MAX RATED M d 408 E Bus 125 C W Fpc a TA 25 C 1 0 01 LL LII d 05 0 01 0 1 1 10 80 10 10 10 10 1 10 100 1000 Vps DRAIN TO SOURCE VOLTAGE V t PULSE WIDTH sec Figure 11 Forward Bias Safe Figure 12 Single Pulse Maximum Operating Area Power Dissipation FDMC510P Rev C5 4 www fairchildsemi com
2. 5 MAX A0 z Vps 5 V T 10 z o H 30 z Ty 150 C E Tue 150 C S 1 2 20 ui Ty 25 C i lt tc Tj 25 C S 0 1 Q0 2 10 a Ty 55 C Ty 55 C p 0 0 01 0 0 0 5 1 0 1 5 2 0 0 0 0 2 0 4 0 6 0 8 1 0 1 2 Vgs GATE TO SOURCE VOLTAGE V Vsp BODY DIODE FORWARD VOLTAGE V Figure 5 Transfer Characteristics Figure6 Sourceto Drain Diode Forward Voltage vs Source Current FDMC510P Rev C5 3 www fairchildsemi com LAASOW 4 U2u91119Mod j9uueuD d dOLS2IWQJ
3. FDMC510P Rev C5 6 www fairchildsemi com LAASOW 4 U2u91119Mod SUUBYD d dOLS2IWGQJ E FAIRCHILD SEMICONDUCTOR TRADEMARKS The following includes registered and unregistered trademarks and service marks owned by Fairchild Semiconductor and or its global subsidiaries and is not intended to be an exhaustive list of all such trademarks AccuPower F PFS Power SPM SYSTEM Auto SPM FRFET PowerTrench GENERAL Build it Now Global Power Resource PowerXS The Power Franchise CorePLUS Green FPS Programmable Active Droop the CorePOWER Green FPS e Series QFET D wer CROSSVOLT Gmax QS TIERS ri CTL GTO Quiet Series EU Current Transfer Logic IntelliMAX RapidConfigure Md cp DEUXPEED ISOPLANAR CH We Ti dy e Dual Cool MegaBuck ENS HH EcoSPARK MICROCOUPLER Saving our world 1mW W kW at a time TinvPower EfficentMax MicroFET M SignalWise T ENN ESBC MicroPak SmartMax Tiwi F aj MicroPak2 SMART START TE D MillerDrive SPMe ele TRUECURRENT Fairchild MotionMax STEALTH SerDes Fairchild Semiconductor Motion SPM SuperFET FACT Quiet Series OptiHi T7M SuperSOT 3 ZZ FACT OPTOLOGIC SuperSOT 6 ees FAST OPTOPLANAR SuperSOT 8 UHC FastvCore i SupreMOS a FETBench SyncFET vaca FlashWriter PDP SPM Sync Lock VisualMax FPS SE LAASOW 4 U2u91119Mod SUUEYD d dOLS2IWQJ Trademarks of
4. 9 3 A 9 2 13 mQ Vas 1 5 V Ip 8 3 A 11 17 Vas 4 5 V Ip 12 A Ty 125 C 8 5 12 JFS Forward Transconductance Vps 5 V Ip 12 A 75 S Dynamic Characteristics Ciss Input Capacitance 5910 7860 pF is Output Capacitance 2 s Ve NGS ON 840 1120 oF Lues Reverse Transfer Capacitance 738 1110 pF Switching Characteristics ta on Turn On Delay Time 15 27 ns t Rise Time Vpp 10 V Ip 12 A 34 55 ns ta oft Turn Off Delay Time Vas 4 5 V Reen 6 Q 338 540 ns lr Fall Time 170 272 ns Qg ToT Total Gate Charge Vas 0 V to 4 5 V 83 116 nC QJ TOT Total Gate Charge Vpp 10 V 50 70 nC Qgs Gate to Source Charge Ip 12A 6 3 nC Lag Gate to Drain Miller Charge 20 4 nC Drain Source Diode Characteristics Vsp Source to Drain Diode Forward Voltage ves e TEA Note 5 a S V in Reverse Recovery Time I 12 A di dt 100 A us 35 57 ns G Reverse Recovery Charge 20 32 nC Notes 1 Roya is determined with the device mounted on a 1 in pad 2 oz copper pad on a 1 5 x 1 5 in board of FR 4 material Duc is guaranteed by design while Roya is determined by the user s board design a 1 in padof 20z copper 2oo0O0 oooo 2 Pulse Test Pulse Width lt 300 us Duty cycle lt 2 0 3 Starting Tj 25 C P Ch L 8 mH las 5 A Vpp 20 V Veg 4 5 V 4 No gate overvoltage rating is implied FDMC510P Rev C5 a 53 C W when mounted on b 125 C W when mounted on a minimum pad of 2 oz copper www fairch
5. See eae FAIRCHILD SES SEMICONDUCTOR FDMC510P June 2010 P Channel PowerTrench MOSFET 20 V 18 A 8 0 mQ Features B Max rps on 8 0 MQ at Veg 4 5 V Ip 12 A B Max rps on 9 8 MQ at Vas 2 5 V Ip 10 A B Max rps on 13 MQ at Ves 1 8 V lp 9 3 A B Max rps on 17 MQ at Veg 1 5 V Ip 8 3 A m High performance trench technology for extremely low rps on B High power and current handling capability in a widely used surface mount package B 10096 UIL Tested B Termination is Lead free and RoHS Compliant B HBM ESD capability level gt 2 KV typical Note 4 Pin 1 MLP 3 3x3 3 G Ne SS General Description This P Channel MOSFET is produced using Fairchild Semiconductor s advanced Power Trench process that has been optimized for rps ow switching performance and ruggedness Applications B Battery Management B oad Switch Bottom MOSFET Maximum Ratings T 25 c unless otherwise noted Symbol Parameter Ratings Units Vos Drain to Source Voltage 20 V Ves Gate to Source Voltage 8 V Drain Current Continuous Package limited Te 25 C 18 i Continuous Silicon limited Te 25 C 54 A Continuous Ta 25 C Note 1a 12 Pulsed 50 Eas Single Pulse Avalanche Energy 37 mJ p Power Dissipation To 225 C 41 W Z Power Dissipation Ty 25 C Note 1a 2 3 Ty TerG Operating and
6. Storage Junction Temperature Range 55 to 150 C Thermal Characteristics Da Thermal Resistance Junction to Case 3 CN Roya Thermal Resistance Junction to Ambient Note 1a 53 Package Marking and Ordering Information Device Marking Device Package Reel Size Tape Width Quantity FDMC510P FDMC510P MLP 3 3X3 3 13 12 mm 3000 units 2010 Fairchild Semiconductor Corporation 1 www fairchildsemi com FDMC510P Rev C5 LAASOW 4 U2u91119Mod SUUEYD d dOLS2IWQJ Electrical Characteristics r7 25 c unless otherwise noted Symbol Parameter Test Conditions Min Typ Max Units Off Characteristics BVpss Drain to Source Breakdown Voltage Ip 250 uA Ves 20V 20 V TOSS isis votageetemperat re Ip 250 uA referenced to 25 C 12 mvV C Ire Zero Gate Voltage Drain Current Vps 16 V Veg 0V 1 uA less Gate to Source Leakage Current Ves 8 V Vps 0 V 100 nA On Characteristics Vasith Gate to Source Threshold Voltage Vas Vps lp 250 uA 0 4 0 5 1 0 V AV asith Gate to Source Threshold Voltage Ip 250 uA referenced to 25 C 3 mvV C ATy Temperature Coefficient Ves 4 5 V Ip 12 A 6 4 8 0 Ves 2 5 V Ip 10 A 7 6 9 8 DS on Static Drain to Source On Resistance Ves 1 8 V Ip
7. System General Corporation used under license by Fairchild Semiconductor DISCLAIMER FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY FUNCTION OR DESIGN FAIRCHILD DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT RIGHTS NOR THE RIGHTS OF OTHERS THESE SPECIFICATIONS DO NOT EXPAND THE TERMS OF FAIRCHILD S WORLDWIDE TERMS AND CONDITIONS SPECIFICALLY THE WARRANTY THEREIN WHICH COVERS THESE PRODUCTS LIFE SUPPORT POLICY FAIRCHILD S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION As used here in 1 Life support devices or systems are devices or systems which a are 2 A critical component in any component of a life support device or intended for surgical implant into the body or b support or sustain life system whose failure to perform can be reasonably expected to cause and c whose failure to perform when properly used in accordance with the failure of the life support device or system or to affect its safety or instructions for use provided in the labeling can be reasonably effectiveness expected to result in a significant injury of the user ANTI COUNTERFEITING POLICY Fairchild Semiconductor Corporation s Anti Counter
8. Typical Characteristics 1 25 c unless otherwise noted 2 i DUTY CYCLE DESCENDING ORDER D 0 5 2 0 2 S A 01 GN o 0 05 E Eu o 0 02 Pom AS 0 01 N g W tn t4 S 0 01 to B SINGLE PULSE DUTY FACTOR D t Roya 125 C W PEAK T Ppm X Zoya X Roja Ta 0 001 ee tel Dau dr HE ku 10 10 10 10 1 10 100 FDMC510P Rev C5 t RECTANGULAR PULSE DURATION sec Figure 13 Junction to Ambient Transient Thermal Response Curve 1000 www fairchildsemi com LAASOW 4 U2u91119Mod SUUBYD d dOLSOWGS Dimensional Outline and Pad Layout 2 5 MIN SYM TX Cu 2 15 MIN at 0 e 0 70 MIN DIN QUADRANT ETNI a H 0 42 MIN 0 8 MAX e ae 0 70 os RECOMMENDED LAND PATTERN i 005 0 00 SEATING SIDE VIEW PLANE NOTES A DOES NOT CONFORM TO JEDEC REGISTRATION MO 229 B DIMENSIONS ARE IN MILLIMETERS C DIMENSIONS AND TOLERANCES PER ASME Y 14 5M 1994 D LAND PATTERN RECOMMENDATION IS BASED ON FSC DESIGN ONLY BOTTOM VIEW
9. feiting Policy Fairchild s Anti Counterfeiting Policy is also stated on our external website www Fairchildsemi com under Sales Support Counterfeiting of semiconductor parts is a growing problem in the industry All manufactures of semiconductor products are experiencing counterfeiting of their parts Customers who inadvertently purchase counterfeit parts experience many problems such as loss of brand reputation substandard performance failed application and increased cost of production and manufacturing delays Fairchild is taking strong measures to protect ourselves and our customers from the proliferation of counterfeit parts Fairchild strongly encourages customers to purchase Fairchild parts either directly from Fairchild or from Authorized Fairchild Distributors who are listed by country on our web page cited above Products customers buy either from Fairchild directly or from Authorized Fairchild Distributors are genuine parts have full traceability meet Fairchild s quality standards for handing and storage and provide access to Fairchild s full range of up to date technical and product information Fairchild and our Authorized Distributors will stand behind all warranties and will appropriately address and warranty issues that may arise Fairchild will not provide any warranty coverage or other assistance for parts bought from Unauthorized Sources Fairchild is committed to combat this global problem and encourage our customers to do their part in s
10. ildsemi com LAASOW 4 U2u91119Mod j9uueuD d dOLS2IWQJ Typical Characteristics r7 25 c unless otherwise noted 50 5 ui PULSE DURATION 80 us Z DUTY CYCLE 0 5 MAX 40 G 4 E at Gi 30 ws 3 oc N 3 du O zo z 20 cE 2 q 2o S E Ves 1 2 V O 4 10 E PULSE DURATION 80 us Ves 2 5 V Ves 4 5 V DUTY CYCLE 0 5 MAX cc 0 o 0 0 0 5 1 0 1 5 2 0 0 10 20 30 40 50 Vps DRAIN TO SOURCE VOLTAGE V Ip DRAIN CURRENT A Figure 1 On Region Characteristics Figure2 Normalized On Resistance vs Drain Current and Gate Voltage 1 5 25 uu PULSE DURATION 80 us z 14 y AEN m DUTY CYCLE 0 5 MAX lt Gs 4 e 20 o 1 3 mE n T Ip 12 A O gg 12 F Z 15 NO S E d 11 q 2 O A d E Of 10 o2 10 es z9 SO o 0 9 2 u E 2 5 2 tc z 08 5 tc o 2 07 0 75 50 25 0 25 50 75 100 125 150 10 15 20 25 30 35 40 45 Ty JUNCTION TEMPERATURE C Vgs GATE TO SOURCE VOLTAGE V Figure3 Normalized On Resistance Figure4 On Resistance vs Gate to vs Junction Temperature Source Voltage 50 100 PULSE DURATION 80 us T Ves 0V DUTY CYCLE 0
11. topping this practice by buying direct or from authorized distributors PRODUCT STATUS DEFINITIONS Definition of Terms Datasheet Identification Product Status Datasheet contains the design specifications for product development Specifications Advance Information Formative In Design may change in any manner without notice Datasheet contains preliminary data supplementary data will be published at a later date Fairchild Semiconductor reserves the right to make changes at any time without notice to improve design TM Datasheet contains final specifications Fairchild Semiconductor reserves the right to No Identification Needed Full Production make changes at any time without notice to improve the design Datasheet contains specifications on a product that is discontinued by Fairchild Obsolete Not In Production Semiconductor The datasheet is for reference information only www fairchildsemi com Preliminary First Production Rev 148 FDMC510P Rev C5 7

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