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FAIRCHILD FDD3N40/FDU3N40 400V N-Channel MOSFET handbook

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1. Features 2A 400V Rps on 3 40 Ves 10 V Low gate charge typical 4 5 nC Low Cis typical 3 7 pF Fast switching 100 avalanche tested Improved dv dt capability FAIRCHILD SEMICONDUCTOR FDD3N40 FDU3N40 400V N Channel MOSFET February 2007 UniFET Description These N Channel enhancement mode power field effect transistors are produced using Fairchild s proprietary planar stripe DMOS technology This advanced technology has been especially tailored to minimize on state resistance provide superior switching performance and withstand high energy pulse in the avalanche and commutation mode These devices are well suited for high efficient switched mode power supplies and active power factor correction D oD L 4 G G D PAK I PAK FDD Series GDS FDU Series b S Absolute Maximum Ratings Symbol Parameter FDD3N40 FDU3N40 Unit Vpss Drain Source Voltage 400 V ID Drain Current Continuous Tc 25 C 2 0 A Continuous Tc 100 C 1 25 A IDM Drain Current Pulsed Note 1 8 0 A Vess Gate Source voltage 30 V EAS Single Pulsed Avalanche Energy Note 2 46 mJ An Avalanche Current Note 1 A Ear Repetitive Avalanche Energy Note 1 3 mJ dv dt Peak Diode Recovery dv dt Note 3 4 5 V ns Pp Power Dissipation Tc 25 C 30 W Derate above 25 C 0 24 W C Ty Tera Operating and Sto
2. THE WARRANTY THEREIN WHICH COVERS THESE PRODUCTS LIFE SUPPORT POLICY FAIRCHILD S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION As used herein 1 Life support devices or systems are devices or systems which a are intended for surgical implant into the body or b support or sustain life and c whose failure to perform when properly used in accordance with instructions for use provided in the labeling can be reasonably expected to result in a significant injury of the user PRODUCT STATUS DEFINITIONS Definition of Terms 2 A critical component in any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system or to affect its safety or effectiveness Datasheet Identification Product Status Definition Advance Information Formative or In Design This datasheet contains the design specifications for product development Specifications may change in any manner without notice Preliminary First Production This datasheet contains preliminary data supplementary data will be published at a later date Fairchild Semiconductor reserves the right to make changes at any time without notice to improve design No Identification Needed Full Production design This datasheet contains final specif
3. all such trademarks ACEx Across the board Around the world ActiveArray Bottomless Build it Now CoolFET CROSSVOLT CTL Current Transfer Logic DOME E CMOS EcoSPARK EnSigna FACT Quiet Series FACT FAST FASTr FPS FRFET GlobalOptoisolator GTOW HiSeCW i Lo ImpliedDisconnect IntelliMAX ISOPLANAR MICROCOUPLER MicroPak MICROWIRE MSX MSXPro ocx OCXPro OPTOLOGIC OPTOPLANAR PACMAN POP Power220 Power247 PowerEdge PowerSaver DISCLAIMER TinyLogic TINYOPTO TinyPower TinyWire TruTranslation uSerDes UHC UniFET VOX Wire PowerTrench Programmable Active Droop QFET QSTM OT Optoelectronics Quiet Series RapidConfigure RapidConnect ScalarPump SMART START SPM SuperFET SuperSOT 3 SuperSOT 6 SuperSOT 8 TCM The Power Franchise TM TinyBoost TinyBuck FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY FUNCTION OR DESIGN FAIRCHILD DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT RIGHTS NOR THE RIGHTS OF OTHERS THESE SPECIFICATIONS DO NOT EXPAND THE TERMS OF FAIRCHILD S WORLDWIDE TERMS AND CONDITIONS SPECIFICALLY
4. Circuit amp Waveform Same Type as DUT Charge Resistive Switching Test Circuit amp Waveforms Vos 10 Vos Tar 44 Unclamped Inductive Switching Test Circuit amp Waveforms 1 BV pss Eas Lh x 2 T BV pes T Vnp BV pss las lp t Voo Vos D bt Tire 5 www fairchildsemi com FDD3N40 FDU3N40 Rev A 134SON ISuuuO N 00 OVNENGS OVNEaGGS Peak Diode Recovery dv dt Test Circuit amp Waveforms len Same Type as DUT dv dt controlled by Re la controlled by pube period _ Gate Puke Width Gate Puke Period Body Diode Fonward Current DUT Body Diode Reverse Current Body Diode Recovery dw dt Vsp Voo Body Diode Forward Voltage Drop FDD3N40 FDU3N40 Rev A www fairchildsemi com 134SON ISuuuO N 00 OVNENGS OVNEaGGS Mechanical Dimensions D PAK 7 AN KLLKK KKK OX X FDD3N40 FDU3N40 Rev A www fairchildsemi com LAASOW ISUuPUO N 00 OVNENGS OVNEGGS Mechanical Dimensions I PAK FDD3N40 FDU3N40 Rev A www fairchildsemi com LAASOW I9euue amp u N ADO OVNENGS OVNEGGS Ee FAIRCHILD SEMICONDUCTOR TRADEMARKS The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is not intended to be an exhaustive list of
5. ications Fairchild Semiconductor reserves the right to make changes at any time without notice to improve Obsolete Not In Production This datasheet contains specifications on a product that has been discontinued by Fairchild Semiconductor The datasheet is printed for reference information only 2007 Fairchild Semiconductor Corporation www fairchildsemi com
6. ldsemi com LAASOW ISUUEUO N A00t OVNENGS OVNEdGS Typical Performance Characteristics Figure 1 On Region Characteristics Ves Top 15 0V 10 0 V 80V 70V 6 5V 10 B 6 0V Bottom 5 5V Drain Current A Notes 1 250us Pulse Test 2 T 25 C 107 10 10 Vna Drain Source Voltage V Figure 3 On Resistance Variation vs Drain Current and Gate Voltage o 14b z g St 12 8 uL cz tof 6 of B ep Vag 10V 3 7 an 9 ef amp S 5 8 4L Vas 20V G sr z2r I Note T 25 C 1L L 3 a ao T 1 1 1 1 1 0 1 2 3 4 5 6 Drain Current A Figure 5 Capacitance Characteristics 350 300 250 200 Capacitances pF 8 1 10 Vps Drain Source Voltage V l Reverse Drain Current A Drain Current A V Gate Source Voltage V o Figure 2 Transfer Characteristics 2 250yus Pulse Test 10 i l 4 5 6 7 8 9 10 Vag Gate Source Voltage V Figure 4 Body Diode Forward Voltage Variation vs Source Current and Temperatue Notes 1 Vag OV 2 250us Pulse Test 107 R i i i i 1 1 i 1 0 2 0 4 0 6 0 8 1 0 1 2 1 4 1 6 1 8 Vp Source Drain voltage V Figure 6 Gate Charge Characteristics Vg 80V Vps 200V Vps 320V Note 1 3A 1 1 1 0 1 2 3 4 5 Q Total Gate Charge
7. nC FDD3N40 FDU3N40 Rev A www fairchildsemi com LAASOW ISUUUO N A00t OVNENGS OVNEdGS Typical Performance Characteristics continueo Figure 7 Breakdown Voltage Variation vs Temperature S BVoss Normalized Drain Source Breakdown Voltage to o 140 8 50 0 100 150 T Junction Temperature C Figure 9 Maximum Safe Operating Area 10 T c 2 wE E 3 s a c Operation in This S is Limited by R ys a B 10 2 T 150 C 3 Single Pulse 77 10 iil 1 10 2 10 Vps Drain Source Voltage V Roson Normalized Drain Source On Resistance lj Drain Current A Figure 8 On Resistance Variation vs Temperature 30 25r 20r 05r 0 50 100 150 200 T Junction Temperature C Figure 10 Maximum Drain Current vs Case Temperature 25 20 2 o o a 0 0 75 100 T Case Temperature C Figure 11 Transient Thermal Response Curve t Thermal Response Zac A o lo Notes 1 Zsolt 4 2 10 10 single pulse 10 2 Duty Factor gt wiTLTT hl gt C W Max D tyt 3 Tim To Pow Zsolt 107 10 10 t Square Wave Pulse Duration sec FDD3N40 FDU3N40 Rev A www fairchildsemi com LAASOW ISUUUO N A00t OVNENGS OVNEdGS Gate Charge Test
8. rage Temperature Range 55 to 150 C TL Maximum Lead Temperature for Soldering Purpose 300 C 1 8 from Case for 5 Seconds Drain current limited by maximum junction temperature Thermal Characteristics Symbol Parameter Typ Max Unit Roc Thermal Resistance Junction to Case 4 2 C W Roja Thermal Resistance Case to Sink Typ 110 C W 2007 Fairchild Semiconductor Corporation FDD3N40 FDU3N40 Rev A www fairchildsemi com LAASOW ISUUEUO N ADO OVNENGS OVNEGGS Package Marking and Ordering Information Device Marking Device Package Reel Size Tape Width Quantity FDD3N40 FDD3N40TM D PAK 380mm 16mm 2500 FDD3N40 FDD3N40TF D PAK 380mm 16mm 2000 FDU3N40 FDU3N40TU I PAK 70 Electrical Characteristics v 25 c uniess otherwise noted Symbol Parameter Conditions Min Typ Max Units Off Characteristics BVpss Drain Source Breakdown Voltage Ves OV Ip 250uA 400 ie V DE c Voltage Temperature Ip 250A Referenced to 25 C 04 vec Ipss Zero Gate Voltage Drain Current Vps 400V Vas OV s 1 pA Vps 320V Tc 125 C 10 uA lassr Gate Body Leakage Current Forward Vas 30V Vps OV B 3 100 nA lessr Gate Body Leakage Current Reverse Vas 30V Vps OV n 100 nA On Characteristics Vas th Gate Threshold Voltage Vp
9. s Ves lp 250uA 3 0 7 5 0 V OMM AA s Vas 10V lp 1A 28 34 Q gFs Forward Transconductance Vps 40V Ip 1A Note 4 2 S Dynamic Characteristics Ciss Input Capacitance Vps 25V Veg OV x 178 225 pF Cre Output Capacitance t DOM 30 40 pF Crss Reverse Transfer Capacitance S 3 7 6 pF Switching Characteristics ta on Turn On Delay Time Vpp 200V Ip 3A 10 30 ns n Turn On Rise Time Rg 259 30 70 ns la ott Turn Off Delay Time 10 30 ns ty Turn Off Fall Time Note 4 5 25 60 ns Q Total Gate Charge Vps 320V Ip 3A 4 5 6 nC Qgs Gate Source Charge Vas 10V 1 2 nC Qga Gate Drain Charge Note 4 5 7 2 nC Drain Source Diode Characteristics and Maximum Ratings Ig Maximum Continuous Drain Source Diode Forward Current m E 2 A ISM Maximum Pulsed Drain Source Diode Forward Current 5 5 8 A Vsp Drain Source Diode Forward Voltage Ves OV ls 2A 1 4 V trr Reverse Recovery Time Ves OV Ig 3A 210 ns Qr Reverse Recovery Charge dle dt 100A us Note x 0 75 uC NOTES 1 Repetitive Rating Pulse width limited by maximum junction temperature 2 L 20mH las 3 lgp lt 2A di dt 2A Vpp 50V Rg 250 Starting Ty 25 C lt 200A us Vpp lt BVpss Starting Ty 25 C 4 Pulse Test Pulse width lt 300us Duty Cycle lt 2 5 Essentially Independent of Operating Temperature Typical Characteristics FDD3N40 FDU3N40 Rev A www fairchi

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