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International IOR Rectifier IR2103(S) handbook

1. vs Temperature 500 T E 400 z 5 300 o 5 200 8 Typ JL T 5 amp 100 e Min 0 10 12 14 16 18 20 VBIAS Supply Voltage V Figure 22B Output Source Current vs Voltage 700 T 600 E 500 400 a Typ x 300 T 200 2 Min 100 0 10 12 14 16 18 20 VBIAS Supply Voltage V Figure 23B Output Sink Current vs Voltage 11 IR2103 S International 12 TOR Rectifier i 8 ENSIONING amp TOLERANCING PER ANSI Y14 5M 1982 ONTROLLING DIMENSION INCH ENSIONS ARE SHOWN IN MILLIMETERS INCHES UTLINE CONFORMS TO JEDEC OUTLINE MS OO1AB EASURED WITH THE LEADS CONSTRAINED TO BE ERPENDICULAR TO DATUM PLANE C MENSION DOES NOT INCLUDE MOLD PROTUSIONS MOLD PROTUSIONS SHALL NOT EXCEED 0 25 010 7 11 280 6 10 240 p 5 53 210 MAX al 0 558 022 0 356 014 7 62 300 381 01 0 25 010 DIC BOJC E BX oca d 01 6014 8 Lead PDIP 01 3003 01 MS 001AB INCHES MILLIMETERS MIN MAX MIN MAX FOOTPRINT 0532 0688 135 175 0040 0098 0 10 0 25 013 020 033 0 51 Le 8X 0 72 028 0075 0098 0
2. Offset Supply Leakge Current uA 50 25 0 25 50 75 100 125 Temperature C Figure 16A Offset Supply Current vs Temperature 150 S 120 90 E O gt 60 Q e Q 30 gt 0 50 25 0 25 50 75 100 125 Temperature C Figure 17A VBS Supply Current vs Temperature www irf com 500 Offset Supply Leakge Current u A h e e 0 200 400 600 800 VB Boost Voltage V Figure 16B Offset Supply Current vs Voltage 150 3 120 5 90 o gt a Q eem 2 60 Max eo D L 77 t m 30 3 Typ 0 10 12 14 16 18 20 VBS Floating Supply Voltage V Figure 17B VBS Supply Current vs Voltage IR2103 S 700 600 E 500 S A 6 00 8 gt a 300 Max oo 3 n 200 o Mr Q Ez 100 Typ 0 50 235 0 25 50 75 100 125 Temperature C Figure 18A Vcc Supply Current vs Temperature 30 T T 25 E E gt 5 O O 5 15 I S gt at F 10 lt E Max E o 5 T o o o d Typ 0 50 25 0 25 50 75 100 125 lemperature U Figure 19A Logic 1 Input Current vs Temperature 5 T 3 E gt a a 2 o Max o lt EI EA EE EE gt S8 zi 0 Te
3. International ISR Rectifier 500 500 g 400 Z 400 g E 300 300 g 2 Max 200 ex Sass 20 pee G T a A T E E 100 5 100 E E Typ Typ 0 0 50 25 0 2 50 75 100 125 10 12 14 16 18 20 Temperature C VBIAS Supply Voltage V Figure 9A Turn On Rise Time Figure 9B Turn On Rise Time vs Temperature vs Voltage 200 200 B 150 2 160 B E r E Max F 100 SE Low TL i Max T V so eH f 5 Typ Q T Q 50 yp E 50 5 5 0 0 50 25 O 2 50 75 100 125 10 12 14 16 18 20 Deadtime ns IR2103 S Temperature C Figure 10A Turn Off Fall Time vs Temperature 50 25 0 25 50 75 100 125 Temperature C Figure 11A Deadtime vs Temperature www irf com VBIAS Supply Voltage V Figure 10B Turn Off Fall Time vs Voltage 1400 1200 z 1000 E Max 800 Typ T oo 2 S 900 M B 490 Min 200 0 10 12 14 16 18 20 VBIAS Supply Voltage V Figure 11B Deadtime vs Voltage IR2103 S Input Voltage V 8 7 6 5 4 Min 3 2 1 0 50 25 0 25 50 75 100 125 Temperature C Figure12A Logic 1 HIN amp Logic 0 LIN Inp
4. This These diagram s show electrical connections only Please refer to our Application Notes and DesignTips for proper circuit board layout www irf com IR2103 S International TOR Rectifier Absolute Maximum Ratings Absolute maximum ratings indicate sustained limits beyond which damage to the device may occur All voltage param eters are absolute voltages referenced to COM The thermal resistance and power dissipation ratings are measured under board mounted and still air conditions Definition High side floating absolute voltage High side floating supply offset voltage High side floating output voltage Low side and logic fixed supply voltage Low side output voltage Logic input voltage HIN amp LIN Allowable offset supply voltage transient 8 Lead PDIP Package power dissipation TA lt 25 C 8 Lead SOIC 8 Lead PDIP Thermal resistance junction to ambient 8 Lead SOIC Junction temperature Storage temperature Lead temperature soldering 10 seconds Recommended Operating Conditions The input output logic timing diagram is shown in figure 1 For proper operation the device should be used within the recommended conditions The Vs offset rating is tested with all supplies biased at 15V differential Definition High side floating supply absolute voltage High side floating supply offset voltage High side
5. 19 025 189 1968 480 5 00 1497 1574 3 80 4 00 0 25 010 V 025 BASIC 0 635 BASIC L 6 46 255 S 2440 5 80 620 0196 0 25 0 50 050 040 127 nf Il 050 BASIC 1 27 BASIC I HU my 3x1271 050 L 8X 1 78 070 8 0 8 E K x 45 LIA BXD S i o 00011 H L BX L ae 0 25 010 V NOTES DIMENSION DOES NOT INCLUDE MOLD PROTRUSIONS 1 DIMENSIONING amp TOLERANCING PER ASME Y14 5M 1994 MOLD PROTRUSIONS NOT TO EXCEED 0 15 006 2 CONTROLLING DIMENSION MILLIMETER 6 DIMENSION DOES NOT INCLUDE MOLD PROTRUSIONS 3 DIMENSIONS ARE SHOWN IN MILLIMETERS INCHES P MOLD PROTRUSIONS NOT O EXCEED 0 25 E 4 OUTLINE CONFORMS TO J EDEC OUTLINE MS 012AA Q DIMENSION IS THE LENGTH OF LEAD FOR SOLDERING TO A SUBSTRATE 01 6027 8 Lead SOIC 01 0021 11 MS 012AA IR WORLD HEADQUARTERS 233 Kansas St El Segundo California 90245 Tel 310 252 7105 Data and specifications subject to change without notice 5 23 2001 www irf com
6. Quiescent Vgs supply current Vin OV or 5V lacc Quiescent Vcc supply current Vin OV or 5V IM Logic 1 input bias current HIN 5V LIN OV liN Logic 0 input bias current HIN OV LIN 5V VcCUV Vcc supply undervoltage positive going threshold Vccuv Vcc supply undervoltage negative going threshold Output high short circuit pulsed current Vo OV VIN VIH PW lt 10 us Output low short circuit pulsed current Vo 15V VIN 2 VIL PW lt 10 us www irf com 3 IR2103 S International IGR Rectifier Functional Block Diagram PULSE FILTER UV pETECT Description Logic input for high side gate driver output HO in phase Logic input for low side gate driver output LO out of phase High side floating supply High side gate drive output High side floating supply return Low side and logic fixed supply Low side gate drive output Low side return 8 Lead PDIP 8 Lead SOIC IR2103 IR2103S 4 www irf com International IR2103 S IER Rectifier LIN HIN 90 90 HO E m LO Figure 1 Input Output Timing Diagram HIN 90 90 HO Figure 2 Switching Ti
7. floating output voltage Low side and logic fixed supply voltage Low side output voltage Logic input voltage HIN amp LIN Ambient temperature Note 1 Logic operational for Vs of 5 to 600V Logic state held for Vs of 5V to Vgs Please refer to the Design Tip DT97 3 for more details 2 www irf com International IR2103 S T R Rectifier Dynamic Electrical Characteristics VBiAS Vcc VBs 15V C 1000 pF and TA 25 C unless otherwise specified Definition in 3 Test Conditions Turn on propagation delay Vs 20V Turn off propagation delay Vs 600V Turn on rise time Turn off fall time Deadtime LS turn off to HS turn on amp HS turn on to LS turn off Delay matching HS amp LS turn on off Static Electrical Characteristics VBiAS Vcc Vgs 15V and TA 25 C unless otherwise specified The Viy Vru and liN parameters are referenced to COM The Vo and Io parameters are referenced to COM and are applicable to the respective output leads HO or LO Symbol Definition in 3 Test Conditions ViH Logic 1 HIN amp Logic 0 LIN input voltage Vcc 10V to 20V VIL Logic 0 HIN amp Logic 1 LIN input voltage i Vcc 10V to 20V VoH High level output voltage Vous Vo lo 0A VoL Low level output voltage Vo lo 0A ILK Offset supply leakage current VB Vs 600V laps
8. D U TR21031 0 L International IER Rectifier Features Floating channel designed for bootstrap operation Fully operational to 600V Tolerant to negative transient voltage dV dt immune Gate drive supply range from 10 to 20V Undervoltage lockout 3 3V 5V and 15V logic compatible Cross conduction prevention logic Matched propagation delay for both channels nternal set deadtime High side output in phase with HIN input Low side output out of phase with LIN input Description The IR2103 S are high voltage high speed power MOSFET and IGBT drivers with dependent high and low side referenced output channels Proprietary HVIC and latch immune CMOS technologies enable rug gedized monolithic construction The logic input is compatible with standard CMOS or LSTTL output down to 3 3V logic The output drivers feature a high Data Sheet No PD60045 N IR2103 S HALF BRIDGE DRIVER Product Summary 600V max 130 mA 270 mA 10 20V 680 amp 150 ns 520 ns VOFFSET lot VOUT ton off typ Deadtime typ Packages 8 Lead SOIC IR2103S 8 Lead PDIP IR2103 pulse current buffer stage designed for minimum driver cross conduction The floating channel can be used to drive an N channel power MOSFET or IGBT in the high side configuration which operates up to 600 volts Typical Connection Refer to Lead Assignments for correct configuration
9. me Waveform Definitions Figure 4 Deadtime Waveform Definitions www irf com 5 IR2103 S Turn On Delay Time ns Turn On Delay Time ns Turn Off Delay Time ns International IGR Rectifier 1400 1400 1200 g 1200 1000 EN T 1000 Max Max ee ee oe es E dE EE 800 Se OOD asas 600 8 600 y pee eL Typ c 400 P Q 400 200 200 0 0 50 235 0 25 50 75 100 125 10 12 14 16 18 20 Temperature C VBIAS Supply Voltage V Figure 6A Turn On Time vs Temperature Figure 6B Turn On Time vs Supply Voltage 1000 500 Max T E 800 S S ae 400 E 600 gt 300 Typ E te l 400 5 200 Max SE se 200 100 Typ 0 0 0 2 4 6 8 10 12 14 16 18 20 500 250 0 28 850 75 100 125 Temperature C Input Voltage V Figure 6C Turn On Time vs Input Voltage Figure 7A Turn Off Time vs Temperature 500 1000 400 800 300 Max 600 gt E 200 400 m 5 100 J Typ 200 e 0 0 10 12 14 16 18 20 0 2 4 6 8 10 12 14 16 18 20 VBIAS Supply Voltage V Figure 7B Turn Off Time vs Supply Voltage Input Voltage V Figure 7C Turn Off Time vs Input Voltage www irf com
10. mperature C Figure 20A Logic 0 Input Current vs Temperature 10 International ISR Rectifier Typ 10 12 14 16 18 20 Vcc Supply Voltage V Figure 18B Vcc Supply Current vs Voltage 30 10 12 14 16 18 20 Vcc Supply Voltage V Figure 19B Logic 1 Input Current vs Voltage 5 4 3 2 Max j 2 0 10 12 14 16 18 20 Vcc Supply Voltage V Figure 20B Logic 0 Input Current vs Voltage www irf com International IER Rectifier 11 zs ax 10 Ke Typ 2 ga o In P n EE L L L 3 o 7 o gt 6 50 25 0 25 50 75 100 125 Temperature C Figure 21A Vcc Undervoltage Threshold vs Temperature Output Source Current mA 50 25 0 25 50 75 100 125 Temperature C Figure 22A Output Source Current vs Temperature a o o 1 4 lt Es A o Output Sink Current mA o 50 25 0 25 50 75 100 125 Temperature C Figure 23A Output Sink Current vs Temperature www irf com IR2103 S VCC UVLO Threshold V Temperature C Figure 21B Vcc UndervoltageThreshold
11. ut Voltage vs Temperature Ds T o Input Voltage V oo L Temperature C Figure 13A Logic O HIN amp Logic 1 LIN Input Voltage vs Temperature High Level Output Voltage V Temperature C Figure 14A High Level Output vs Temperature International ISR Rectifier Input Voltage V 8 7 6 5 4 3 2 1 0 10 12 14 16 18 20 VBIAS Supply Voltage V Figure 12B Logic 1 HIN amp Logic 0 LIN Input Voltage vs Voltage Input Voltage V Vcc Supply Voltage V Figure 13B Logic O HIN amp Logic 1 LIN Input Voltage vs Voltage 2 0 8 o gt 06 a 5 O 04 o 2 3 os D Max E maxs o P TD ME 0 10 12 14 16 18 20 Vcc Supply Voltage V Figure 14B High Level Output vs Voltage www irf com International ISR Rectifier 1 S 2 0 8 o Z 0 6 Q 3 O 04 E 0 2 Max I wm od Z 0 Temperature C Figure 15A Low Level Output vs Temperature a o o IR2103 S 0 4 0 2 Wax Low Level Output Voltage V 10 12 14 16 18 20 Vcc Supply Voltage V Figure 15B Low Level Output vs Voltage A o o Co o o 200 100

International IOR Rectifier IR2103(S) handbook

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