MOTOROLA MC10E104/MC100E104 handbook
Contents
1. NET http Design NET com 51 Ting Kok Road Tai Po N T Hong Kong 852 26629298 MC10E104 D M MOTOROLA2. S AND INTERLEAD 0 450 0 456 1143 11 58 FLASH BUT INCLUDING ANY MISMATCH 0 042 0 048 107 121 BETWEEN THE TOP AND BOTTOM OF THE 0 042 0 048 107 121 PLASTIC BODY DIMENSION H DOES NOT INCLUDE DAMBAR 0042 e Lor E PROTRUSION OR INTRUSION THE DAMBAR 9 q9 Ec oe PI ROTRUSION S SHALL NOT CAUSE THE H amo 0430 1045 T 4032 000 102 ON TO BE GREATER THAN 0 037 0 940 THE DAMBAR INTRUSION S SHALL NOT CAUSE THE H DIMENSION TO BE SMALLER THAN 0 025 0 635 BQ N lt x lt c d x mo s gt 2 3 MOTOROLA MC10E104 MC100E104 Motorola reserves the right to make changes without further notice to any products herein Motorola makes no warranty representation or guarantee regarding the suitability of its products for any particular purpose nor does Motorola assume any liability arising out of the application or use of any product or circuit and specifically disclaims any and all liability including without limitation consequential or incidental damages Typical parameters which may be provided in Motorola data sheets and or specifications can and do vary in different applications and actual performance may vary overtime All operating parameters including Typicals must be validated for each customer application by customer s technical experts Motorola does not convey any license unde
3. WoroRSeA D0 SEMICONDUCTOR TECHNICAL DATA Quint 2 Input AND NAND Gate The MC10E 100E104 is a quint 2 input AND NAND gate The function output F is the OR of all five AND gate outputs while F is the NOR The Q outputs need not be terminated if only the F outputs are to be used e 600ps Max Propagation Delay e OR NOR Function Outputs e Extended 100E VEE Range of 4 2V to 5 46V e 75kQ Input Pulldown Resistors Pinout 28 Lead PLCC Top View Da Db Da NC Veco F F Dob Vcco Qo Qo Q Veco All Vcc and Vcco pins are tied together on the die PIN NAMES Data Inputs AND Outputs NAND Outputs OR Output NOR Output FUNCTION OUTPUTS F Doa Dob Dia Dib D2a Dap D3a D3b D4a Dab 12 93 Motorola Inc 1996 MC10E104 MC100E104 QUINT 2 INPUT AND NAND GATE FN SUFFIX PLASTIC PACKAGE CASE 776 02 LOGIC DIAGRAM F Doa Qo Dob Qo Dia Q1 Dib Qy D2a Qo Dab Q2 D3a Q3 D3b Q3 D4a Q4 Db Q4 REV2 M MOTOROLA MC10E104 MC100E104 DC CHARACTERISTICS VEE VEE min to VEE max Vcc Vcco GND ENSE DERE INN Input HIGH Current Power Supply Current 10E Propagation Delay to Output DtoQ 225 385 600 225 385 600 225 385 600 DtoF 500 725 1000 500 725 1000 500 725 1000 tsKEW Within Device Skew DtoQ Rise Fall Times 20 80 Q 275 425 700 275 425 700 275 425 700 F 300 475 700 300 475 700 300 475 700 1 Within device skew is defined
4. as identical transitions on similar paths through a device MOTOROLA 2 2 MC10E104 MC100E104 OUTLINE DIMENSIONS FN SUFFIX PLASTIC PLCC PACKAGE CASE 776 02 ISSUE D 0 007 0 180 r U 0 007 0 010 0 250 S 0 007 0 180 0 007 0 180 0 007 0 180 0 004 0 100 SEATING PLANE 0 007 0 180 0 010 0 250 NOTES 1 DATUMS L M AND N DETERMINED WHERE TOP OF LEAD SHOULDER EXITS PLASTIC BODY AT MOLD PARTING LINE DIM G1 TRUE POSITION TO BE MEASURED AT DATUM T SEATING PLANE DIM R AND U DO NOT INCLUDE MOLD FLASH mu MILLIMETERS ALLOWABLE MOLD FLASH IS 0 010 0 250 0 485 0 495 1232 12 57 PER SIDE p 0 485 0 495 12 32 12 57 DIMENSIONING AND TOLERANCING PER ANSI 0165 0 180 420 157 Y14 5M 1982 CONTROLLING DIMENSION INCH 0090 0 110 229 27 HE PACKAGE TOP MAY BE SMALLER THAN 0 013 0 019 0 33 048 HE PACKAGE BOTTOM BY UP TO 0 012 0 050 BSC 1 27 BSC 0 300 DIMENSIONS R AND U ARE 0 026 0 032 0 66 081 DETERMINED AT THE OUTERMOST 000 081 EXTREMES OF THE PLASTIC BODY 0025 064 EXCLUSIVE OF MOLD FLASH TIE BAR 0450 0456 1143 11 58 BURRS GATE BURR
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MOTOROLA MC10E104/MC100E104 handbook