PHILIPS 74F225 handbook
Contents
1. 01 0 078 Note 1 Plastic or metal protrusions of 0 25 mm maximum per side are not included OUTLINE REFERENCES EUROPEAN VERSION JEDEC EIAJ PROJECTION SOT146 1 C603 2 4 ee ISSUE DATE 1992 Jun 15 11 Philips Semiconductors Product specification 16X5 asynchronous FIFO 3 State 74F225 S020 plastic small outline package 20 leads body width 7 5 mm SOT163 1 detail X 5 scale DIMENSIONS inch dimensions are derived from the original mm dimensions 0 012 0 096 0 019 0 013 0 004 0 089 R 0 014 0 009 Note 1 Plastic or metal protrusions of 0 15 mm maximum per side are not included OUTLINE REFERENCES EUROPEAN ISSUE DATE VERSION IEC JEDEC EIAJ PROJECTION SOT163 1 075E04 MS 013AC E 1992 Jun 15 12 Philips Semiconductors Product specification 16X5 asynchronous FIFO 3 State 74F225 NOTES 1992 Jun 15 13 Philips Semiconductors Product specification 16X5 asynchronous FIFO 3 State 74F225 Data sheet status Data sheet Product Definition 1 status status Objective Development This data sheet contains the design target or goal specifications for product development specification Specification may change in any manner without notice Preliminary Qualification This data sheet contains preliminary data and supplementary data wi2. Output enable Input ready er OR CPB UNCPIN UNCPOUT UNCPIN va ao ao ao Q1 Qi Q1 Q2 Q2 Q2 5 bit data output Q3 Q3 Q3 Q4 a4 Q4 5 bit data input SF00345 Figure 1 Expanding the 74F225 FIFO 48 words of 10 bits TEST CIRCUIT AND WAVEFORM Ro 7 0V NEGATIVE RL PULSE 90 PULSE GENERATOR tTLH I tTHL tf gt 7 POSITIVE Test Circuit for Open Collector Outputs PULSE SWITCH POSITION tw TEST SWITCH tPLZ closed Input Pulse Definition tpzL closed All other open DEFINITIONS RL Load resistor see AC electrical characteristics for value INPUT PULSE REQUIREMENTS CL Load capacitance includes jig and probe capacitance S see AC electrical characteristics for value amplitude Vm rep rate tw rup trL Rr Termination resistance should be equal to Zour of pulse generators 3 0V 1MHz 2 5ns 2 5ns SF00128 June 15 1992 10 Philips Semiconductors Product specification 16X5 asynchronous FIFO 3 State 74F225 DIP20 plastic dual in line package 20 leads 300 mil SOT146 1 lt seating plane 5 scale DIMENSIONS inch dimensions are derived from the original mm dimensions A Ay A2 max min max 0 1 z b b4 c D E W max UNIT 26 92 6 40 4 2 0 51 S 26 54 6 22 z f 0 254 2 0 S 1 060 0 25 inches 0 17 0 020 j 1 045 0 24 0
3. 25N SOT146 1 20 pin plastic SOL N74F225D SOT163 1 INPUT AND OUTPUT LOADING AND FAN OUT TABLE ou 4 HIGH LOW HIGH LOW Master reset input active Low IR Input ready output 50 33 1 0mA 20mA UNCPOUT Unload clock output active Low 50 33 1 0mA 20mA OR Output ready output 50 33 1 0mA 20mA NOTE One 1 0 FAST unit load is defined as 20uA in the High state and 0 6mA in the Low state RESET MODE A High to Low transition on the Master Reset MR input invalidates all data stored in the FIFO by clearing the control logic and setting OR Low This High to Low transition on the MR input does not effect the data outputs but since OR is driven Low it signifies invalid data on the outputs WRITE MODE Data may be written into the array on the Low to High transition of either load clock CPA or CPB input When writing data into the FIFO one of the load clock inputs must be held High while the other strobes data into the FIFO This arrangement allows either load clock to function as an inhibit for the other Input Ready IR monitors the status of the last word location and signifies when the FIFO is full This output is High whenever the FIFO is available to accept new data The unload clock output UNCPOUT also monitors the last word location This output generates a Low logic level pulse synchronized to the internal clock pulse when the last word location is vacant June 15 1992 READ MODE The Output Ready OR output i
4. S En G ee VI tement H H H En fine amp eur S lor V V V l High level output current PO es Lowlevel output current A o o Operating free air temperature range June 15 1992 5 Philips Semiconductors Product specification 16 x 5 asynchronous FIFO 3 State 74F225 DC ELECTRICAL CHARACTERISTICS Over recommended operating free air temperature range unless otherwise noted PARAMETER TEST CONDITIONS LIMITS UNIT R CDS NDE WA EW EE EN input curentatmaxnumipavotage Mec MAX verw em High level input current Vcc MAX Vi 2 7V 55 Lowlevel input current Voc MAX V 0 5V 20 uA Te eme ee Low level voltage applied ej IE oA ei etl Plog Supply current oa eee NOTES 1 For conditions shown as MIN or MAX use the appropriate value specified under recommended operating conditions for the applicable type 2 All typical values are at Voc 5V Tamp 25 C 3 Not more than one output should be shorted at a time For testing los the use of High speed test apparatus and or sample and hold techniques are preferable in order to minimize internal heating and more accurately reflect operational values Otherwise prolonged shorting of a High output may raise the chip temperature well above normal and thereby cause invalid readings in other parameter tests In any sequence of parameter tests log tests should be performed last High level output voltage June 15 1992 6 Philips Sem
5. U INTEGRATED CIRCUITS DATA SHE 74F225 16X5 asynchronous FIFO 3 State Product specification 1992 Jun 15 IC15 Data Handbook Philips PHILIPS Semiconductors pl l LI PS Philips Semiconductors Product specification 16 x 5 asynchronous FIFO 3 State 74F225 FEATURES Independent synchronous inputs and outputs Organized as 16 words of 5 bits DC to 25MHz data rate 3 State outputs Cascadable in word width and depth direction DESCRIPTION This 80 bit active element First In First Out FIFO is a monolithic Schottky clamped transistor transistor logic STTL array organized as 16 words of 5 bits each A memory system using the F225 can be easily expanded in multiples of 16 words of 5 bits as shown in Figure 1 The 3 State outputs controlled by a single enable input OE make bus connection and multiplexing simple The F225 processes data in a parallel format at any desired clock rate from DC to 25MHz Status of the F225 is provided by three outputs Input Ready IR Unload Clock Output UNCPOUT and Output Ready OR The data outputs are non inverting with respect to the data inputs and are disabled when the OE input is High When OE is Low the data outputs are enabled to function as totem pole outputs TYPE TYPICAL fmax TYPICAL SUPPLY CURRENT TOTAL ORDERING INFORMATION ORDER CODE DESCRIPTION COMMERCIAL RANGE Vee 5V 210 Tamb 0 C to 70 C 20 pin plastic DIP N74F2
6. YPICAL TIMING DIAGRAM uncen Ty rs UNCPOUT 4 Word 16 i En an D D fr Unload words 4 15 Load Unload Unload Unload word 16 word 2 word 3 word 16 SF00338 NOTE Shaded areas Indicates irrelevant input conditions June 15 1992 8 Philips Semiconductors 16 x 5 asynchronous FIFO 3 State AC WAVEFORMS SF00339 Waveform 1 MR and Clock Pulse Widths Data Setup and Hold Times and MR to Clock Setup Time 1 fMAX UNCPIN Waveform 2 UNCPIN to Output Delays SF00341 Waveform 3 CPA or CPB to IR Delay and MR to IR and OR Delay NOTES 1 For all waveforms Vw 1 5V Product specification 74F225 UNCPOUT SF00342 Waveform 4 CPA or CPB to UNCPOUT and OR Delay UNCPOUT Pulse Width and Qn to OR Skew SF00343 Waveform 5 3 State Output Enable Time to High Level and Output Disable Time from High Level i VoL 0 3V SF00344 Waveform 6 3 State Output Enable Time to Low Level and Output Disable Time from Low Level 2 The shaded areas indicate when the input is permitted to change for predictable output performance June 15 1992 Philips Semiconductors Product specification 16 x 5 asynchronous FIFO 3 State 74F225 APPLICATION Load clock CPA OR CPA CPA OR CPB CPB CPB UNCPOUT UNCPIN IR DO Qo Qo D1 ai Q1 5 bit data input D2 Q2 Q2 D3 Q3 Q3 D4 a4 a4 Master reset
7. iconductors Product specification 16 x 5 asynchronous FIFO 3 State 74F225 AC ELECTRICAL CHARACTERISTICS Tamb 25 C Tamb 0 C to 70 C SYMBOL PARAMETER TEST Vee 5 0V Vee 5 0V 10 UNIT CONDITION C 50pF RL 50022 GC 50pF RL 500Q _MIN TYP max MIN max care e e a m eee ee e e e De fe o e eee e e EI EICHE a wm fefefe e e fe tPLH Propagation delay 20 0 23 0 27 0 17 0 29 0 CPA or CPB to UNCPOUT ee 85 115 150 75 16 0 ns T en el a EEC EN me te Ci fine tpzH Output enable time to Waveform 5 3 5 6 5 1 0 7 0 ps tPZL High or Low level Waveform 6 S 4 5 7 5 2 0 9 0 tpHz Output disable time from Waveform 5 3 5 7 0 1 0 7 5 ns tPLZ High or Low level Waveform 6 4 0 7 0 1 5 7 5 AC SETUP REQUIREMENTS Tamb 25 C Tamb 0 C to 70 C SYMBOL PARAMETER TEST Vcc 5 0V Vee 5 0V 10 UNIT CONDITION C 50pF RL 5000 C 50pF RL 5000 MIN TYP max MIN max ts H Setup time High or Low 0 0 0 0 Dn to CPA or CPB NAVA 00 0 0 by th H Hold time High or Low 14 0 16 5 th L Dn to CPA or CPB Marta EN 12 5 140 ne Recovery time Raven ime ny wom o oo tw H CPA or CPB pulse width 6 5 8 5 tw L High or Low wavetorm T Jl 2 5 35 ns UNCPIN pulse width 24 0 28 0 a mm Pa E twit MR puise width tow Waveforms 35 45 Tr June 15 1992 7 Philips Semiconductors Product specification 16 x 5 asynchronous FIFO 3 State 74F225 T
8. ll be published at a later date specification Philips Semiconductors reserves the right to make chages at any time without notice in order to improve design and supply the best possible product Product Production This data sheet contains final specifications Philips Semiconductors reserves the right to make specification changes at any time without notice in order to improve design and supply the best possible product 1 Please consult the most recently issued datasheet before initiating or completing a design Definitions Short form specification The data in a short form specification is extracted from a full data sheet with the same type number and title For detailed information see the relevant data sheet or data handbook Limiting values definition Limiting values given are in accordance with the Absolute Maximum Rating System IEC 134 Stress above one or more of the limiting values may cause permanent damage to the device These are stress ratings only and operation of the device at these or at any other conditions above those given in the Characteristics sections of the specification is not implied Exposure to limiting values for extended periods may affect device reliability Application information Applications that are described herein for any of these products are for illustrative purposes only Philips Semiconductors make no representation or warranty that such applications will be suitable for the specified
9. s High when valid data is present on the data outputs Data in the array is shifted on the Low to High transition of the Unload Clock Input UNCPIN In order for Output Ready OR to go High Unload Clock Input UNCPIN must also be High 853 1652 06992 Philips Semiconductors Product specification 16 x 5 asynchronous FIFO 3 State 74F225 PIN CONFIGURATION IEC IEEE SYMBOL UNCPOUT DO Di UNCPIN D2 Q0 D3 ai D4 Q2 OE Q3 Q4 SF00334 LOGIC SYMBOL DO D1 D2 D3 D4 CPA CPB UNCPIN 15 14 13 12 11 2 17 Voc Pin 20 GND Pin 10 SF00335 June 15 1992 3 Philips Semiconductors Product specification 16 x 5 asynchronous FIFO 3 State 74F225 LOGIC DIAGRAM Word 16 Word 3 14 Word 1 last word same as 2 or 16 first word 16 UNCPIN 2 POUT IR ur Doe Voc pin 20 GND pin 10 SF00337 June 15 1992 4 Philips Semiconductors Product specification 16 x 5 asynchronous FIFO 3 State 74F225 ABSOLUTE MAXIMUM RATINGS Operation beyond the limit set forth in this table may impair the useful life of the device Unless otherwise noted these limits are over the operating free air temperature range Current applied to output in Low output state Data outputs Operating free air temperature range 0 to 70 Storage temperature range 65 to 150 RECOMMENDED OPERATING CONDITIONS SYMBOL PARAMETER LIMIT
10. use without further testing or modification Disclaimers Life support These products are not designed for use in life support appliances devices or systems where malfunction of these products can reasonably be expected to result in personal injury Philips Semiconductors customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify Philips Semiconductors for any damages resulting from such application Right to make changes Philips Semiconductors reserves the right to make changes without notice in the products including circuits standard cells and or software described or contained herein in order to improve design and or performance Philips Semiconductors assumes no responsibility or liability for the use of any of these products conveys no license or title under any patent copyright or mask work right to these products and makes no representations or warranties that these products are free from patent copyright or mask work right infringement unless otherwise specified Philips Semiconductors Copyright Philips Electronics North America Corporation 1998 811 East Arques Avenue All rights reserved Printed in U S A P O Box 3409 Sunnyvale California 94088 3409 print code Date of release 10 98 Telephone 800 234 7381 Document order number 9397 750 05099 Left make things better ee PHILIPS
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PHILIPS 74F225 handbook