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National Semiconductor LMC6492 Dual/LMC6494 Quad CMOS Rail-to-Rail Input Output Operational Amplifier handbook

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1. Typical Performance Characteristics v 15v single Supply 25 C unless otherwise specified Continued Non Inverting Small Inverting Large Inverting Large Signal Signal Pulse Response Signal Pulse Response Pulse Response z z z E E E 5 5 S m rad Sa zZ 8 T 125 C TUE T 25 C ni NE RL 2 0 EL R 2kQ x OIL 2 58 z gt KD UA a a a E Hs 5 5 5 2 2 a 5 5 5 o 50 50 1ps 1 19 14s o 1v 17 14s TIME 1 us DIV TIME 1 us DIV TIME 1 us DIV DS012049 64 DS012049 65 DS012049 66 Inverting Large Signal Inverting Small Signal Inverting Small Signal Pulse Response Pulse Response Pulse Response 5 z a a zs T 559 2 T 25 aS R 2k0 e is 7 R 2ko Se
2. DS012049 28 Sinking Current vs Output Voltage 100 10 e Vs 5V Ee amp H HHH H 0 01 0 001 0 01 0 1 1 10 Output Voltage Referenced to GND V DS012049 31 Input Voltage Noise vs Frequency 200 180 160 140 120 100 80 60 40 20 00 Hz VOLTAGE NOISE nV 10 100 1k 10k FREQUENCY Hz DS012049 34 Sourcing Current vs Output Voltage 100 10 t 1 Vs 3V 8 8 01 0 01 0 001 0 001 0 01 0 1 1 10 Output Voltage Referenced to Vg V 05012049 29 Sinking Current vs Output Voltage 100 10 co 1 Vs 3V o 0 1 ER Et aeaee 0 01 0 001 0 001 0 01 0 1 1 10 Output Voltage Referenced to GND V 05012049 32 Input Voltage Noise vs Input Voltage
3. High Input Z DC Differential Amplifier R2 100k DS012049 19 For Bt _ R2 R3 CMRR depends on this resistor ratio match R4 1 Vo V 2 1 As shown Vo 2 Vo V4 Photo Voltaic Cell Amplifier Ry 1M lcet CELL HAS OV ACROSS IT DS012049 20 Instrumentation Amplifier R4 DS012049 21 R1 44 2k Vout tall pot R5 44 2k If R1 R5 R3 R6 and R4 R7 then Vout _ R2 281 R4 VIN R2 Ay 100 for circuit shown 9 3k Rail to Rail Single Supply Low Pass Filter C1 Vour DS012049 22 1 C2 R2 R2 C1 C2 f y 2 Re 2zR1Ci Damping Factor 7 Cr NRI This low pass filter circuit can be used as an anti aliasing fil ter with the same supply as the A D converter Filter designs can also take advantage of the LMC6492 4 ultra low input current The ultra low input current yields negligible offset er ror even when large value resistors are used This in turn al lows the use of smaller valued capacitors which take less board space and cost less Low Voltage Peak Detector with Rail to Rail Peak Capture Range 20ka Vout Vin au 100 pF 05012049 23 Dielectric absorption and leakage is minimized by using polystyrene or polypropylene hold capacitor The droop rate is primarily determined by the value of C and diode leakage current Select low leakage current
4. 5345678 9 101112131415 16 SUPPLY VOLTAGE V DS012049 58 Non Inverting Large Signal Pulse Response TIME 1 us DIV DS012049 59 Non Inverting Small Signal Pulse Response INPUT SIGNAL INPUT SIGNAL 559C 2 0 1v DIV 50 mV DIV OUTPUT SIGNAL OUTPUT SIGNAL 50m 1s 50 1 ys TIME 1 us DIV 05012049 61 TIME 1 us DIV DS012049 62 Open Loop Output Impedance vs Frequency OUTPUT IMPEDANCE 0 1000 0 1 Non Inverting Large INPUT SIGNAL Vs 5V 1 10 100 1000 10000 FREQUENCY kHz DS012049 57 Signal Pulse Response Ty 7 259C R 2 0 av Tus OUTPUT SIGNAL 1v DIV TIME 1 us DIV Non Inverting Small Signal Pulse Response INPUT SIGNAL OUTPUT SIGNAL 50 mV DIV DS012049 60 50m 50 14s TIME 1 us DIV DS012049 63 www national com
5. LMC6492 Amplifier General Description The LMC6492 LMC6494 amplifiers were specifically devel oped for single supply applications that operate from 40 C to 125 This feature is well suited for automotive systems because of the wide temperature range A unique design to pology enables the LMC6492 LMC6494 common mode volt age range to accommodate input signals beyond the rails This eliminates non linear output errors due to input signals exceeding a traditionally limited common mode voltage range The LMC6492 LMC6494 signal range has a high CMRR of 82 dB for excellent accuracy in non inverting circuit configurations LMC6492 LMC6494 rail to rail input is complemented by rail to rail output swing This assures maximum dynamic signal range which is particularly important in 5V systems Ultra low input current of 150 fA and 120 dB open loop gain provide high accuracy and direct interfacing with high imped ance sources National Semiconductor LMC6492 Dual LMC6494 Quad CMOS Rail to Rail Input and Output Operational October 1994 Features Typical unless otherwise noted m Rail to Rail input common mode voltage range guaranteed over temperature Rail to Rail output swing within 20 mV of supply rail 100 kQ load Operates from 5V to 15V supply Excellent CMRR and 82 dB Ultra low input current 150 fA High voltage gain 100 Low supply current Vs 5V Low offset voltage
6. CMRR vs Frequency 100 90 80 70 60 50 CMRR dB 10 100 1k 10k 100k FREQUENCY Hz DS012049 42 CMRR vs Input Voltage 120 100 80 60 CMRR dB 40 20 1 5 1 2 0 9 0 6 0 3 0 00 3 0 6 0 9 1 2 1 5 INPUT VOLTAGE V DS012049 45 www national com specified Continued AVos vs CMR 1 0 0 8 0 6 Vs 2 5V 04 02 0 2 0 4 0 6 0 8 10 2 T2 1 0 1 2 5 Vy CHANGE Vos mV 05012049 46 Input Voltage vs Output Voltage 160 120 INPUT VOLTAGE o OUTPUT VOLTAGE V DS012049 49 Open Loop Frequency Response vs Temperature 80 180 Ve 15V 70 E GAIN 2 0 60 135 50 559C PHA g 40 1155 90 oe Fl 209 amp 2 d 45 10 1259c h 0 1 0 85 10 20 Cu A tk 10k 10M FREQUENCY Hz PHASE 9 05012049 52 1 0 0 8 0 6 Vs 1 5V 0
7. zs zo z e KD UA a 5 5 5 E E 5 5 5 ex 1v 1Y 1ps o 50 e 50 50 1 TIME 1 us DIV TIME 1 us DIV TIME 1 us DIV DS012049 67 DS012049 68 DS012049 69 Inverting Small Signal Stability vs Stability vs Pulse Response Capacitive Load Capacitive Load 10000 10000 LI Ay 1 Ay 1 Vs 7 5V Vg 7 5 2 R 1 2 i RM a 2 1000 UNSTABLE Lian 1000 UNSTABLE oa E 5 5 4 m E E 8 9 100 8 100 4 5 5 25 OVERSHOOT 25 OVERSHOOT 2 50 1s 10 10 5 5 4 3 2 10 12 345 6 6 5 4 3 2 10 12 345 6 TIME 1 us DIV DS012049 70 Vout V Vour V DS012049 71 DS012049 72 www national com 10 Typical Performance Characteristics v 15v single Supply 25 C unless otherwise specified Continued Stability vs Stability vs Stability vs Capacitive Load Capacitive Load Capacitive Load 10000 APT 10000 10000 MN Ay 10 Ay 10 Vg 7 5 Vs 7 5V g R 6000 Se T T R 1M L 2k UNSTABLE 25 1000 e
8. 0 813 0 127 RAD 2 337 OA PIN NO 1 ror If i 6 35 0 127 PIN NO 1 MENT o 0 280 0 040 lt 7 112 MIN 0 030 iggy 101 m OPTION 2 0 300 0 320 0 762 0 039 0 145 0 200 7 62 8 128 20 1 0 991 3 683 5 080 0130 0 005 Y 830250127 i wei 0 nt 0 065 Y 75 3599 gy 0 009 0 015 EN A EEA 1 651 90 4 0 508 0 229 0 381 DIA TYP MIN 0 040 NOM 0 018 0 003 0 325 445 0 457 0 076 EE 0 00 0010 nass 2540 0 254 eae 14340 0 060 Ts 1 524 1 270 REV 8 Lead 0 300 Wide Molded Dual In Line Package Order Number LMC6492AEN or LMC6492BEN NS Package Number N08A 0 740 0 770 m 18 80 19 56 0 090 12 288 INDEX AREA 0 250 0 010 6 350 0 254 PIN NO 1 IDENT 0 092 0 030 MAX 2 387 10 762 DEPTH OPTION 1 OPTION 02 0 136 0 005 TEN 8 429 9 127 30300 0329 0 145 0 200 0 060 4 90 10 0 065 3 583 5 080 1 524 m tno z T1657 A 0 008 0 016 0 020 A 90 4 0 203 0 406 ui 050 0 125 0 150 0 075 0 015 3 175 3 810 i THA 0 014 0 023 001 008 0 100 0 010 MIN 0 358 0 584 7 2510 0259 P 0 050 0 010 1 270 0 254 NIA REY F 14 Lead Molded Dual In Line Package Order Number LMC
9. 3 988 0 010 0 020 45 X 0 053 0 069 0 254 0 508 1 346 1 753 0 004 0 010 8 MAX ALL LEADS 0 102 0 254 i AER f bonu 0 008 0 010 0 102 mace 0 050 0 014 0 020 255 5254 ALL LEAD TIPS 016 0 0 356 0 050 _0 014 0 020 B Mu MEE LLL aii 008 gt TYP ALL LEADS 0 203 REV 8 Small Outline Package Order Number LMC6492AEM or LMC6492BEM NS Package Number M08A 0 335 0 344 8 509 8 738 14 13 12 1 10 9 8 0 228 0 24 5 791 6 198 or LEAD NO 1 AX IDENT 1 2 3 4 5 6 7 0 010 max 0 254 0 150 0 157 3810 3 958 lt 0 010 0 020 20 053 0 069 0 254 0 508 9 1 346 1 753 8 0 004 0 010 ALL LEADS 0 102 0 254 IEEEREMEUBCORUUDOENSOCNEMER E eu i SEATING NE PLANE 5 A 0 010 oor 0 050 0 014 0 020 0 203 0 254 0 016 0 050 0 358 gt I 0356 0 508 ALL LEADS 0 004 0 406 1 270 0 008 10102 TYP ALL LEADS 00 203 ALL LEAD TIPS M34 REV Hj 14 Pin Small Outline Package Order Number LMC6494AEM or LMC6494BEM NS Package Number M14A www national com 16 Physical Dimensions inches millimeters unless otherwise noted Continued 0 373 0 400 9 474 10 16 0 090 2 286 0 092 OPTION 1 0 250 0 005 0 032 0 005
10. 1 80 532 93 58 www national com Italiano Tel 49 0 1 80 534 16 80 National does not assume any responsibility for use of any circuitry described no circuit patent licenses are implied and National reserves the right at any time without notice to change said circuitry and specifications
11. 4 0 2 0 0 2 0 4 0 6 0 8 1 0 2 15 1 05 0 05 1 15 2 Vin V CHANGE Vos mV DS012049 47 Open Loop Frequency Response 140 120 100 80 GAIN dB 0 1 1 10 100 1k 10k 100k 1M 10M FREQUENCY Hz DS012049 50 Maximum Output Swing vs Frequency 15 Ay 1 amp Vs 15V 22 722 AO R 2 0 o THD 3 a i 5 E 5 5 a 0 0 1 1 10 100 FREQUENCY kHz DS012049 53 Typical Performance Characteristics v 15v single Supply 25 C unless otherwise Input Voltage vs Output Voltage 160 120 2 80 Vs 7 5 INPUT VOLTAGE o 120 160 8 6 4 2 0 2 4 6 8 OUTPUT VOLTAGE V DS012049 48 Open Loop Frequency Response 120 500kQ 100 80 GAIN dB 0 1 1 10 100 1k 10k 100k 1M 10M FREQUENCY Hz DS012049 51 Gain and Phase vs Capacitive Load n IR Vs 15 PHASE E 40 R 500 90 30 20 PP 45 G
12. Power Supply lt 10V 82 65 63 Rejection Ratio Vo 2 5V 60 58 min Vom Input Common Mode Vt 5V and 15V V 0 3 0 25 0 25 V Voltage Range For CMRR 2 50 dB 0 0 max 0 3 V 0 25 V 0 25 V vr vr min Ay Large Signal Voltage Gain 2 Sourcing 300 V mV Note 7 Sinking 40 min www national com DC Electrical Characteristics continued Unless otherwise specified all limits guaranteed for T 25 C V 5V V OV Vom Vo V 2 and R gt 1 Bold face limits apply at the temperature extremes LMC6492AE LMC6492BE Symbol Parameter Conditions Typ LMC6494AE LMC6494BE Units Note 5 Limit Limit Note 6 Note 6 Vo Output Swing V 5V 49 4 8 4 8 V 2 to V 2 4 7 4 7 min 0 1 0 18 0 18 V 0 24 0 24 max Vt 5V 4 7 4 5 4 5 V 6000 to V 2 4 24 4 24 0 3 0 5 0 5 V 0 65 0 65 max Vt 15V 14 7 14 4 14 4 V 2 to V 2 14 0 14 0 min 0 16 0 35 0 35 V 0 5 0 5 max Vt 15V 14 1 13 4 13 4 V 6000 to V 2 13 0 13 0 0 5 1 0 1 0 V 1 5 1 5 max Output Short Circuit Current Sourcing Vo OV 25 16 16 10 10 Vt 5V Sinking Vo 5V 22 11 11 8 8 mA lac Output Short Circuit Current Sourcing 0V 30 28 28 min 20 20 V 15V Sinking 5V 30 30 30 Note 8 22 22 ls Supply Current LMC6492 1 0 1 75 1 75 mA Vt 5V Vo V 2 2 1 2 1 LMC6492
13. Temperature Range 2000V Supply Voltage V 0 3V V 0 3V 16V 5 mA 30 mA 40 mA 260 C 65 C to 4150 C DC Electrical Characteristics Unless otherwise specified all limits guaranteed for T 25 C V 5V V OV Vom Vo V 2 and R gt 1 Bold face limits apply at the temperature extremes Junction Temperature Note 4 Operating Conditions note 1 Supply Voltage Junction Temperature Range LMC6492AE LMC6492BE LMC6494AE LMC6494BE Thermal Resistance N Package 8 Pin Molded DIP 2 5V lt V 15 5V 40 C lt 40 C lt M Package 8 Pin Surface Mount N Package 14 Pin Molded DIP M Package 14 Pin Surface Mount 150 C T lt 4125 C T lt 4125 C 108 C W 171 C W 78 C W 118 C W LMC6492AE LMC6492BE Symbol Parameter Conditions Typ LMC6494AE LMC6494BE Units Note 5 Limit Limit Note 6 Note 6 Vos Input Offset Voltage 0 11 3 0 6 0 3 8 6 8 TCVos Input Offset Voltage 1 0 Average Drift lg Input Bias Current Note 11 0 15 200 200 pA max los Input Offset Current Note 11 0 075 100 100 pA max Rin Input Resistance gt 10 Tera Cin Common Mode 3 pF Input Capacitance CMRR Common Mode OV Vom 15V 82 65 63 dB Rejection Ratio V 15V 60 58 min OV Vom lt 5V 82 65 63 60 58 PSRR Positive Power Supply 5V lt V lt 15V 82 65 63 dB Rejection Ratio Vo 2 5V 60 58 min PSRR Negative
14. and not device performance Actual performance is reflected in the typical value Input Current vs Temperature 1000 100 INPUT CURRENT pA 0 2 4 6 8 10 12 14 16 SUPPLY VOLTAGE V DS012049 25 25 50 75 100 125 150 TEMPERATURE 05012049 26 Sourcing Current vs Output Voltage nditions for which the device is in Electrical Characteristics 100 10 is H i 15V 5 8 8 01 0 01 0 001 0 01 0 1 1 10 100 Output Voltage Referenced to Vs V 05012049 27 www national com specified Continued Sourcing Current vs Output Voltage 100 10 E 1 Vs 5V 8 8 01 0 01 0 001 0 001 0 01 0 1 1 10 Output Voltage Referenced to Vs V
15. diodes to minimize drooping Pressure Sensor STRAIN VREF GAUGE DS012049 24 Rx Ry gt gt R1 R2 R3 and R4 R2 R3 Ry R3 R4 Vo am eana VREF Ri R2 4 R3 R4 In a manifold absolute pressure sensor application a strain gauge is mounted on the intake manifold in the engine unit Manifold pressure causes the sensing resistors R1 R2 R3 www national com 14 Application Circuits continued and R4 to change The resistors change in a way such that R2 and R4 increase by the same amount R1 and R3 de crease This causes a differential voltage between the input of the amplifier The gain of the amplifier is adjusted by Ry Spice Macromodel A spice macromodel is available for the LMC6492 4 This model includes accurate simulation of and many other characteristics as listed on the macromodel disk Contact your local National Semiconductor sales office to obtain an operational amplifier spice model library disk Input common model voltage range Frequency and transient response GBW dependence on loading conditions Quiescent and dynamic supply current Output swing dependence on loading conditions www national com Physical Dimensions inches millimeters unless otherwise noted 0 188 0 197 4 800 5 004 8 7 8 5 0 228 0 244 5 791 6 198 0 010 wax 0 254 1 C 2 3 4 IDENT 0 150 0 157 3 810
16. 1 3 1 95 1 95 mA Vt 15V Vo V 2 2 3 2 3 LMC6494 2 0 3 5 3 5 mA Vt 45V Vo V 2 4 2 4 2 LMC6494 2 6 3 9 3 9 mA 415V Vo V 2 4 6 4 6 max www national com AC Electrical Characteristics Unless otherwise specified all limits guaranteed for T 25 C V 5V V OV Vom Vo V 2 R gt 1 Bold face limits apply at the temperature extremes LMC6492AE LMC6492BE Symbol Parameter Conditions Typ LMC6494AE LMC6494BE Units Note 5 Limit Limit Note 6 Note 6 SR Slew Rate Note 9 1 3 0 7 0 7 Vus min 0 5 0 5 GBW Gain Bandwidth Product V 15V 1 5 MHz Om Phase Margin 50 Deg Gn Gain Margin 15 dB Amp to Amp Isolation Note 10 150 dB en Input Referred F 1 kHz 37 nv Voltage Noise Vom 1V HZ l Input Referred F 1 kHz 0 06 Current Noise HZ T H D Total Harmonic F 1 kHz Ay 2 0 01 Distortion 10 Vo 4 1 Vpp F 10 kHz Ay 2 10 Vo 8 5 Vpp 0 01 V 10V Note 1 Absolute Maximum Ratings indicate limits beyond which damage to the device may occur Operating Ratings indicate co tended to be functional but specific performance is not guaranteed For guaranteed specifications and the test conditions see tl Note 2 Human body model 1 5 kO in series with 100 pF Note 3 Applies to both single supply and sp it supply operation Continuous short operation at elevated ambient temperature can resu
17. 1000 a 1000 UN LL gt gt lt Q 100 2 100 100 E 1 amp E j amp 5 5 8 7 25 OVERSHOOT I 25 OVERSHOOT 25 OVERSHOOT 10 10 10 B 3y 4 39 2 1l0 12 3 4 5 5 6 5 4 3 2 10 1253456 6 5 4 3 2 10 12 345 6 Vout Vout Vout V DS012049 73 DS012049 74 DS012049 75 Stability vs Capacitive Load 10000 Ay 10 Vs 7 5V 1000 CAPACITIVE LOAD nF E o 25 OVERSHOOT 10 6 5 4 3 2 10 1253456 V DS012049 76 Application Notes Input Common Mode Voltage Range Unlike Bi FET amplifier designs the LMC6492 4 does not exhibit phase inversion when an input voltage exceeds the negative supply voltage Figure 1 shows an input voltage ex ceeding both supplies with no resulting phase inversion on the output DS012049 8 FIGURE 1 An Input Voltage Signal Exceeds the LMC6492 4 Power Supply Voltages with No Output Phase Inversion The absolute maximum input voltage is 300 mV beyond ei ther supply rail at room temperature Voltages greatly ex ceeding this absolute maximum rating as in Figure 2 can cause excessive current to flow in or out of the input pins possibly affecting reliability V 7 5V DS012049 9 FIGURE 2 A 7 5 Input Signal Greatly Exceeds the 5V Supply in Figure 3 Causing No Phase Inver
18. 6494AEN or LMC6494BEN NS Package Number N14A 17 www national com LMC6492 Dual LMC6494 Quad CMOS Rail to Rail Input and Output Operational Amplifier LIFE SUPPORT POLICY NATIONAL S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DE VICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF NATIONAL SEMI CONDUCTOR CORPORATION As used herein 1 Life support devices or systems are devices or sys 2 A critical component is any component of a life support tems which a are intended for surgical implant into the body or b support or sustain life and whose fail ure to perform when properly used in accordance with instructions for use provided in the labeling can be reasonably expected to result in a significant injury device or system whose failure to perform can be rea sonably expected to cause the failure of the life support device or system or to affect its safety or effectiveness to the user National Semiconductor National Semiconductor National Semiconductor National Semiconductor Corporation Europe Asia Pacific Customer Japan Ltd Americas Fax 449 0 1 80 530 85 86 Response Group Tel 81 3 5639 7560 Tel 1 800 272 9959 Email europe support nsc com Tel 65 2544466 Fax 81 3 5639 7507 Fax 1 800 737 7018 Deutsch Tel 49 0 1 80 530 85 85 Fax 65 2504466 Email support nsc com English Tel 49 0 1 80 532 78 32 Email sea support nsc com Frangais Tel 49 0
19. 80 70 Hz 60 F 1kHz 50 40 VOLTAGE NOISE nV 30 20 01234567 8 910111213141516 COMMON MODE INPUT VOLTAGE V DS012049 35 Typical Performance Characteristics 15v single Supply 25 C unless otherwise Sinking Current vs Output Voltage 100 10 i Vg 15 ES x T dE H ii H 0 01 i 0 001 0 01 0 1 1 10 100 Output Voltage Referenced to GND V DS012049 30 Output Voltage Swing vs Supply Voltage 30 27 24 21 OUTPUT SWING FROM SUPPLY VOLTAGE mV 0 5 6 9 12 15 SUPPLY VOLTAGE V 05012049 33 Input Voltage Noise vs Input Voltage 80 70 Vs 25V 7 Hz 60 50 40 VOLTAGE NOISE nV 30 20 0 1 2 3 4 5 COMMON MODE INPUT VOLTAGE V DS012049 36 www national com Typical Performance Characteristics v 15v single Supply 25 C unless otherwise specified Continued Input Voltage Noise vs Input Voltage 80 70 Vg Hz 60 50 40
20. AIN INC C 10 DN 5 9 8 10 20 Ta 45 Q 500pF 30 40 90 50 10k 100k 1M 10M FREQUENCY Hz DS012049 54 www national com Typical Performance Characteristics v 15v single Supply 25 C unless otherwise specified Continued Gain and Phase vs Capacitive Load Open Loop Output Impedance vs Frequency m Vs 15 1000 15V S 5 40 8 9 900 30 GAIN 800 20 e 45 700 g 10 Z 600 Z o0 82 500 10 400 5 5 20 0 45 300 SOT 30 500pF S8 200 40 Ci 1000 pF 90 100 50 0 10k 100k 1M 10M 0 1 10 100 1000 10000 FREQUENCY Hz FREQUENCY kHz 05012049 55 05012049 56 5 Non Inverting Large Supply Voltage Signal Pulse Response 1 50 Ay 1 1 45 x R E 140 Y Vin 1 8 155 s 5 g gt 130 gt a n E 129 gt Ty 12500 amp 120 eu R 2 0 amp 115 o 193 1 10 RENO 2 5 1 05 1 1 5 1 00
21. VOLTAGE NOISE nV 30 20 0 0 5 1 15 2 25 3 COMMON MODE INPUT VOLTAGE V DS012049 37 Positive PSRR vs Frequency 100 90 80 70 60 50 PSRR dB 1 10 100 1k 10k 100k FREQUENCY Hz DS012049 40 CMRR vs Input Voltage 120 100 RL 5 0 80 CMRR dB 60 40 20 77 5 6 0 4 5 3 0 1 5 0 0 1 5 3 0 4 5 6 0 7 5 INPUT VOLTAGE V DS012049 43 Crosstalk Rejection vs Frequency HB FUE Vg 15V R 5 160 150 140 130 REJECTION dB 120 110 100 0 1 1 0 10 0 FREQUENCY kHz DS012049 38 Negative PSRR vs Frequency 100 90 80 70 60 50 PSRR dB 1 10 100 1k 10k 100k FREQUENCY Hz DS012049 41 CMRR vs Input Voltage 120 Vs 2 5V F 10kHz 100 5 80 60 CMRR dB 40 20 72 5 2 0 1 5 1 0 0 5 0 0 0 5 1 0 1 5 2 0 25 INPUT VOLTAGE V DS012049 44 Crosstalk Rejection vs Frequency 170 177 Vs 5V R 5ka 160 150 140 130 REJECTION dB 120 110 100 0 1 1 0 10 0 FREQUENCY kHz DS012049 39
22. drift 1 0 V C n n a 120 dB 500 pA Amplifier Applications Automotive transducer amplifier Pressure sensor Oxygen sensor Temperature sensor n n a Speed sensor Connection Diagrams 8 Pin DIP SO 14 Pin DIP SO yt OUT A OUT B INA IN At IN B7 v IN Bt IN B 05012049 1 4 IN B Top View OUT B 05012049 2 View 1999 National Semiconductor Corporation DS012049 www national com 1ndino pue 1nduj 1 SONO 6 92 267921017 Ordering Information Temperature Range Transport NSC Package 1 Extended 40 C to 125 Media Drawing 8 Pin Small Outline LMC6492AEM Rails M08A LMC6492BEM LMC6492AEMX Tape and Reel LMC6492BEMX 8 Pin Molded DIP LMC6492AEN Rails N08A LMC6492BEN 14 Pin Small Outline LMC6494AEM Rails M14A LMC6494BEM LMC6494AEMX Tape and Reel LMC6494BEMX 14 Pin Molded DIP LMC6494AEN Rails N14A LMC6494BEN www national com Absolute Maximum Ratings Note 1 If Military Aerospace specified devices are required please contact the National Semiconductor Sales Office Distributors for availability and specifications ESD Tolerance Note 2 Differential Input Voltage Voltage at Input Output Pin Supply Voltage V V Current at Input Pin Current at Output Pin Note 3 Current at Power Supply Pin Lead Temp Soldering 10 sec Storage
23. e current See Figure 7 for typical connections of guard rings for standard op amp configurations www national com Application Notes continued Guard Ring FIGURE 6 Examples of Guard Ring in PC Board Layout OUTPUT 05012049 14 Guard Ring py OUTPUT INPUT 05012049 15 OUTPUT DS012049 16 Follower FIGURE 7 Typical Connections of Guard Rings The designer should be aware that when it is inappropriate to lay out a PC board for the sake of just a few circuits there is another technique which is even better than a guard ring on a PC board Dor t insert the amplifier s input pin into the board at all but bend it up in the air and use only air as an in sulator Air is an excellent insulator In this case you may have to forego some of the advantages of PC board con struction but the advantages are sometimes well worth the effort of using point to point up in the air wiring See Figure 8 DS012049 13 FEEDBACK CAPACITOR LLLLL RE BOS P SOLDER CONNECTION 05012049 17 Input pins are lifted out of PC board and soldered directly to components All other pins connected to PC board FIGURE 8 Air Wiring Application Circuits DC Summing Amplifier Vin gt OV5c and Vo gt Voc R 100k V V20 Vo V3 V4 100k 05012049 18 Where Vo V4 V2 V3 V4 V4 V2 gt V4 to keep Vo gt 0 www national com Application Circuits
24. lt in exceeding the maximum allowed junction temperature at 150 C Output currents in excess of 30 mA over long term may adversely affect reliability Note 4 The maximum power dissipation is a function of T a 6j and TA The maximum allowable power dissipation at any ambient temperature is TJ max T4 0jA All numbers apply for packages soldered directly into a PC board Note 5 Note 6 Note 7 Note 8 Note 9 Typical Performance Characteristics v 15v single Supply 25 C unless otherwise specifi Suppl Suppl SUPPLY CURRENT mA Typical Values represent the most li ely parametric norm All limits are guaranteed by testing or statistical analysis V 15V Vom 7 5V and connected to 7 5V For Sourcing tests 7 5V lt Vo lt 11 5V For Sinking tests 3 5V lt Vo lt 7 5V Do not short circuit output to V when V is greater than 13V or reliability will be adversely affected V 15V Connected as voltage fol ed y Current vs y Voltage 2 0 1 8 1 6 125 C 14 859C 12 25 C 1 0 0 8 559C 0 6 0 4 0 2 0 0 lower with 10V step input Number specified is the slower of the positive and negative slew rates Note 10 Input referred V 15V and R 100 connected to 7 5V Each amp excited in turn with 1 kHz to produce Vo 12 Vpp Note 11 Guaranteed limits are dictated by tester limits
25. rally recognized that any circuit which must operate with less than 1000 pA of leakage current requires special layout of the PC board When one wishes to take advantage of the ultra low bias current of the LMC6492 4 typically 150 fA it is essential to have an excellent layout Fortu nately the techniques of obtaining low leakages are quite simple First the user must not ignore the surface leakage of the PC board even though it may sometimes appear accept ably low because under conditions of high humidity or dust or contamination the surface leakage will be appreciable To minimize the effect of any surface leakage lay out a ring of foil completely surrounding the LMC6492 4 s inputs and the terminals of components connected to the op amp s in puts as in Figure 6 To have a significant effect guard rings should be placed on both the top and bottom of the PC board This PC foil must then be connected to a voltage which is at the same voltage as the amplifier inputs since no leakage current can flow between two points at the same po tential For example a PC board trace to pad resistance of 10120 which is normally considered a very large resistance could leak 5 pA if the trace were a 5V bus adjacent to the pad of the input This would cause a 33 times degradation from the LMC6492 4 s actual performance If a guard ring is used and held within 5 mV of the inputs then the same resistance of 1010 will only cause 0 05 pA of leakag
26. sion Due to R Applications that exceed this rating must externally limit the maximum input current to 5 mA with an input resistor as shown in Figure 3 www national com Application Notes continued ra 10 0 Vour Vin DS012049 10 FIGURE 3 R Input Current Protection for Voltages Exceeding the Supply Voltages Rail To Rail Output The approximate output resistance of the LMC6492 4 is 110Q sourcing and 800 sinking at V 5V Using the calcu lated output resistance maximum output voltage swing can be esitmated as a function of load Compensating for Input Capacitance It is quite common to use large values of feedback resis tance for amplifiers with ultra low input current like the LMC6492 4 Although the LMC6492 4 is highly stable over a wide range of operating conditions certain precautions must be met to achieve the desired pulse response when a large feedback resistor is used Large feedback resistors with even small values of input capacitance due to transducers photo diodes and circuit board parasitics reduce phase margins When high input impedances are demanded guarding of the LMC6492 4 is suggested Guarding input lines will not only reduce leakage but lowers stray input capacitance as well See Printed Circuit Board Layout for High Impedance Work The effect of input capacitance can be compensated for by adding a capacitor C around the feedback resistors as in Figure 1 s
27. uch that 1 1 gt 2mRyCin 27928 or Ry Cin lt Since it is often difficult to know the exact value of can be experimentally adjusted so that the desired pulse re sponse is achieved Refer to the LMC660 and LMC662 for a more detailed discussion on compensating for input capacitance Vout 05012049 11 FIGURE 4 Cancelling the Effect of Input Capacitance Capacitive Load Tolerance All rail to rail output swing operational amplifiers have volt age gain in the output stage A compensation capacitor is normally included in this integrator stage The frequency lo cation of the dominant pole is affected by the resistive load on the amplifier Capacitive load driving capability can be op timized by using an appropriate resistive load in parallel with the capacitive load see Typical Curves Direct capacitive loading will reduce the phase margin of many op amps A pole in the feedback loop is created by the combination of the op amp s output impedance and the ca pacitive load This pole induces phase lag at the unity gain crossover frequency of the amplifier resulting in either an os cillatory or underdamped pulse response With a few exter nal components op amps can easily indirectly drive capaci tive loads as shown in Figure 5 DS012049 12 FIGURE 5 LMC6492 4 Noninverting Amplifier Compensated to Handle Capacitive Loads Printed Circuit Board Layout for High Impedance Work It is gene

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