National Semiconductor LMC567 Low Power Tone Decoder handbook
Contents
1. 1 753 cassoni ALL LEADS 0 102 0 254 e AEREE Y seme Ri i A PLANE nta 0 050 0 014 0 020 016 0 0 356 rentes PE Ta fari tzm hg 10 356 0 508 TYP ALL LEADS oon baa MOBA REV Hy Molded Small Outline SO Package M Order Number LMC567CM NS Package Number M08A 0 373 0 400 9 474 10 16 0 090 0 092 via 0 032 0 005 2 337 TN 0 813 0 127 0 045 0 015 1 143 0 381 0 250 0 005 6 35 0 127 RAD OPTION 2 0 145 0 200 3 683 5 080 0 130 0 005 3 302 0 127 y A 0 125 0 140 y 3 175 3 556 0 508 MIN 90 4 TYP 0 018 0 003 0 457 0 076 0 100 0 010 2 540 0 254 ii 0 060 1 524 gt 0 050 1 270 NOB8E REV F Molded Dual In Line Package N Order Number LMC567CN NS Package Number N08E www national com Notes LIFE SUPPORT POLICY NATIONAL S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT AND GENERAL COUNSEL OF NATIONAL SEMICONDUCTOR CORPORATION As used herein 1 Life support devices or systems are devices or 2 A critical component is any component of a life systems which a are intended for surgical implant into the body or b support or sustain life and whose failure to perform when properly used in accordance with instructions for use provided in the labeling can b2. f CAP Rt TIMING RESISTOR DS008670 1 1999 National Semiconductor Corporation DS008670 www national com 19pP099 UOL 19M0d MOT Z9G9WI Absolute Maximum Ratings note 1 If Military Aerospace specified devices are required please contact the National Semiconductor Sales Office Distributors for availability and specifications Input Voltage Pin 3 2Vop Supply Voltage Pin 4 10V Output Voltage Pin 8 13V Voltage at All Other Pins Vs to Gnd Output Current Pin 8 30 mA Package Dissipation 500 mW Operating Temperature Range TA 25 C to 125 C Electrical Characteristics Storage Temperature Range 55 C to 150 C Soldering Information Dual In Line Package Soldering 10 sec 260 C Small Outline Package Vapor Phase 60 sec 215 C Infrared 15 sec 220 C See AN 450 Surface Mounting Methods and Their Effect on Product Reliability for other methods of soldering surface mount devices Test Circuit Ta 25 C V 5V RtCt 2 Sw 1 Pos 0 and no input unless otherwise noted Symbol Parameter Conditions Min Typ Max Units 14 Power Supply RtCt 1 Quiescent Vs 2V 0 3 Current or Activated V 5V 0 5 0 8 mAdc Vs 9V 0 8 1 3 V3 Input D C Bias 0 mVdc R3 Input Resistance 40 kQ 18 Output Leakage 1 100 nAdc fo Center Frequency RtCt 2 Measure Oscillator Vs 2V 98 Fose 2 Frequency and
3. Divide by 2 V 5V 92 103 113 kHz Vs 9V 105 Afo Center Frequency folav folav Shift with Supply _ X 100 1 0 2 0 SIN 7 folsv Vin Input Threshold Set Input Frequency Equal to fo Vs 2V 11 20 27 Measured Above Increase Input Level V 5V 17 30 45 mVrms Until Pin 8 Goes Low V 9V 45 AVin Input Hysteresis Starting at Input Threshold Decrease Input ps 1 5 mVrms Level Until Pin 8 goes High V8 Output Sat Voltage Input Level gt Threshold 18 2 mA 0 06 0 15 Vd Choose RL for Specified 18 18 20 mA 0 7 g L D B W Largest Detection Measure Foso with Sw 1 in Vs 2V 7 11 15 Bandwidth Pos 0 1 and 2 7 A Lube Foselp2 T Fosc P1 x 0 sa 11 14 17 Los Foselpo vee 15 ABW Bandwidth Skew F F osc P2 osc P1 Skew 1 X 100 0 1 0 2 FosclPo fois Highest Center RtCt 3 Measure Oscillator Frequency and Divide by 2 700 kHz Freq Vin Input Threshold at Set Input Frequency Equal to fmax measured Above mVrms di 35 fmax Increase Input Level Until Pin 8 goes Low Note 1 Absolute Maximum Ratings indicate limits beyond which damage to the device may occur Operating Ratings indicate conditions for which the device is func tional but do not guarantee specific performance limits Electrical Characteristics state DC and AC electrical specifications under particular test conditions which guar antee specific performance limits This assumes that the device is within the Operating Ratings Specification
4. 0 amp tot S os E io N we we lt 1085 0 0 o fxd Li 2 2 dE 2 10 0 5 to 10 1 0 2 0 0 1 5 3 0 0 2 4 6 8 10 12 14 16 18 50 0 100 150 50 0 50 100 150 BANDWIDTH OF Fo TEMPERATURE C TEMPERATURE C DS008670 9 DS008670 10 DS008670 11 Applications Information refer to Block 1 Diagram F W Hz gram INPUT 2 8 Rict GENERAL This equation is accurate at low frequencies however The LMC567 low power tone decoder can be operated at supply voltages of 2V to 9V and at input frequencies ranging from 1 Hz up to 500 kHz The LMC567 can be directly substituted in most LM567 ap plications with the following provisions 1 Oscillator timing capacitor Ct must be halved to double the oscillator frequency relative to the input frequency See OSCILLATOR TIMING COMPONENTS 2 Filter capacitors C1 and C2 must be reduced by a factor of 8 to maintain the same filter time constants 3 The output current demanded of pin 8 must be limited to the specified capability of the LMC567 OSCILLATOR TIMING COMPONENTS The voltage controlled oscillator VCO on the LMC567 must be set up to run at twice the frequency of the input signal tone to be decoded The center frequency of the VCO is set by timing resistor Rt and timing capacitor Ct connected to pins 5 and 6 of the IC The center frequency as a function of Rt and Ct is given by 1 F Hz OSC 1 4 Rtct Since this will cause an input tone of half Foso to b
5. 0 0 LMCS567 00 LMC567 Low Power Tone Decoder General Description The LMC567 is a low power general purpose LMCMOS tone decoder which is functionally similar to the industry standard LM567 It consists of a twice frequency voltage controlled oscillator VCO and quadrature dividers which establish the reference signals for phase and ampli tude detectors The phase detector and VCO form a phase locked loop PLL which locks to an input signal fre quency which is within the control range of the VCO When the PLL is locked and the input signal amplitude exceeds an internally pre set threshold a switch to ground is activated on the output pin External components set up the oscillator to run at twice the input frequency and determine the phase and amplitude filter time constants National Semiconductor June 1999 Features Functionally similar to LM567 2V to 9V supply voltage range Low supply current drain No increase in current with output activated Operates to 500 kHz input frequency High oscillator stability Ground referenced input Hysteresis added to amplitude comparator Out of band signals and noise rejected 20 mA output current capability Block Diag ram with External Components OUTPUT FILTER LOOP FILTER INPUT Vs LMCMOS is a trademark of National Semiconductor Corp Order Number LMC567CM or LMC567CN See NS Package Number M08A or NO8E OUTPUT GROUND TIMING ACITOR
6. e decoded above 50 kHz F 100 kHz internal delays cause the actual frequency to be lower than predicted The choice of Rt and Ct will be a tradeoff between supply current and practical capacitor values An additional supply current component is introduced due to Rt being switched to Vs every half cycle to charge Ct I due to Rt V 4Rt Thus the supply current can be minimized by keeping Rt as large as possible see supply current vs operating fre quency curves However the desired frequency will dictate an RtCt product such that increasing Rt will require a smaller Ct Below Ct 100 pF circuit board stray capacitances be gin to play a role in determining the oscillation frequency which ultimately limits the minimum Ct To allow for I C and component value tolerances the oscil lator timing components will require a trim This is generally accomplished by using a variable resistor as part of Rt al though Ct could also be padded The amount of initial fre quency variation due to the LMC567 itself is given in the electrical specifications the total trim range must also ac commodate the tolerances of Rt and Ct www national com Applications Information refer to Block Diagram Continued SUPPLY DECOUPLING The decoupling of supply pin 4 becomes more critical at high supply voltages with high operating frequencies requiring C4 to be placed as close as possible to pin 4 INPUT PIN The input pin 3 is
7. e reasonably expected to result in a significant injury to the user National Semiconductor National Semiconductor Corporation Europe Americas Fax 49 0 1 80 530 85 86 Tel 1 800 272 9959 Email europe support nsc com Fax 1 800 737 7018 Deutsch Tel 49 0 1 80 530 85 85 Email support nsc com English Tel 49 0 1 80 532 78 32 Frangais Tel 49 0 1 80 532 93 58 www national com Italiano Tel 49 0 1 80 534 16 80 support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system or to affect its safety or effectiveness National Semiconductor National Semiconductor Asia Pacific Customer Japan Ltd Response Group Tel 81 3 5639 7560 Tel 65 2544466 Fax 81 3 5639 7507 Fax 65 2504466 Email sea support nsc com National does not assume any responsibility for use of any circuitry described no circuit patent licenses are implied and National reserves the right at any time without notice to change said circuitry and specifications 19pP099 QUO 19M0d MOT ZOSOINT
8. internally ground referenced with a nomi nal 40 kQ resistor Signals which are already centered on OV may be directly coupled to pin 3 however any d c potential must be isolated via a coupling capacitor Inputs of multiple LMC567 devices can be paralleled without individual d c isolation LOOP FILTER Pin 2 is the combined output of the phase detector and con trol input of the VCO for the phase locked loop PLL Ca pacitor C2 in conjunction with the nominal 80 kQ pin 2 inter nal resistance forms the loop filter For small values of C2 the PLL will have a fast acquisition time and the pull in range will be set by the built in VCO fre quency stops which also determine the largest detection bandwidth LDBW Increasing C2 results in improved noise immunity at the expense of acquisition time and the pull in range will begin to become narrower than the LDBW see Bandwidth as a Function of C2 curve However the maxi mum hold in range will always equal the LDBW OUTPUT FILTER Pin 1 is the output of a negative going amplitude detector which has a nominal 0 signal output of 7 9 V When the PLL is locked to the input an increase in signal level causes the detector output to move negative When pin 1 reaches 2 3 V the output is activated see OUTPUT PIN Capacitor C1 in conjunction with the nominal 40 kQ pin 1 in ternal resistance forms the output filter The size of C1 is a tradeoff between slew rate and carrier ripple at the o
9. s are not guaranteed for parameters where no limit is given however the typical value is a good indication of device performance www national com Test Circuit LMC567 0 1 uF T MEASURE F Osc WITH lt 10 pF PROBE DS008670 2 Rict Rt Ct 1 100k 300 pF 2 10k 300 pF 3 5 1k 62 pF 3 www national com Typical Performance Characteristics Supply Current vs Operating Frequency Ty 25 C Vs SV IS mA Rt 100 kO 1k 10k 100k 1M INPUT FREQUENCY Hz DS008670 3 Bandwidth as a Function of C2 Bandwidth vs Input Signal Level 300 T T T T T TEST CIRCUIT Vs 5V 250 FRtCt 2 200 150 INPUT VOLTAGE mms INPUT THRESHOLD 0 2 4 6 8 10 12 14 16 18 BANDWIDTH OF Fo DS008670 7 Frequency Drift with Temperature Largest Detection Bandwidth vs Temp T T T T T T T TEST CIRCUIT Vg 5V RtCt 2 14 gt BANDWIDTH OF Fo 50 0 50 100 150 TEMPERATURE C DS008670 8 Frequency Drift with Temperature 108 TT TT TI tirrr 3 0 hi T T T T T Ta 25 C Vs 5V TEST CIRCUIT RtCt 1 TEST CIRCUIT RtCt 2 10 1 0 2
10. utput comparator Low values of C1 produce the least delay be tween the input and output for tone burst applications while larger values of C1 improve noise immunity Pin 1 also provides a means for shifting the input threshold higher or lower by connecting an external resistor to supply or ground However reducing the threshold using this tech nique increases sensitivity to pin 1 carrier ripple and also re sults in more part to part threshold variation OUTPUT PIN The output at pin 8 is an N channel FET switch to ground which is activated when the PLL is locked and the input tone is of sufficient amplitude to cause pin 1 to fall below 2 3 V Apart from the obvious current component due to the exter nal pin 8 load resistor no additional supply current is re quired to activate the switch The on resistance of the switch is inversely proportional to supply thus the sat voltage for a given output current will increase at lower supplies www national com Physical Dimensions inches millimeters unless otherwise noted 0 150 0 157 3 810 3 988 0 010 0 020 y 45 0 254 0 508 B 7 oo f 10 102 008 0010 att LEAD TIPS 0 203 0 254 TYP ALL LEADS 0 280 7 112 MN 0 300 0 320 7 628 128 95 5 0 009 0 015 0 229 0 381 0 189 0 197 4 800 5 004 0 228 0 244 6 791 6 198 0 010 max 0 254 ueapno i7 1 2 3 4 A IDENT 30 0 053 0 069 TE 1 346
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National Semiconductor LMC567 Low Power Tone Decoder handbook