National Semiconductor LMH6502 Wideband Low Power Linear-in-dB Variable Gain Amplifier handbook
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1. HU 100 1k 10k 100k 1M 10M 200M FREQUENCY Hz 20067721 Gain Flatness Frequency vs Gain Note 14 GAIN FLATNESS RELATIVE TO MAX GAIN Hz GAIN dB Factor vs Re 4 WA Ye K V V 20067739 Gain Flatness and Linear Phase Deviation vs Ve GAIN dB GROUP DELAY ns GAIN dB 2 4 Qe P LINEAR PHASE DEVIATION 0 6 12 18M 24M 30M FREQUENCY Hz 20067709 Group Delay vs Frequency 0 5M 10M 15M 20M 25M 30M 35M 40M FREQUENCY Hz 20067712 Gain vs Vg Including Limits 30 20 MAX VALUE mE ZA LLILI LLLZASCLLLL MIN VALUE 0 02040608 1 12 1 4 1 6 1 8 2 Vg V 20067705 www national com c0S9HIN I LMH6502 Typical Performance Characteristics Unless otherwise specified Vs 5V 25 C Va Vema Vom OV Re 1kQ Re 174Q both inputs terminated in 50Q 100Q Typical values results referred to device output Continued Gain vs Vg 5V d 1000 IAN 100 _ F S R 470 HL NNMIMIL M gt G NN gt gt HA TON co LUN 9 IN_DIFF 0 1 1 100 0 02040608 1 1214 16 18 2 Ve V 20067740 20067706 Gain vs 2 5V Output Offset Voltage vs Vo Typical Unit 1 E ie e V 20067713 20067753 Output Offset Voltage vs Va Typical Unit 2 Output Offset Voltage vs V2. maximum permissible voltage on Vg is re duced This is due to limitations within the device arising from transistor headroom Beyond this limit device per formance will be affected non destructive This could reveal itself as premature high frequency response roll off With 2 5V supplies Va is below 1 1V whereas 5 1 5V is needed to get maximum gain This means that operating under these conditions has reduced the maximum permissible voltage on Vg to a level below what is needed to get Max gain If supply voltages are asymmetrical with V being lower further pinching of Va range could result for example with V 2V and V 3V Va uit 0 40V which results in maximum gain being 2 5dB less than what would be expected when Vs is higher c Max gain reduces There is an intrinsic reduction in max gain when the total supply voltage is reduced see Typical Performance Characteristics plots for Gain vs V Vs 2 5V In addition there is the more drastic mechanism described in b above Beyond Va iiw high frequency response is also effected Application Circuits AGC LOOP Figure 6 shows a typical AGC circuit The LMH6502 is followed up with a LMH6714 for higher overall gain The output of the LMH6714 is rectified and fed to an inverting integrator using a LMH6657 wideband voltage feedback op amp When the output voltage is too large the inte grator output voltage ramps down reducing the net gai
3. Impedance Power Supply Rejection Ratio Note 10 Power Supply Rejection Ratio Note 10 Common Mode Rejection Ratio Note 9 Supply Current Input Referred 1V change 5 2 2V Input Referred 1V change Va 2 20 Input Referred Va 2V 1 8V lt Voy lt 1 8V Vs 2 5V RH Open 1000 3 00 3 20 2 95 80 300 47 58 41 27 38 4 9 3 16 s www national com c0S9HIN I LMH6502 Electrical CharacteristiCS Note 2 Continued Note 1 Absolute Maximum Ratings indicate limits beyond which damage to the device may occur Operating Ratings indicate conditions for which the device is intended to be functional but specific performance is not guaranteed For guaranteed specifications see the Electrical Characteristics tables Note 2 Electrical Table values apply only for factory testing conditions at the temperature indicated Factory testing conditions result in very limited self heating of the device such that Ty Ta No guarantee of parametric performance is indicated in the electrical tables under conditions of internal self heating where Tj gt T4 Note 3 The maximum output current lour is determined by device power dissipation limitations or value specified whichever is lower Note 4 Human body model 1 5 in series with 100pF Machine model OQ in series with 200pF Note 5 Slew Rate is the average of the rising and falling rates Note 6 Typical values repre
4. Theoretical gain is given by Re A VN x Re 4 Where 1 72 nominal amp Vc 90mV room tempera ture For a Vg range the value specified in the tables represents the worst case accuracy over the entire range The Typical value would be the worst case difference between the Typi cal Gain and the Theoretical gain The Max value would be the worst case difference between the max min gain limit and the Theoretical gain GAIN MATCHING Defined as the limit on gain variation at a certain Va ex pressed in dB Specified as only no Typical For a range the value specified represents the worst case matching over the entire range The Max value would be the worst case difference between the max min gain limit and the typical gain 15 NOISE Figure 3 describes the LMH6502 s output referred spot noise density as a function of frequency with Ayvmax 10V V The plot includes all the noise contributing terms However with both inputs terminated in 500 the input noise contribu tion is minimal At Ayvmax 10V V the LMH6502 has a typical input referred spot noise density ein of 7 7nV KHz flat band For applications extending well into the flat band re gion the input RMS voltage noise can be determined from the following single pole model 1 57 3dB BANDWIDTH 5 10000 1000 eno nV 4 Hz EH NUI ioi us 10
5. t 10ns DIV GAIN V V 20067764 c0S9HIN I www national com LMH6502 Typical Performance Characteristics Unless otherwise specified 45V 25C Varies OV Re 1kQ Re 174Q both inputs terminated in 50Q 100Q Typical values results referred to device output Continued Feedthrough from Vg Aymax 10 1000 Ve Stepped From 0 6V 0 5V DIV 50mV DIV t 10ns DIV Application Information THEORY OF OPERATION A simplified schematic is shown in Figure 1 and Vin are buffered with closed loop voltage followers inducing a signal current in Rg proportional to 4 Vi Vin the dif ferential input voltage This current controls a current source which supplies two well matched transistor Q1 and Q2 The current flowing through Q2 is converted to the final output voltage using Re and the output amplifier U1 By changing the fraction of the signal current I which flows through Q2 the gain is changed This is done by changing the voltage applied differentially to the bases of Q1 and Q2 For example with Vg OV Q1 conducts heavily and Q2 is off With none of I flowing through Re the LMH6502 s input to output gain is strongly attenuated With Va 2V Q1 is off and the entire signal current flows through Q2 to Re produc ing maximum gain With Va set to 1V the bases of Q1 and Q2 are set to approximately the same voltage Q1 and Q2 have the
6. 0 010 0 102 0 254 ALL LEADS js SEATING TT IT LT Ba PLANE A 0 008 0 010 j 004 0 050 0 014 0 020 0 356 y h 2227 TYP 0 203 0 254 0 076 0 050 0 356 2j gt 0 356 0 508 TYP ALL LEADS 0 004 0 406 1 270 TYP 0 008 0 102 TYP ALL LEADS 0 203 TYP ALL LEAD TIPS M744 REV Hj 14 Pin SOIC NS Package Number M14A S YMM S YMM 5 94 b cse SS 14X M 0 25 12X 0 65 4 Amn ALL LEAD TIPS RECOMMENDED LAND PATTERN NV 0 6 0 1 SEATING PLANE DETAIL A 0 9 SEE DETAIL A TYPICAL 1 1 MAX N d D 0 20 d d UM Tm 1 P4 J 0 10 05 14X 0 19 0 30 ALL LEAD TIPS o 13 A 8 Y la bO OO DIMENSIONS ARE IN MILLIMETERS DIMENSIONS IN FOR REFERENCE ONLY MTC14 Rev D 14 Pin TSSOP NS Package Number MTC14 www national com 18 Notes I M07 ZOSSHINT Ul Je9U LIFE SUPPORT POLICY NATIONAL S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT ues sjqeiue gp DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT AND GENERAL COUNSEL OF NATIONAL SEMICONDUCTOR CORPORATION As used herein 1 Life suppor
7. 2004 National Semiconductor Corporation O O LMH e504 I L National Semiconductor LMH6502 June 2004 Wideband Low Power Linear in dB Variable Gain Amplifier General Description The LMH 6502 is a wideband DC coupled differential input voltage controlled gain stage followed by a high speed cur rent feedback Op Amp which can directly drive a low imped ance load Gain adjustment range is more than 70dB for up to 10MHz Maximum gain is set by external components and the gain can be reduced all the way to cut off Power consumption is 300mW with a speed of 130MHz Output referred DC offset voltage is less than 350mV over the entire gain control voltage range Device to device Gain matching is within 0 6dB at maximum gain Furthermore gain at any Vg is tested and the tolerance is guaranteed The output current feedback Op Amp allows high frequency large signals Slew Rate 1800V us and can also drive heavy load current 75mA Differential inputs allow common mode rejection in low level amplification or in applications where signals are carried over relatively long wires For single ended opera tion the unused input can easily be tied to ground or a virtual half supply in single supply application Inverting or non inverting gains could be obtained by choosing one input polarity or the other To provide ease of use when working with a single supply Vg range is set to be from OV to 2V relative to pin 11 potent
8. com c0S9HIN 1 LMH6502 Typical Performance Characteristics Unless otherwise specified Vs 5V 25 C Va Vama Vom OV Re 1kQ Re 174Q both inputs terminated in 50Q 100Q Typical values results referred to device output Continued 1dB Compression Output Voltage vs Output Current IN_DIFF 0 5V SOURCE 1dB COMPRESSION dBm Vour FROM SUPPLY V 0 20 40 60 80 100 120 140 160 0 20 40 60 80 100 FREQUENCY MHz lour mA 20067722 20067726 HD2 amp vs THD vs Pout HD dBc THD dBc 20067733 20067718 HD3 HD3 025 LA DES T 8 ai e ea E O CN O I HD2 1Vpp INN 20067719 20067728 www national com 12 Typical Performance Characteristics Unless otherwise specified Vs 5V 25 C Va Vema Vom OV Re 1kQ Re 174Q both inputs terminated in 500 100Q Typical values results referred to device output Continued THD dBc luc uA THD vs 0 60 0 80 1 00 1 20 1 40 1 60 1 80 2 00 Vs V 20067720 Vg Bias Current vs Va 20067727 2 9Vpp LARGE SIGNAL 4 ns DIV 20067735 THD dBc THD vs 0 60 0 80 1 00 1 20 1 40 1 60 1 80 2 00 Vg V 20067715 Step Response Plot 0 5Vpp SMALL SIGNAL H AACA sse O U AA D y 4 ns DIV 20067734 Gain vs Vo Step LM
9. same collector currents equal to one half of the signal current I thus the gain is approximately one half the maximum gain 20067741 FIGURE 1 LMH6502 Block Diagram www national com 20067765 CHOOSING amp Rg Maximum input amplitude and maximum gain are the two key specifications that determine component values in a LMH6502 application The output stage op amp is a current feedback type amplifier optimized for Re 1kQ Re can then be computed as R x 1 72 R Avmax WITH 1KQ 1 To determine whether the maximum input amplitude will overdrive the LMH6502 compute the maximum differential input voltage for linear operation If the maximum input amplitude exceeds the above VpyAx limit then LMH6502 should either be moved to a location in the signal chain where input amplitudes are reduced or the LMH6502 gain Avmax should be reduced or the values for Hg should be increased The overall system perfor mance impact is different based on the choice made If the input amplitude is reduced re compute the impact on signal to noise ratio If Ayvmax is reduced post LMH6502 amplifier gain should be increased or another gain stage added to make up for reduced system gain To increase Re and Hy compute the lowest acceptable value for Re Re gt 590 X Vomax 3Q 3 Operating with Re larger than this value insures linear op eration of the input buffers Re may be comp
10. 0 1k 10k 100k 1M FREQUENCY Hz 20067710 FIGURE 3 Output Referred Voltage Noise vs Frequency CIRCUIT LAYOUT CONSIDERATIONS amp EVALUATION BOARD A good high frequency PCB layout including ground plane construction and power supply bypassing close to the pack age are critical to achieving full performance The amplifier is sensitive to stray capacitance to ground at the input pin 12 keep node trace area small Shunt capacitance across the feedback resistor should not be used to compensate for this effect For best performance at low maximum gains Avmax lt 10 Re and Re connections should be treated in a similar fashion Capacitance to ground should be mini mized by removing the ground plane from under the body of Re Parasitic or load capacitance directly on the output pin 10 degrades phase margin leading to frequency response peaking The LMH6502 is fully stable when driving a 1000 load With reduced load e g 1kQ there is a possibility of instability at very high frequencies beyond 400MHz especially with a capacitive load When the LMH6502 is connected to a light load as such it is recommended to add a snubber network to the output e g 1000 and 39pF in series tied between the LMH6502 output and ground C can also be isolated from the output by placing a small resistor in series with the output pin 10 Component parasitics also influence high frequency results Therefore it is recommended to use metal film re
11. 5 MHz DIV 20067723 www national com c0S9HIN 1 LMH6502 Typical Performance Characteristics Unless otherwise specified Vs 5V 25 C Va Vama Vom OV Re 1kQ Re 174Q both inputs terminated in 50Q 100Q Typical values results referred to device output Continued Frequency Response for Various Ve Aymax 100 Large Signal Frequency Response for Various Aymax Small Signal 3 1 2 1 0 1 1 2 S 2 3 A z lt 5 4 6 7 5 5 6 6 7 8 7 9 8 20067724 20067729 Frequency Response for Various Ve Avmax 100 Large Signal ls VS Vs Low S mie wx 27 p _ D a z 2 0 zZ lt S e i 25 3 3 5 4 45 5 55 6 20067730 SUPPLY VOLTAGE V 20067750 Input Bias Current vs Vs lt lt E r 2 25 3 35 4 45 5 55 6 25 3 35 4 45 5 55 6 SUPPLY VOLTAGE V SUPPLY VOLTAGES V 20067751 20067752 www national com 6 Typical Performance Characteristics Unless otherwise specified Vs 5V 25 C Va Vema Vom OV Re 1kQ Re 174Q both inputs terminated in 500 100Q Typical values results referred to device output Continued Aymax V V PSRR dB CMRR dB Avmax VS Vom 1 0 8 0 6 0 4 0 2 O 02040608 1 Vow VY 20067767 5V EO LA Wail AWN 10k 100k 1M 10M 100M FREQUENCY Hz 20067703 CMRR 5V 0 LA ii ail i BA
12. Adjustment Range f lt 10MHz 72 Time Domain Response i Rise and Fall Time 0 5V Step 22 TL m Rate Gain Change Rate Vin 0 3V 10 90 of Final 4 8 dB ns Output Distortion amp Noise Performance i 24 w _ DG Differential Gain f 4 43MHz 1500 0 34 Differential Phase f 4 48MHz 1500 0 10 deg www national com 2 Electrical CharacteristiCS note 2 Continued Unless otherwise specified all limits guaranteed for T 25 C Vs 5V Ayuaxy 10 Vom OV Re 1kQ Re 1740 DIFF Symbol Min Typ Max Parameter Conditions Note 6 Note 6 Note 6 DC amp Miscellaneous Performance GACCU G Match K Vem RG max Re Current Pins 4 amp 5 1 70 2 22 1 56 Pins 3 amp 6 Note 7 Vs 2 5V TC Bias Current Drift Pin 3 amp 6 Note 8 Islas Gain Accuracy See Application Note Gain Matching See Application Note 0 1V 1000 Va 2V Boldface limits apply at the temperature extremes Units Va 20V o 1V lt Vg lt 2V 406 03 43 1 3 6 Vac 20V o See Application Notes 1 58 1 91 2 0 Se 0 12 Input Voltage Range Bias Current Pin 3 amp 6 Common Mode ICMRRI gt 55dB Note 9 1 nA C m 6 TC lore Rin Vo OFFSET PSRR PSRR CMRR ls nA C Vg Bias Current Pin 2 Vg OV Note 7 nA C Output Voltage Range Output Impedance
13. I 120 1k 10k 100k 1M 10M 100M FREQUENCY Hz 20067701 AvMAx V V PSRR dB CMRR dB Avmax VS Vem Sy 20067766 10k 100k 1M 100M FREQUENCY Hz 20067704 CMRR zx2 5V I i TN I eE 1k 10 100k 10M 100M FREQUENCY Hz 20067702 www national com c0S9HIN I Typical Performance Characteristics Unless otherwise specified Vs 5V 25 C Va Vema Vom OV Re 1kQ Re 174Q both inputs terminated in 50Q 100Q Typical values results referred to device output Continued LMH6502 Avmax VS Supply Voltage Supply Current vs Ven AvMAx V V SUPPLY VOLTAGE V 20067768 20067756 Supply Current vs Ven Output Offset Voltage vs Vcom Typical Unit 1 Vo orrser MV VCM V 20067757 20067758 Output Offset Voltage vs Vey Typical Unit 2 Output Offset Voltage vs Vcom Typical Unit 3 170 160 150 140 130 Vo offset MV Vo orrser MV 120 110 y n i 100 3 2 1 0 1 2 3 20067759 20067760 www national com 8 Typical Performance Characteristics Unless otherwise specified Vs 5V 25 C Va Vema Vom OV Re 1kQ Re 174Q both inputs terminated in 500 100Q Typical values results referred to device output Continued Feed through Isolation 60 a I 40 o LUU U L LUI EN 0 _ 8 2 LUE N Ee o LM ON tu unl 80
14. a Typical Unit 3 A fj S Am Dus S Nl 5 Nac a a 5 p _ 5 _ _ 20067754 20067755 www national com 10 Performance Characteristics unless otherwise specified 25V 25C Va Vou OV Re 1kQ Re 174Q both inputs terminated in 500 100Q Typical values results referred to device output Continued Output Offset Voltage vs V for various Vg Output Offset Voltage vs V for various Vg Typical Unit 1 Typical Unit 2 Vo orrseT mV Vo orrset V 20067761 20067762 Output Offset Voltage vs V for various Vg Typical Unit 3 Noise vs Frequency Aymax 2 250 100000 FR HH E VMAX 200 10000 HH E 150 0 gt 1000 EM 100 g MU 100 50 0 N 25 3 35 4 45 5 55 6 65 10 100 1k 10k 100k 1M 10M avg QV FREQUENCY Hz 20067763 20067725 Noise vs Frequency Avymax 10 Noise vs Frequency Aymax 100 10000 q ms 1000 KES EE aE T SHE TII TN SEN NULL HEEL i gt E NC til LTT Bet SD 2 C s NT D CT 7 ges LPS TID Er ao xo enw ius Stil UU iit e Tm o il EHE TRE T 100 1 10 100k 4M 10 100 1k 10k 100k 1M FREQUENCY Hz FREQUENCY Hz 20067710 20067717 11 www national
15. d devices are required Soldering Information please contact the National Semiconductor Sales Office Infrared or Convection 20 sec 235 C Distributors for availability and specifications Wave Soldering 10 sec 260 C ESD Tolerance Note 4 eee eu Operating Ratings Note 1 Machine Model 200V Input Current 10mA Supply Voltages V 5V to 12V V xy Differential V V Temperature Range 40 C to 85 C Output Current 120mA Note 3 Thermal Resistance 6c 6 4 Supply Voltages V V 12 6V 14 Pin SOIC 45 C W 138 C W Voltage at Input Output pins V 0 8V V 0 8V 14 Pin TSSOP 51 OW 160 C W Storage Temperature Range 65 C to 150 C Electrical Characteristics Noe 2 Unless otherwise specified all limits guaranteed for T 25 C Vs 5V Ayma 10 Vom OV Re 1kQ Re 1740 Vin pirr 0 1V 1000 Vg 2V Boldface limits apply at the temperature extremes Min Typ Max Symbol Parameter Conditions Note 6 Note 6 Note 6 Units Frequency Domain Response GF Gain Flatness Vout lt 0 5Vpp 30 MHz Att Range Flat Band Relative to Max Gain 0 2dB f lt 30MHz 16 dB Attenuation Range Note 14 so idB f 30MHz 75 BW Gain control Bandwidth Ve 1V Note 13 100 MHz Control Linear Phase Deviation DC to 60MHz 3435 deg G Delay Group Delay DC to 130MHz 2 5 CT dB Feed through Ve OV 30MHz Output 47 dB Referred GR Gain
16. ency for Various Vg 1 pii 1 pease MIT MS 2 D LU z 3 0 lt I A 100 1k 10k 100k 1M 10M 100M 1G FREQUENCY Hz 20067731 Frequency Response Over Temperature A 10 TAN AERE TTE TES T 50 2 455 0 m 3 50 amp LU gt 4 100 5 5 150 6 E d 200 MN HIE pi Pe on 9 350 1k 10k 100k 1M 10M 100M 1G FREQUENCY Hz 20067707 Frequency Response for Various Ve Aymax 10 2 5V a GAIN dB AVMAX 7 225 vl 1k 10k 100k 1M 10M 100M 1G FREQUENCY Hz 20067714 Typical Performance Characteristics uniess otherwise specified Vs 5V 25 C Vamax Vom OV Re 1kQ Re 174Q both inputs terminated in 500 1000 Typical values results referred to device output Large Signal Frequency for Various Vg 2 e QU 2 Lu 2 3 9 lt T O A ala se MN WM LU zovi sanoe OV TI 100 4k 10k 100k 1M 10M 100M 1G FREQUENCY Hz 20067732 Frequency Response for Various Ve Aymax 10 2 Ese TETTE S Mi i EET dE S CECI S 1k 10k 100k 1M 10M 100M 1G FREQUENCY Hz GAIN dB PHASE 20067708 Small Signal Frequency Response for Various Aya 3 2 1 0 1 t 2 D LLI gt 2 5 5 6 8 9 f 2
17. ial ground pin In single supply operation this ground pin is tied to a virtual half supply LMH6502 gain control is linear in dB for a large portion of the total gain control range This makes the device suitable for AGC circuits among other applications For linear gain con trol applications see the LMH6503 datasheet The LMH6502 is available in the SOIC 14 and TSSOP 14 pack age Gain vs Vg for Various Temperature GAIN dB GAIN V V 0 0 2 0 4 0 6 0 8 1 1214 16 18 2 Vg V 20067706 LMH is a trademark of National Semiconductor Corporation DS200677 Features Vs 5V TA 25 C Re 1kQ Re 174Q RL 1009 Ay 10 Typical values unless specified 3dB BW 130MHz Gain control BW 100MHz Adjustment range typical over temp 70dB Gain matching limit 0 6dB Slew rate 1800V us m Supply current no load 27mA Linear output current 75mA Output voltage 10090 3 2V voltage noise 7 7nV JHz Input current noise 2 4pA JHz m THD 20MHz RH 1000 Vo 2Vpp 53dBc Replacement for CLC520 Applications Variable attenuator AGC Voltage controller filter m Video imaging processing Typical Application 20067737 www national com I pueqapiM ZOS9HINT UI J290U sjqeiue gp LMH6502 Absolute Maximum Ratings Note 1 Junction Temperature 150 C If Military Aerospace specifie
18. ibility for use of any circuitry described no circuit patent licenses are implied and National reserves the right at any time without notice to change said circuitry and specifications
19. n of the LMH6502 and If the output voltage is too small the integrator ramps up increasing the net gain and the output voltage Actual output level is set with R To prevent shifts in DC output voltage with DC changes in input signal level trim pot is provided AGC circuits are always limited in the range of input signals over which constant output level can be maintained In this circuit we would expect that reasonable AGC action could be maintained for at least 40dB In practice rectifier dynamic range limits reduce this slightly Application Circuits Continued 1N4150 5V offset adjust FIGURE 6 Automatic Gain Control AGC Loop FREQUENCY SHAPING 500 VOUT 5V output level p 1 kQ pot 5V 20067748 Frequency Shaping Frequency shaping and bandwidth extension of the LMH6502 can be accomplished using parallel networks connected across the Re ports The network shown in the Figure 7 schematic will effectively extend the LMH6502 s bandwidth 12 LMH6502 10 20067749 FIGURE 7 Frequency Shaping 17 www national com c0S9HIN I LMH6502 Physical Dimensions inches millimeters unless otherwise noted 0 335 0 344 8 509 8 738 0 228 0 244 5 791 6 198 LEAD NO 1 A IDENT ae i Y 1 2 3 4 5 6 7 A 0 010 wax 0 254 0 150 0 157 3 810 3 988 0 010 0 020 0 053 0 069 0 254 0 508 5 1 346 1 753 8 MAX TYP Y 0 004
20. sent the most likely parametric norm Bold numbers refer to over temperature limits Note 7 Positive current corresponds to current flowing in the device Note 8 Drift determined by dividing the change in parameter distribution average at temperature extremes by the total temperature change Note 9 CMRR definition AVour AVcMI Ay with 0 1V differential input voltage Note 10 PSRR definition AVoUT AV l Ay PSRR definition AVour AV 1 Ay with 0 1V differential input voltage Note 11 Gain Phase normalized to low frequency value at 25 C Note 12 Gain Phase normalized to low frequency value at each Ay Note 13 Gain Control Frequency Response Schematic Vin PORT 2 R V L IN 500 R PORT 1 20067738 Note 14 Flat Band Attenuation Relative to Max Gain Range Definition Specified as the attenuation range from maximum which allows gain flatness specified either x0 2dB or 0 1dB relative to AyyAx gain For example for f lt 30MHz here are the Flat Band Attenuation ranges 0 2dB 20dB down to 4dB 16dB range 0 1dB 20dB down to 12 5 dB 7 5dB range Connection Diagram 14 Pin SOIC TSSOP 20067736 Top View Ordering Information Package Package Marking Transport Media NSC Drawing 14 pin SOIC LMH6502MA LMH6502MA 55 Units Rail M14A LMH6502MAX 2 5k Units Tape and Reel LMH6502MT 94 Units Rail 14 Pin TSSOP LMH6502MT MTC14 LMH6502MTX 2 5k Units Tape and Reel www national com 4 Small Signal Frequ
21. sistors such as RN55D or leadless components such as surface mount devices High profile sockets are not recommended www national com c0S9HIN 1 LMH6502 Application Information Continued National Semiconductor suggests the following evaluation boards as a guide for high frequency layout and as an aid in device testing and characterization Device Package Evaluation Board Part Number LMH6502MA SOIC 14 CLC730033 LMH6502MT TSSOP 14 CLC730146 The evaluation board is shipped when a device sample request is placed with National Semiconductor SINGLE SUPPLY OPERATION It is possible to operate the LMH6502 with a single supply To do so tie pin 11 GND to a potential about mid point between V and V Two examples are shown in Figure 4 amp Figure 5 IN Cour 0 1pF VIN OUT 20067746 FIGURE 4 AC Coupled Single Supply VGA 20067747 FIGURE 5 Transformer Coupled Single Supply VGA www national com OPERATING AT LOWER SUPPLY VOLTAGES The LMH6502 is rated for operation down to 5V supplies V V There are some specifications shown for operation at 2 5V within the data sheet i e Frequency Response CMRR PSRR Gain vs Vg etc Compared to 5V opera tion at lower supplies a Vg range shifts lower Here are the approximate expressions for various Vg voltages as a function of V TABLE 1 Vg Definition Based on V Expression V Gain Cut off 02 x V 1 0 2 x V b Va
22. t devices or systems devices or 2 A critical component is any component of a life systems which a are intended for surgical implant Support device or system whose failure to perform into the body or b support or sustain life and can be reasonably expected to cause the failure of whose failure to perform when properly used in the life support device or system or to affect its accordance with instructions for use provided in the safety or effectiveness labeling can be reasonably expected to result in a significant injury to the user BANNED SUBSTANCE COMPLIANCE National Semiconductor certifies that the products and packing materials meet the provisions of the Customer Products Stewardship Specification CSP 9 111C2 and the Banned Substances and Materials of Interest Specification 5 9 11152 and contain no Banned Substances as defined in CSP 9 111S2 National Semiconductor National Semiconductor National Semiconductor National Semiconductor Americas Customer Europe Customer Support Center Asia Pacific Customer Japan Customer Support Center Support Center Fax 49 0 180 530 85 86 Support Center Fax 81 3 5639 7507 Email new feedback nsc com Email europe support 9 nsc com Email ap support 9 nsc com Email jpn feedback 9 nsc com Tel 1 800 272 9959 Deutsch Tel 49 0 69 9508 6208 Tel 81 3 5639 7560 English Tel 44 0 870 24 0 2171 www national com Frangais Tel 33 0 1 41 91 8790 National does not assume any respons
23. uted from selected Re Avmax Re should be gt 1kQ for overall best performance however R lt 1kQ can be implemented if necessary using a loop gain reducing resistor to ground on the inverting summing node of the output amplifier see application note QA 13 for details ADJUSTING OFFSET Offset can be broken into two parts an input referred term and an output referred term The input referred offset shows up as a variation in output voltage as Va is changed This can be trimmed using the circuit in Figure 2 by placing a low frequency square wave V ow OV Viigo 2V into Va with Application Information Continued Vin OV the input referred Vos term shows up as a small square wave riding a DC value Adjust Rj to null the Vos square wave term to zero After adjusting the input referred offset adjust R44 with Vin 0 0 until is zero Finally for inverting applications Vi may be applied to pin 6 and the offset adjustment to pin 3 These steps will minimize the output offset voltage However since the offset term itself varies with the gain setting the correction is not perfect and some residual output offset will remain at in between Also this offset trim does not improve output offset tempera ture coefficient 5V 20067743 FIGURE 2 Nulling the output offset voltage GAIN ACCURACY Defined as the actual gain compared against the theoretical gain at a certain Va results expressed in dB
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National Semiconductor LMH6502 Wideband Low Power Linear in dB Variable Gain Amplifier handbook