PHILIPS 80C562/83C562 Single-chip 8-bit microcontroller handbook
Contents
1. Product specification 80C562 83C562 8 BIT INTERNAL BUS PARALLEL 1 O PORTS AND EXTERNAL BUS SERIAL UART PORT FOUR 16 BIT CAPTURE LATCHES T2 16 BIT TIMER EVENT COUNTERS ALTERNATE FUNCTION OF PORT 0 ALTERNATE FUNCTION OF PORT 1 ALTERNATE FUNCTION OF PORT 2 1992 Jan 08 CTOI CTSI ALTERNATE FUNCTION OF PORT 3 ALTERNATE FUNCTION OF PORT 4 ALTERNATE FUNCTION OF PORT 5 REGISTERS PARATOR T3 WATCHDOG TIMER SELECTION CMSR0 CMSR5 CMTO CMT1 RST EW SU00226 Philips Semiconductors Product specification Single chip 8 bit microcontroller 80C562 83C562 PIN DESCRIPTION MNEMONIC INNO NAME FUNCTION Digital Power Supply 5V power supply pin during normal operation idle and power down mode Start ADC Operation Input starting analog to digital conversion ADC operation can also be started by software Pulse Width Modulation Output 0 Pulse Width Modulation Output 1 Enable Watchdog Timer Enable for T3 watchdog timer and disable power down mode P0 0 P0 7 Port 0 Port 0 is an 8 bit open drain bidirectional I O port Port 0 pins that have 1s written to them float and can be used as high impedance inputs Port 0 is als2. INTEGRATED CIRCUITS DATA SHEET 80C562 83C562 oingle chip 8 bit microcontroller Product specification 1992 Jan 08 IC20 Data Handbook Philips PHILIPS Semiconductors D Philips Semiconductors Product specification Single chip 8 bit microcontroller 80C562 83C562 Single chip 8 bit microcontroller with 8 bit A D capture compare timer high speed outputs PWM DESCRIPTION The 80C562 83C562 hereafter generically referred to as 8XC562 Single Chip 8 Bit Microcontroller is manufactured in an advanced CMOS process and is a derivative of the 80C51 microcontroller family The 83C562 83C562 has the same instruction set as the 80C51 The 8XC562 contains a non volatile 256 x 8 read only program memory a volatile 256 x 8 read write data memory 83C562 the 80C562 is ROMIess a volatile 256 x 8 read write data memory six 8 bit I O ports two 16 bit timer event counters identical to the timers of the 80C51 an additional 16 bit timer coupled to capture and compare latches a 15 source two priority level nested interrupt structure an 8 input ADC two pulse width modulated outputs standard 80C51 UART a watchdog timer and on chip oscillator and timing circuits For systems that require extra capability the 830562 can be expanded using standard TTL compatible memories and logic The device also functions as an arithmetic processor having facilities for both binary and BCD arithmetic plus bit handling capabilities
3. 0 042 0 598 9 007 0 004 1 Plastic metal protrusions of 0 01 inches maximum per side are not included OUTLINE VERSION IEC REFERENCES JEDEC EUROPEAN PROJECTION ISSUE DATE SOT188 3 112E10 MO 047AE Edge 95 02 25 1992 08 15 Product specification Philips Semiconductors 80C562 83C562 Single chip 8 bit microcontroller 68 PIN CERQUAD J BEND K PACKAGE 1473A 0 806 _ NIN 4 02070 8090 1v13a 9000 01070 820 NIIN 200 0 920 0 a 90070 SFO ne 4 01070 S2 0 10 SUO SUBWIP pue euondo s Jepjos ap syoeg Y Bunejd peaj pue 1esjjo peaj epnjoui seoueJejo pue uoisueuuip apis uoeoe uo S000 9q oi uoisnujoud 55215 uoisngjod sse 6 jou op suoisueuuiq si AN 86 L S Y LA ISNV 91 WJOJUOD pue SUOISUBLUIP y SALON 11V TIVLIG INVId ONILWAS 2000 6100 287 0 I ANV1d 3sva D C 9520 201 v 434 09070 29 AL SP L 0900 22 1 000 620 0 80 0 22 0 591
4. 2 NOTE 2 These values are valid only within the frequency 3 specifications of the device under test 4 Maximum operating mode Vp 6V Maximum operating mode Vp 4V Maximum idle mode Vp 6V Maximum idle mode Vpp 4V SU00229 Figure 8 Supply Current Ipp as a Function of Frequency at XTAL1 fosc CLOCK SIGNAL XTAL1 SU00230 Figure 9 Ipp Test Condition Active Mode All other pins are disconnected NC CLOCK SIGNAL SU00231 Figure 10 Ipp Test Condition Idle Mode All other pins are disconnected 1992 Jan 08 13 Philips Semiconductors Product specification Single chip 8 bit microcontroller 80C562 83C562 VDD 05 8000232 Figure 11 Clock Signal Waveform for Inp Tests in Active and Idle Modes tercH 10ns SU00233 Figure 12 Ipp Test Condition Power Down Mode All other pins are disconnected Vpp 2V to 5 5V 1992 Jan 08 14 Philips Semiconductors Single chip 8 bit microcontroller PLCC68 plastic leaded chip carrier 68 leads pedestal a QUU 80C562 83C562 Product specification SOT188 3 __ NL umm i FFF lt DIMENSIONS millimetre dimensions are derived from the original inch dimensions 0 032 0 958 0 026 0 950 23 62 25 27 22 61 25 02 0 930 0 895 0 890 0 985 0 048 0 604
5. H H1 L Output high voltage port 0 in external bus mode ALE WMO PWM1 7 Vpp 5V 10 loH 400uA loH 1504A loH 40uA Output high voltage RST 400uA loH 1204A R ST Internal reset pull down resistor 0 0 0 Cio Pin capacitance Test freq 1MHz Tamb 25 C TIA EEE 1992 Jan 08 7 Philips Semiconductors Product specification Single chip 8 bit microcontroller 80C562 83C562 DC ELECTRICAL CHARACTERISTICS Continued TEST MS SYMBOL PARAMETER CONDITIONS UNIT Analog Inputs Analog supply voltage PCB8XC562 PCF8XC562 PCA8XC562 Idle mode PCB8XC562 PCF8XC562 PCA8XC562 Power down mode 2V lt AVpp lt AVpp max PCB8XC562 PCF8XC562 PCA8XC562 Reference voltage AVREF AVss 0 2 AVpo 0 2 re Analoginputcapacitance o 15 _ taos sem tm Conversion time including sampling time ___ 2 e Me mean 08 6 often tts Ge ne _____ Moro Channelto channel matching Fiss c Crosstakbetween inputs ofpots NOTES 1 See Figures 8 through 12 for Ipp test conditions 2 The operating supply current is measured with all output pins disconnected XTAL1 driven with t t 10ns Vss 0 5V Vin Vpp 0 5V XTAL2 not connected EA RST Port 0 EW Vpp STADC Vss 3 The idle mode supply cur
6. 80C562 83C562 AC ELECTRICAL CHARACTERISTICS 2 12MHz CLOCK VARIABLE CLOCK PARAMETER MN 2 2 o o o 2 o e rien oat ater PSEN i PSEN low to address float P PSEN pulse width EN 3 o o 2 o Data Memory wu Wee ____ tum 3 we 3 o m o 7 je aan Du o armor Sento 3 Adaress to valid datain ses ns amn 84 wen 206 mac Dom 4 SaavaiatowRiarston e ___ woe m e fe fe m ine museer Io m External Clock Rise time NOTES 1 Parameters are valid over operating temperature range unless otherwise specified 2 Load capacitance for port 0 ALE and PSEN 100pF load capacitance for all other outputs 80pF 3 These values are characterized but not 100 production tested 2 2 2 o o o 1992 Jan 08 10 Philips Semiconductors Product specification Single chip 8 bit microcontroller 80C562 83C562 EXPLANATION OF THE AC SYMBOLS Each timing symbol has five characters The Q Output data first character is always t time The other R RD signal characters depending on their positions t Time indicate the name of a signal or the logical V Valid status of that signal The designations are W WR signal A Address X No
7. are described herein for any of these products are for illustrative purposes only Philips Semiconductors makes no representation or warranty that such applications will be suitable forthe specified use without furthertesting or modification LIFE SUPPORT APPLICATIONS Philips Semiconductors and Philips Electronics North America Corporation Products are not designed for use in life support appliances devices or systems where malfunction of a Philips Semiconductors and Philips Electronics North America Corporation Product can reasonably be expected to result in a personal injury Philips Semiconductors and Philips Electronics North America Corporation customers using or selling Philips Semiconductors and Philips Electronics North America Corporation Products for use in such applications do so at their own risk and agree to fully indemnify Philips Semiconductors and Philips Electronics North America Corporation for any damages resulting from such improper use or sale Philips Semiconductors Philips Semiconductors and Philips Electronics North America Corporation 11 East A Po d S register eligible circuits under the Semiconductor Chip Protection Act Sunnyvale California 94088 3409 Copyright Philips Electronics North America Corporation 1992 Telephone 800 234 7381 All rights reserved Printed in U S A Copyright O Each Manufacturing Company All Datasheets cannot be modified without permission This datasheet has been download fr
8. longer a valid logic level C Clock Z Float D Input data Examples tay Time for address valid H Logic level high to ALE low Instruction program memory contents tij pp Time for ALE low to L Logic level low or ALE PSEN low P PSEN SU00006 Figure 2 External Program Memory Read Cycle 7 FROM RI OR DPL INSTR IN gt gt tavDV P2 0 P2 7 OR A8 A15 FROM DPH A0 A15 FROM Figure 3 External Data Memory Read Cycle 1992 Jan 08 11 Philips Semiconductors Product specification Single chip 8 bit microcontroller 80C562 83C562 P2 0 P2 7 OR A8 A15 FROM DPH A8 A15 FROM PCH Figure 4 External Data Memory Write Cycle SU00213 SU00228 Figure 5 External Clock Drive XTAL1 20V gt 2 0V Test Points 0 8V 47 7 0 8 0 45V NOTE AC inputs during testing are driven at 2 4V for a logic 1 and 0 45V for a logic 0 Timing measurements are made at 2 0V for logic 1 and 0 8V for a logic 0 8000215 Figure 6 Testing Input Output NOTE The float state is defined as the point at which a port 0 pin sinks 3 2mA or sources 400uA at the voltage test levels SU00216 Figure 7 AC Testing Input Float Waveform 1992 Jan 08 12 Philips Semiconductors Product specification Single chip 8 bit microcontroller 80C562 83C562 1
9. 70 v6 06170 28 7 ONILVAS 9 335 Orr oO 811 0270 6 LL 3j viivisa 335 008 0 22 02 0 90 6 LL 9 3NVId ONILVAS 65170 v6 0610 28 7 0500 ZZ 986 0 20868 966 0 22 52 NIN H 650 0 9 0X ETET ELT EEC LIUPEPLEMAJDPUDPIEPETHELPLPITILNAGEBEPBLERNJ _ 060 0 6zc 021 0 so e X 07070 20 L Sp 29 c 896 0 LG vc 886 0 20 9 866 0 22 52 PA Sy YAAWNVHO 853 1473A 05854 16 1992 Jan 08 Philips Semiconductors Product specification Single chip 8 bit microcontroller 80C562 83C562 NOTES 1992 Jan 08 17 Philips Semiconductors Product specification Single chip 8 bit microcontroller 80C562 83C562 NOTES 1992 Jan 08 18 Philips Semiconductors Product specification Single chip 8 bit microcontroller 80C562 83C562 NOTES 1992 Jan 08 19 Philips Semiconductors Microcontroller Products Product specification Single chip 8 bit microcontroller
10. 80C562 83C562 DEFINITIONS Data Sheet Identification Product Status Definition This data sheet contains the design target or goal specifications for product development Specifications Objective Specification Formative or in Design may change in any manner without notice This data sheet contains preliminary data and supplementary data will be published at a later date Philips Preliminary Specification Preproduction Product Semiconductors reserves the right to make changes at any time without notice in order to improve design and supply the best possible product This data sheet contains Final Specifications Philips Semiconductors reserves the rightto make changes Product Specification Ful Production at any time without notice in order to improve design and supply the best possible product Philips Semiconductors and Philips Electronics North America Corporation reserve the right to make changes without notice in the products including circuits standard cells and or software described or contained herein in order to improve design and or performance Philips Semiconductors assumes no responsibility or liability for the use of any of these products conveys no license or title under any patent copyright or mask work right to these products and makes no representations or warranties that these products are free from patent copyright or mask work right infringement unless otherwise specified Applications that
11. Input to the inverting amplifier that forms the oscillator and input to the internal clock generator Receives the external clock signal when an external oscillator is used Crystal Input 2 Output of the inverting amplifier that forms the oscillator Left open circuit when an external clock is used Digital ground Program Store Enable Active low read strobe to external program memory Address Latch Enable Latches the low byte of the address during accesses to external memory It is activated every six oscillator periods During an external data memory access one ALE pulse is skipped ALE can drive up to eight LS TTL inputs and handles CMOS inputs without an external pull up External Access When EA is held at TTL level high the CPU executes out of the internal program ROM provided the program counter is less than 8192 When EA is held at TTL low level the CPU executes out of external program memory EA is not allowed to float Analog to Digital Conversion Reference Resistor Low end Analog to Digital Conversion Reference Resistor High end Analog Ground Analog Power Supply NOTE 1 To avoid latch up effect at power on the voltage on any pin at any time must not be higher or lower than Vpp 0 5V or Vss 0 5V respectively 1992 Jan 08 5 Philips Semiconductors Single chip 8 bit microcontroller OSCILLATOR CHARACTERISTICS XTAL1 and XTAL2 are the input and output respectively of an inverting amplifier The p
12. The instruction set consists of over 100 instructions 49 one byte 45 two byte and 17 three byte With a 12MHz crystal 5896 of the instructions are executed in 1us and 4096 in 2us Multiply and divide instructions require 4us 1992 Jan 08 FEATURES 9 80C51 instruction set 9 8k x 8 ROM expandable externally to 64k bytes 256 x 8 RAM expandable externally to 64k bytes 9 Two standard 16 bit timer counters An additional 16 bit timer counter coupled to four capture registers and three compare registers Capable of producing eight synchronized timed outputs 9 An 8 bit ADC with eight multiplexed analog inputs 9 Two 8 bit resolution pulse width modulated outputs 9 Five 8 bit I O ports plus one 8 bit input port shared with analog inputs Full duplex UART compatible with the standard 80C51 9 On chip watchdog timer Three temperature ranges 0 to 70 C 40 to 85 C 40 to 125 C PIN CONFIGURATION PLASTIC LEADED CHIP CARRIER Function Function P5 0 ADCO XTAL1 Vpp Vss STADC Vss NC PWMT P2 0 A08 EW P2 1 A09 P4 0 CMSRO P2 2 A10 P4 1 CMSR1 P2 3 A11 P4 2 CMSR2 P2 4 A12 P4 3 CMSR3 P2 5 A13 P4 4 CMSR4 P4 5 CMSR5 P4 6 CMTO P4 7 CMT1 RST P1 0 CTOI P1 1 CT1I 1 2 21 1 3 P1 4 T2 P1 5 RT2 P1 6 P1 7 P3 0 RxD P3 1 TxD P3 2 INTO P3 3 INTT SU00224 853 1463 05128 Philips Semiconductors Product specification Single ch
13. cked up at the interrupt service routine and continued or by a hardware reset which starts the processor in the same manner as a power on reset POWER DOWN MODE In the power down mode the oscillator is stopped and the instruction to invoke power down is the last instruction executed Only the contents of the on chip RAM are preserved A hardware reset is the only way to terminate the power down mode the control bits for the reduced power modes are in the special function register PCON Table 1 shows the state of the I O ports during low current operating modes PWMO PSEN PORT 0 PORT 1 PORT 2 PORT 3 PORT 4 PWM1 IT Per Das Ares dam Hen Power down External ABSOLUTE MAXIMUM RATINGS 2 3 PARAMETER NOTES OT bas dam ow Das ow Men foo Few dan Dam Dam Ho RATING UNIT V A Ww C m o Tu sen 1 Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device This is a stress rating only and functional operation of the device at these or any conditions other than those described in the AC and DC Electrical Characteristics section of this specification is not implied 2 This product includes circuitry specifically designed for the protection of its internal devices from the damaging effects of excessive static charge Nonetheless it is suggested that conventional precautions be taken to avoid applyin
14. g greater than the rated maxima 3 Parameters are valid over operating temperature range unless otherwise specified All voltages are with respect to Vss unless otherwise noted 1992 Jan 08 6 Philips Semiconductors Product specification Single chip 8 bit microcontroller 80C562 83C562 DC ELECTRICAL CHARACTERISTICS Vss AVss TEST LIMITS SYMBOL PARAMETER CONDITIONS MAX Supply voltage PCB8XC562 PCF8XC562 PCA8XC562 Supply current operating See notes 1 and 2 PCB8XC562 fosc 16MHz PCF8XC562 fosc 12MHz PCA8XC562 fosc 12MHz Idle mode See notes 1 and 3 PCB8XC562 fosc 16MHz PCF8XC562 fosc 12MHz PCA8XC562 fosc 12MHz DESCEND AS oo oo v gt Power down current See notes 1 and 4 2V Vpp Vpp max PCB8XC562 50 50 100 gt PCF8XC562 gt PCA8XC562 Input voltage except EA 0 5 0 2Vpp 0 1 Input high voltage except XTAL1 RST 0 2Vpp 0 9 Vpp 0 5 Input high voltage XTAL1 RST Vpp 0 5 Logical 0 input current ports 1 2 3 4 Vin 0 45V 50 k gt TL Logical 1 to 0 transition current ports 1 2 3 4 Seenote5 650 xlii Input leakage current port 0 EA STADC EW 0 45V Vi Vpp Vo Output low voltage ports 1 2 3 4 lo 1 6mA Vout Output low voltage port 0 ALE PSEN PWMO PWMT lo 3 2mA Output high voltage ports 1 2 3 4 Vpp 5V 10 loH 60uA loH 25uA loH 104A L L1
15. he difference between the actual step width and the ideal step width See Figure 1 10 The ADC is monotonic there are no missing codes 11 The integral non linearity ILe is the peak difference between the center of the steps of the actual and the ideal transfer curve after appropriate adjustment of gain and offset error See Figure 1 12 The offset error is the absolute difference between the straight line which fits the actual transfer curve after removing gain error and a straight line which fits the ideal transfer curve See Figure 1 13 The gain error Ge is the relative difference in percent between the straight line fitting the actual transfer curve after removing offset error and the straight line which fits the ideal transfer curve Gain error is constant at every point on the transfer curve See Figure 1 14 This should be considered when both analog and digital signals are simultaneously input to port 5 1992 Jan 08 8 Philips Semiconductors Product specification Single chip 8 bit microcontroller 80C562 83C562 AVIN LSBideal OSe 1 Lsp AVREF AVREF 256 Example of an actual transfer curve The ideal transfer curve Differential non linearity DLe Integral non linearity ILe Center of a step of the actual transfer curve SU00227 Figure 1 ADC Conversion Characteristic 1992 Jan 08 9 Philips Semiconductors Product specification Single chip 8 bit microcontroller
16. ins can be configured for use as an on chip oscillator as shown in the logic symbol To drive the device from an external clock source XTAL1 should be driven while XTAL2 is left unconnected There are no requirements on the duty cycle of the external clock signal because the input to the internal clock circuitry is through a divide by two flip flop However minimum and maximum high and low times specified in the data sheet must be observed Table 1 Power down Internal RESET A reset is accomplished by holding the RST pin high for at least two machine cycles 24 oscillator periods while the oscillator is running To ensure a good power on reset the RST pin must be high long enough to allow the oscillator time to start up normally a few milliseconds plus two machine cycles At power on the voltage on Vpp and RST must come up at the same time for a proper start up IDLE MODE In the idle mode the CPU puts itself to sleep while all of the on chip peripherals stay active The instruction to invoke the idle mode is the last instruction executed in the normal operating mode before the idle mode is activated The CPU contents the on chip RAM and all of the special function registers External Pin Status During Idle and Power Down Modes PROGRAM MEMORY Product specification 80C562 83C562 remain intact during this mode The idle mode can be terminated either by any enabled interrupt at which time the process is pi
17. ip 8 bit microcontroller 80C562 83C562 ORDERING INFORMATION PHILIPS PART ORDER NUMBER PHILIPS NORTH AMERICA TEMPERATURE PART MARKING PART ORDER NUMBER RANGE C Drawing Drawing AND PACKAGE Number Number PCB80C562 PCB83C562 2 0 to 70 Plastic 16WP 16WP xxx S80C562 4A68 S83C562 4A68 SOT188 S87C552 4A68 SOT188 3 Leaded Chip Carrier 0 to 70 Plastic S87C552 4K68 1473A Leaded Chip Carrier 16 w Window PCF80C562 PCF83C562 S80C562 2A68 S83C562 2A68 SOT188 S87C552 5A68 SOT188 3 40 to 85 Plastic 12 12WP 12WP xxx Leaded Chip Carrier 40 to 85 Plastic S87C552 5K68 1473A Leaded Chip Carrier 12 w Window PCA80C562 PCA83C562 S80C562 6A68 S83C562 6A68 SOT188 40 to 125 Plastic 12 12WP 12WP xxx Leaded Chip Carrier NOTES 1 80C562 and 83C562 frequency range is 1 2MHz 12MHz or 1 2MHz 16MHz 2 87C552 frequency range is 3 5MHz 16MHz For full specification see the 87C552 data sheets 3 xxx denotes the ROM code number LOGIC SYMBOL LOW ORDER ADDRESS AND DATA BUS THAT HIGH ORDER ADDRESS AND DATA BUS Hu SU00225 1992 Jan 08 3 Philips Semiconductors Single chip 8 bit microcontroller BLOCK DIAGRAM TO T1 TWO 16 BIT TIMER EVENT COUNTERS 80C51 CORE EXCLUDING ROM RAM PROGRAM MEMORY 8k x 8 ROM 83C562 DATA MEMORY 256 x 8 RAM PWMO PWMT AVss AVREF ADCO 7
18. o the multiplexed low order address and data bus during accesses to external program and data memory In this application it uses strong internal pull ups when emitting 15 P1 0 P1 7 Port 1 8 bit port Alternate functions include P1 0 P1 7 Quasi bidirectional port pins CTOI CT3I P1 0 P1 3 Capture timer input signals for timer T2 T2 P1 4 T2 event input RT2 P1 5 T2 timer reset signal Rising edge triggered P2 0 P2 7 Port 2 8 bit quasi bidirectional I O port Alternate function High order address byte for external memory 08 15 P3 0 P3 7 Port 3 8 bit quasi bidirectional I O port Alternate functions include RxD P3 0 Serial input port TxD P3 1 Serial output port INTO P3 2 External interrupt INT1 P3 3 External interrupt TO P3 4 Timer 0 external input T1 P3 5 Timer 1 external input WR P3 6 External data memory write strobe RD P3 7 External data memory read strobe P4 0 P4 7 Port 4 8 bit quasi bidirectional I O port Alternate functions include CMSR0 CMSR5 P4 0 P4 5 Timer T2 compare and set reset outputs on a match with timer T2 CMT1 P4 6 P4 7 Timer T2 compare and toggle outputs on a match with timer T2 P5 0 P5 7 Port 5 8 bit input port ADCO ADCT7 P5 0 P5 7 Alternate function Eight input channels to ADC RST Reset Input to reset the 87C552 It also provides a reset pulse as output when timer T3 overflows XTAL1 Crystal Input 1
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20. rent is measured with all output pins disconnected XTAL1 driven with t 10ns Vss 0 5V Vin Vpp 0 5V XTAL2 not connected Port 0 EW Vpp EA RST STADC Vss 4 The power down current is measured with all output pins disconnected XTAL2 not connected Port 0 EW Vpp EA RST STADC XTAL1 Vss 5 Pins of ports 1 2 3 and 4 source a transition current when they are being externally driven from 1 to 0 The transition current reaches its maximum value when Vin is approximately 2V 6 Capacitive loading on ports 0 and 2 may cause spurious noise to be superimposed on the Vo s of ALE and ports 1 and 3 The noise is due to external bus capacitance discharging into the port 0 and port 2 pins when these pins make 1 10 0 transitions during bus operations In the worst cases capacitive loading gt 100pF the noise pulse on the ALE pin may exceed 0 8V In such cases it may be desirable to qualify ALE with a Schmitt Trigger or use an address latch with a Schmitt Trigger STROBE input loj can exceed these conditions provided that no single output sinks more than 5mA and no more than two outputs exceed the test conditions 7 Capacitive loading on ports 0 and 2 may cause the Vou on ALE and PSEN to momentarily fall below the 0 9Vpp specification when the address bits are stabilizing 8 Conditions AVREF AVpp 5 0V AVngr 5 12V ADC is monotonic with no missing codes 9 The differential non linearity DL is t
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PHILIPS 80C562/83C562 Single chip 8 bit microcontroller handbook