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PHILIPS TEA1065 Versatile telephone transmission circuit with dialler interface handbook

1. GC Puieip AWLA pue e eidiee oujoejeozerd e YM G90 YIL au jo uoneordde jeord g Du Qe n T LLI r LOVEN og q6u ix Tag i gt lt lt eaz mizy L l oe n DER USI o gH via 959 e mer ES li f Su li USH Ox oxeo 44 0017 3u 0 eld ZY 90 O3H AVIS Hm 99A lddH ISA Cep I1SVO adis Ss 1 29V TOI A ZAG p 96 XZ8 z T sq 334 19 O e S901 V3 L O 001 Oo PS gt lt 2 4 VA F ECK eui SE EH uoyd E SynoJro JoQuoo Ro CO KN va Wu pue pars c Ip Woy A za Ig EZ xp o du pL EN E SCH LL vg O 6 8 i O C 1 V OG iH vssyng OW o tc LNSOW 8 Bid O _ Ye i 9 o c gt D 21 March 1994 Product specification Philips Semiconductors TEA1065 S INOIIO J01 U09 pue reip uo jn 001 L LO 09Gv8l Dugem esjnd pue eoeidaee ou1oej eozerd e YIM S901 YIL eui jo uoneordde jeoidA 61614 jueuieBueue uonpejoud 1ueJejip e Seulnbes Burerp JIALLG 4 4irsg oS gt lds Kl oN O nl OM 9 GH OM r3 WS vid I 8 9 mh OSI GIO Th e6H 934 GVIS THND 99A HOH ISA GV ISVO 3dlS N S9OLVAL Versatile telephone transmission circuit
2. a magnetic or dynamic microphone the resistor 1 may be connected to reduce the terminating impedance or for sensitive types a resistive attenuator can be used to prevent overloading the microphone inputs a b b electret microphone MBA553 c c piezoelectric microphone Fig 9 Microphone arrangements March 1994 Philips Semiconductors Versatile telephone transmission circuit with dialler interface MUTE input When MUTE HIGH the DTMF input is enabled and the microphone and receiving amplifier inputs are inhibited When MUTE LOW or open circuit the DTMF input is inhibited and the microphone and receiving amplifier inputs are enabled Switching the MUTE input will cause negligible clicks at the earpiece outputs and on the line An electrostatic discharge protection diode is connected between pin MUTE and pin Vcc pins 20 and 21 Dual tone multifrequency input DTMF When the DTMF input is enabled dialling tones may be sent onto the line The voltage gain from DTMF to LN is typ 12 5 dB less than the gain of the microphone amplifier and varies with R7 in the same way as the gain of the microphone amplifier This means that the tone level at the DTMF input has to be adjusted after setting the gain of the microphone amplifier When R7 68 kQ the gain is typically 25 5 dB The signalling tones can be heard in the earpiece at a low level confidence tone Receiving amplifi
3. A A3 eer L detail X UNIT A1 A2 p Su HE 156 7 6 15 2 74 inches 0 61 0 30 0 60 0 29 Note 1 Plastic or metal protrusions of 0 15 mm maximum per side are not included OUTLINE VERSION REFERENCES IEC JEDEC EIAJ EUROPEAN PROJECTION ISSUE DATE SOT137 1 075E05 MS 013AD 95 01 24 97 05 22 Ce March 1994 24 Philips Semiconductors Versatile telephone transmission circuit with dialler interface SOLDERING Introduction There is no soldering method that is ideal for all IC packages Wave soldering is often preferred when through hole and surface mounted components are mixed on one printed circuit board However wave soldering is not always suitable for surface mounted ICs or for printed circuits with high population densities In these situations reflow soldering is often used This text gives a very brief insight to a complex technology A more in depth account of soldering ICs can be found in our Data Handbook IC26 Integrated Circuit Packages order code 9398 652 90011 DIP SOLDERING BY DIPPING OR BY WAVE The maximum permissible temperature of the solder is 260 C solder at this temperature must not be in contact with the joint for more than 5 seconds The total contact time of succ
4. Supply LN and Vcc pins 1 and 21 voltage drop over circuit variation with temperature voltage drop over circuit supply current line 5 MA liine 15 mA liine 100 mA liine 140 mA liine 15 mA liine 15 mA Rya R41 22 68 KQ Dun R22 24 39 kQ PD LOW Voc 2 8 V PD HIGH Voc 2 8 V Microphone inputs MIC and MIC pins 8 and 7 Dual tone input impedance voltage gain variation with frequency referred to 800 Hz variation with temperature referred to 25 C input impedance voltage gain variation with frequency referred to 800 Hz variation with temperature referred to 25 C line 15 mA R7 68 kQ line 15 mA f 300 to 3400 Hz line 50 mA Tamb 25 to 75 C without R6 multi frequency input DTMF pin 19 line 15 mA R7 68 kQ liine 15 mA f 300 to 3400 Hz line 50 mA Tamb 25 to 75 C Gain adjustment GAS1 and GAS2 pin 2 and 3 AGy gain variation with R7 connected between pins 2 and 3 transmitting amplifier 8 8 dB March 1994 15 Philips Semiconductors Versatile telephone transmission circuit with dialler SYMBOL interface PARAMETER CONDITIONS Product specification TEA1065 Transmitti Vi N rms Vno rms Receiving ng amplifier output LN pin 1 output voltage RMS value noise output voltage RMS value amplifier input IR pin 17 liine 15 mA dtot 2 dt
5. 64 9 849 7811 Norway Box 1 Manglerud 0612 OSLO Tel 47 22 74 8000 Fax 47 22 74 8341 Pakistan see Singapore Philippines Philips Semiconductors Philippines Inc 106 Valero St Salcedo Village P O Box 2108 MCC MAKATI Metro MANILA Tel 63 2 816 6380 Fax 63 2 817 3474 Poland UI Lukiska 10 PL 04 123 WARSZAWA Tel 48 22 612 2831 Fax 48 22 612 2327 Portugal see Spain Romania see Italy Russia Philips Russia Ul Usatcheva 35A 119048 MOSCOW Tel 7 095 755 6918 Fax 7 095 755 6919 Singapore Lorong 1 Toa Payoh SINGAPORE 319762 Tel 65 350 2538 Fax 65 251 6500 Slovakia see Austria Slovenia see Italy South Africa S A PHILIPS Pty Ltd 195 215 Main Road Martindale 2092 JOHANNESBURG P O Box 7430 Johannesburg 2000 Tel 27 11 470 5911 Fax 27 11 470 5494 South America Al Vicente Pinzon 173 6th floor 04547 130 SAO PAULO SP Brazil Tel 55 11 821 2333 Fax 55 11 821 2382 Spain Balmes 22 08007 BARCELONA Tel 34 93 301 6312 Fax 34 93 301 4107 Sweden Kottbygatan 7 Akalla S 16485 STOCKHOLM Tel 46 8 5985 2000 Fax 46 8 5985 2745 Switzerland Allmendstrasse 140 CH 8027 Z RICH Tel 41 1 488 2741 Fax 41 1 488 3263 Taiwan Philips Semiconductors 6F No 96 Chien Kuo N Rd Sec 1 TAIPEI Taiwan Tel 886 2 2134 2865 Fax 886 2 2134 2874 Thailand PHILIPS ELECTRONICS THAILAND Ltd 209 2 Sanpavuth Bangna Road Prakanong BANGKOK 10260 Tel 66 2 74
6. Wave soldering techniques can be used for all SO packages if the following conditions are observed e A double wave a turbulent wave with high upward pressure followed by a smooth laminar wave soldering technique should be used The longitudinal axis of the package footprint must be parallel to the solder flow The package footprint must incorporate solder thieves at the downstream end During placement and before soldering the package must be fixed with a droplet of adhesive The adhesive can be applied by screen printing pin transfer or syringe dispensing The package can be soldered after the adhesive is cured Maximum permissible solder temperature is 260 C and maximum duration of package immersion in solder is 10 seconds if cooled to less than 150 C within 6 seconds Typical dwell time is 4 seconds at 250 C A mildly activated flux will eliminate the need for removal of corrosive residues in most applications REPAIRING SOLDERED JOINTS Fix the component by first soldering two diagonally opposite end leads Use only a low voltage soldering iron less than 24 V applied to the flat part of the lead Contact time must be limited to 10 seconds at up to 300 C When using a dedicated tool all other leads can be soldered in one operation within 2 to 5 seconds between 270 and 320 C Philips Semiconductors Product specification Versatile telephone transmission circuit with e TEA1065 dialler int
7. 0 3 V IpPi input current 2 5 5 uA Note 1 No capacitive load on the Vgg output Positive current is defined as conventional current flow into a device Negative current is defined as conventional current flow out of a device March 1994 18 Philips Semiconductors Product specification Versatile telephone transmission circuit with dialler interface TEA1065 DOC TEA1065 C1 100 uF C 5 to 140 mA MBA558 Voltage gain is defined as Gy 20 Log V Vil For measuring the gain from MIC and MIC the MUTE input should be LOW or open circuit for measuring the DTMF input MUTE should be HIGH Inputs not under test should be open circuit except VSI that should be connected to Vee Fig 16 Test circuit for defining voltage gain of MIC MIC and DTMF inputs March 1994 19 Philips Semiconductors Product specification Versatile telephone transmission circuit with dialler interface TEA1065 TEA1065 140 mA Vi C2 GAS2 AGC STAB SLPE MBA559 Voltage gain is defined as Gy 20 Log V Vjl Fig 17 Test circuit for defining voltage gain of the receiving amplifier March 1994 20 Product specification Philips Semiconductors
8. NUMBER PNS PIN POSITION MATERIAL CODE TEA1065 24 DIL plastic SOT101L TEA1065T 24 SO24 plastic SOT137A Notes 1 SOT101 1 1998 Jun 18 2 SOT137 1 1998 Jun 18 QUICK REFERENCE DATA SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNIT line voltage line 15 mA 4 25 normal operation line current range 10 internal supply consumption power down input LOW power down input HIGH supply voltage for peripherals line 15 mA MUTE input HIGH lp 1 2 mA lp 1 55 mA voltage gain range microphone amplifier earpiece amplifier line loss compensation gain control range operating ambient temperature range March 1994 2 Philips Semiconductors Product specification Versatile telephone transmission circuit with dialler interface TEA1065 IR GAR E QR TEA1065 MIC d gt MIC LN A GAS2 MUTE BANDGAP Voc SUPPLY AND REFERENCE VBG REFERENCE PD REFI m CURRENT DOC LL VEE REG AGC STAB DPI VSI CURL MBAS57 Fig 1 Block diagram March 1994 3 Philips Semiconductors Product specification Versatile telephone transmission circuit with dialler interface TEA1065 PINNING SYMBOL PIN DESCRIPTION LN 1 positive line terminal GAS2 3 gain adjustment sending amplifier inverting output receiving amplifier SLPE QR 5 non inverting output receiving am
9. with dialler interface yssyna Dal INSOW P ani b 4 eui eq A d ououdaoiet ed LO xp LLSVd 22 March 1994 Philips Semiconductors Product specification Versatile telephone transmission circuit with i TEA1065 dialler interface PACKAGE OUTLINES DIP24 plastic dual in line package 24 leads 600 mil SOT101 1 i A2 RATATA ATATUA ATATA A DE La seating plane _ 24 CLC pin 1 index scale DIMENSIONS inch dimensions are derived from the original mm dimensions A A1 A2 1 1 UNIT max min max by D E m s1 os alt 320 141 1 26 0 56 inches 0 20 0 16 1 24 0 54 Note 1 Plastic or metal protrusions of 0 25 mm maximum per side are not included OUTLINE REFERENCES EUROPEAN VERSION IEC JEDEC EIAJ PROJECTION SOT101 1 051G02 MO 015AD E ISSUE DATE March 1994 23 Philips Semiconductors Versatile telephone transmission circuit with dialler interface 024 plastic small outline package 24 leads body width 7 5 mm 5 scale DIMENSIONS inch dimensions are derived from the original mm dimensions Product specification TEA1065 SOT137 1
10. 5 4090 Fax 66 2 398 0793 Turkey Talatpasa Cad No 5 80640 G LTEPE ISTANBUL Tel 90 212 279 2770 Fax 90 212 282 6707 Ukraine PHILIPS UKRAINE 4 Patrice Lumumba str Building B Floor 7 252042 KIEV Tel 380 44 264 2776 Fax 380 44 268 0461 United Kingdom Philips Semiconductors Ltd 276 Bath Road Hayes MIDDLESEX UBS 5BX Tel 44 181 730 5000 Fax 44 181 754 8421 United States 811 East Arques Avenue SUNNYVALE CA 94088 3409 Tel 1 800 234 7381 Uruguay see South America Vietnam see Singapore Yugoslavia PHILIPS Trg N Pasica 5 v 11000 BEOGRAD Tel 381 11 625 344 Fax 381 11 635 777 Internet http www semiconductors philips com SCA60 All rights are reserved Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner The information presented in this document does not form part of any quotation or contract is believed to be accurate and reliable and may be changed without notice No liability will be accepted by the publisher for any consequence of its use Publication thereof does not convey nor imply any license under patent or other industrial or intellectual property rights Printed in The Netherlands 415102 00 02d pp28 Philips Semiconductors Date of release March 1994 Document order number 9397 750 nnnnn Lott make things bello S PHILIPS
11. 65 NOTES March 1994 27 Philips Semiconductors Argentina see South America Australia 34 Waterloo Road NORTH RYDE NSW 2113 Tel 61 2 9805 4455 Fax 61 2 9805 4466 Austria Computerstr 6 A 1101 WIEN P O Box 213 Tel 43 160 1010 Fax 43 160 101 1210 Belarus Hotel Minsk Business Center Bld 3 r 1211 Volodarski Str 6 220050 MINSK Tel 375 172 200 733 Fax 375 172 200 773 Belgium see The Netherlands Brazil see South America Bulgaria Philips Bulgaria Ltd Energoproject 15th floor 51 James Bourchier Blvd 1407 SOFIA Tel 359 2 689 211 Fax 359 2 689 102 Canada PHILIPS SEMICONDUCTORS COMPONENTS Tel 1 800 234 7381 China Hong Kong 501 Hong Kong Industrial Technology Centre 72 Tat Chee Avenue Kowloon Tong HONG KONG Tel 852 2319 7888 Fax 852 2319 7700 Colombia see South America Czech Republic see Austria Denmark Prags Boulevard 80 PB 1919 DK 2300 COPENHAGEN S Tel 45 32 88 2636 Fax 45 31 57 0044 Finland Sinikalliontie 3 FIN 02630 ESPOO Tel 358 9 615800 Fax 358 9 61580920 France 51 Rue Carnot BP317 92156 SURESNES Cedex Tel 33 1 40 99 6161 Fax 33 1 40 99 6427 Germany HammerbrookstraBe 69 D 20097 HAMBURG Tel 49 40 23 53 60 Fax 49 40 23 536 300 Greece No 15 25th March Street GR 17778 TAVROS ATHENS Tel 30 1 4894 339 239 Fax 30 1 4814 240 Hungary see Austria India Philips INDIA Ltd Band Box Building 2nd floor 254 D Dr Ann
12. D TEA1063 OO INTEGRATED CIRCUITS DATA SHEET TEA1065 Versatile telephone transmission circuit with dialler interface Product specification March 1994 File under Integrated Circuits ICO3A Philips PHILIPS Semiconductors D fal l L Philips Semiconductors Product specification SS eT Versatile telephone transmission circuit with TEA1065 dialler interface FEATURES e Large gain setting range on microphone and earpiece amplifiers Current and voltage regulator mode with adjustable ES static resistances Line loss compensation facility line current dependent on microphone and earpiece amplifiers Provides supply for external circuitry m B e Adjustable gain contro Symmetrical high impedance inputs for piezoelectric microphone e DC line voltage adjustment facility e Asymmetrical high impedance input for electret microphone GENERAL DESCRIPTION DTMF signal input with confidence tone The TEA1065 is a bipolar integrated circuit which performs Mute input for pulse or DTMF dialling all speech and line interface functions that are required in fully electronic telephone sets with adjustable DC mask The circuit performs electronic switching between dialling and speech internally Power down input for pulse dial or register recall Digital pulse input to drive an external switch transistor Receiving amplifier for magnetic dynamic or piezoelectric earpieces ORDERING INFORMATION EXTENDED TYPE PACKAGE
13. R14 When pin DPI is activated pin DOC changes to a low voltage by trying to sink typ 900 uA to Vee to switch off the external line current control transistor Bandgap reference output VBG This output provides a voltage reference to set the knee line current with the following formula Iknee Icc Ip VBG R9 x R14 R14 R13 R15 R9 x 2 5 x 10 9 In order to improve stability a capacitive load is not allowed on this output Current limit input CURL This input is applied to the base of an internal NPN transistor which has its collector connected to pin DOC and its emitter to Veg see Fig 13 The transistor limits the line current just after hook off or during line transients to a value given by the following formula Inook oft R1 Vgg R9b Vee is the base emitter voltage of the transistor typ 700 mV at 25 C I R1 is the current flowing through R1 to charge C1 just after hook off DOC Ic collector current CURL VEE MBA556 Fig 13 Internal current limiting transistor Philips Semiconductors Versatile telephone transmission circuit with dialler interface The maximum hook off current then becomes Ihook oft Vz R1 Vee x R9a R9b R1 R1 x R9b where Vz is the Zener voltage of diode D5 see Fig 18 Side tone suppression Suppression of the transmitted signal in the earpiece is obtained by the anti sidetone network comprising R1 Ziine R2 R3 R9 and Zpa see F
14. V R 150 Q asymmetrical 1 2 2 mA 2 1 77 mA 3 0 78 mA and 4 0 36 mA Fig 7 Maximum current lp available from Vcc for external peripheral circuitry with Vcc gt 2 2 V and Voc gt 3 V t LN Leq Rp R1 A Vret REG Voc SLPE opie T x VEE Leg C3 x R9 x Rp Rp 17 5 KQ Fig 8 Equivalent circuit impedance between LN and VEe March 1994 8 Philips Semiconductors Versatile telephone transmission circuit with dialler interface Microphone inputs MIC and MIC and gain adjustment connections GAS1 and GAS2 The TEA1065 has symmetrical microphone inputs its input impedance is 40 8 KQ 2 x 20 4 KQ and its voltage gain is typ 38 dB with R7 68 kQ Either dynamic magnetic or piezoelectric microphones can be used or an electret microphone with a built in FET buffer Arrangements for the microphones types are illustrated in Fig 9 Product specification TEA1065 The gain of the microphone amplifier is proportional to external resistor R7 connected between GAS1 and GAS2 which can be adjusted between 30 dB and 46 dB to suit the sensitivity of the transducer An external 100 pF capacitor C6 is required between GAS1 and SLPE to ensure stability A larger value of C6 may be chosen to obtain a first order low pass filter The cut off frequency corresponds with the time constant R7 x C6 MIC 8 7
15. Vcc for supplying peripheral circuits depends on the external components and on the line current Fig 7 shows this current for Vcc gt 2 2 V and for Vec gt 3 V where 3 V is the minimum supply voltage for most CMOS circuits including a diode voltage drop for a back up diode If MUTE is LOW the available current is further reduced when the receiving amplifier is driven Product specification TEA1065 earpiece amplifier supplied from Voc MBA570 MBA571 In 70 In 170 mA mA 150 190 130 1 130 1 110 110 2 2 3 90 90 4 70 70 5 50 50 30 30 2 4 6 8 10 12 4 6 8 10 12 Vin VSLPE V Vin VSLPE V Tamb Ptot 1 35 C 12 W 2 45 C 1 07 W Tamb Prot 3 55 C 0 93 W 1 65 C 1 2W 4 65 C 0 8 W 2 75 C 1 0 W 5 75 C 0 67 W Fig 5 TEA1065 safe operating area Fig 6 TEA1065T safe operating area March 1994 Philips Semiconductors Product specification Versatile telephone transmission circuit with TEA1065 dialler interface MBA569 liine 15 mA at VLN 4 45 V R1 620 Q9 R9 209 Curve 1 and 3 are valid when the receiving amplifier is not driven or when MUTE HIGH curves 2 and 4 are valid when MUTE LOW and the receiving amplifier is driven Vos 150 m
16. ad March 1994 10 j MBA554 c d a dynamic earpiece with an impedance less than 450 Q b dynamic earpiece with an impedance more than 450 Q c magnetic earpiece with an impedance more than 450 Q resistor 1 may be connected to prevent d piezoelectric earpiece resistor 2 is required to increase the phase margin stability with capacitive Philips Semiconductors Product specification Versatile telephone transmission circuit with dialler interface TEA1065 Automatic gain control Automatic compensation of line loss is obtained by connecting a resistor R6 between AGC and Ver The automatic gain control varies the gain of the microphone amplifier and receiving amplifier in accordance with the DC line current see Fig 12 The control range is 5 9 dB this corresponds to a line length of 3 5 km of twisted pair cable see Fig 11 The DTMF gain is not affected by this feature If automatic line loss compensation is not required the AGC pin can be left open circuit the amplifiers then give their maximum gain 34 80 MBA572 Fig 11 Typical 0 5 km line cell model used for automatic gain control optimization 1 MBA549 AG R6 2 co R6 86 6 KQ 118 KO V 147 kQ 187 kQ line mA Fig 12 Variation of gain as a function of line current with R6 as a parameter R9 20 Q March 1994 11 Philips Semiconductors Versatile telephone trans
17. erface DEFINITIONS Data sheet status Objective specification This data sheet contains target or goal specifications for product development Preliminary specification This data sheet contains preliminary data supplementary data may be published later Product specification This data sheet contains final product specifications Limiting values Limiting values given are in accordance with the Absolute Maximum Rating System IEC 134 Stress above one or more of the limiting values may cause permanent damage to the device These are stress ratings only and operation of the device at these or at any other conditions above those given in the Characteristics sections of the specification is not implied Exposure to limiting values for extended periods may affect device reliability Application information Where application information is given it is advisory and does not form part of the specification LIFE SUPPORT APPLICATIONS These products are not designed for use in life support appliances devices or systems where malfunction of these products can reasonably be expected to result in personal injury Philips customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify Philips for any damages resulting from such improper use or sale March 1994 26 Philips Semiconductors Product specification Versatile telephone transmission circuit with dialler interface TEA10
18. ers IR QR QR and GAR The receiving amplifier has one input IR and two complementary outputs QR non inverting and Product specification TEA1065 QR inverting These outputs may be used for single ended or differential drive depending on the type and sensitivity of the earpiece used see Fig 10 Gain from IR to QR is typically 31 dB with R4 100 kQ which is sufficient for low impedance magnetic or dynamic earpieces which are suitable for single ended drive By using both outputs differential drive the gain is increased by 6 dB Differential drive can be used when earpiece impedance exceeds 450 as with high impedance dynamic magnetic or piezoelectric earpieces The output voltage ofthe receiving amplifier is specified for continuous wave drive The maximum output voltage will be higher under speech conditions where the ratio of peak and RMS value is higher The gain of the receiving amplifier can be adjusted over a range of 11 dB to 8 dB to suit the sensitivity of the transducer that is used The gain is proportional to external resistor R4 connected between GAR and QR Two external capacitors C4 100 pF and C7 1 nF are necessary to ensure stability A larger value of C4 may be chosen to obtain a first order low pass filter The cut off frequency corresponds with the time constant R4 x C4 a b Fig 10 Alternative receiver arrangements distortion inductive load lo
19. essive solder waves must not exceed 5 seconds The device may be mounted up to the seating plane but the temperature of the plastic body must not exceed the specified maximum storage temperature T stg max H the printed circuit board has been pre heated forced cooling may be necessary immediately after soldering to keep the temperature within the permissible limit REPAIRING SOLDERED JOINTS Apply a low voltage soldering iron less than 24 V to the lead s of the package below the seating plane or not more than 2 mm above it If the temperature of the soldering iron bit is less than 300 C it may remain in contact for up to 10 seconds If the bit temperature is between 300 and 400 C contact may be up to 5 seconds so REFLOW SOLDERING Reflow soldering techniques are suitable for all SO packages Reflow soldering requires solder paste a suspension of fine solder particles flux and binding agent to be applied to the printed circuit board by screen printing stencilling or pressure syringe dispensing before package placement March 1994 Product specification TEA1065 Several techniques exist for reflowing for example thermal conduction by heated belt Dwell times vary between 50 and 300 seconds depending on heating method Typical reflow temperatures range from 215 to 250 C Preheating is necessary to dry the paste and evaporate the binding agent Preheating duration 45 minutes at 45 C WAVE SOLDERING
20. for the voltage regulator mode liine lt Iknee the static behaviour of the circuit is equal to a 4 18 V voltage regulator diode with an internal resistance of R9 in series with the Vason of the external line current control transistor For the current regulator mode liine gt Iknee the static behaviour of the circuit is equal to a 4 18 V voltage regulator diode with an internal resistance of R9 in series with the Vaso of the external line current control transistor and also in series with a DC voltage source R16 X lpoc the preferred value of R16 is 1 MQ at this value the current Ipoc is negligible compared to liine In the audio frequency range the dynamic impedance between LN and Vee is equal to R1 see Fig 8 The internal reference voltage Var can be adjusted by means of an external resistor Rya This resistor connected between LN and REG will decrease the internal reference voltage When Rya is connected between REG and SLPE the internal reference voltage will increase The maximum allowed line current is given in Figs 5 and 6 where the current is shown as a function of the required reference voltage ambient temperature and applied package Rexch o peripheral Cis Her circuits Fig 4 Supply arrangement March 1994 Philips Semiconductors Versatile telephone transmission circuit with dialler interface The current ly available from
21. ialling mode see also Fig 18 Philips Semiconductors Product specification Versatile telephone transmission circuit with dialler interface TEA1065 LN MBA555 Fig 15 Equivalent circuit of TEA1060 family anti sidetone bridge LIMITING VALUES In accordance with the absolute maximum system IEC 134 SYMBOL PARAMETER CONDITIONS MIN MAX UNIT VLN positive line voltage continuous 12 V positive DOC voltage continuous 12 V VLN repetitive line voltage during 13 2 V switch on or line interruption line current see also Fig 5 and 6 150 mA input voltage on pins other than LN Vcc 4 0 7 V DOC VSI REFI and CURL see Figs 5 and 6 C C C SYMBOL PARAMETER TYP MAX UNIT from junction to ambient in free air TEA1065 from junction to ambient in free air TEA1065T UI Note 1 TEA1065T is mounted on glassy epoxy board 28 5 x 19 1 x 1 5 mm HANDLING Every pin withstands the ESD test in accordance with MIL STD 883C class 2 method 3015 HBM 1500 Q 100 pF 3 positive pulses and 3 negative pulses on each pin as a function of pin Vee March 1994 14 Philips Semiconductors Versatile telephone transmission circuit with Product specification e TEA1065 dialler interface CHARACTERISTICS l n 10 to 150 mA Vee 0 V f 800 Hz Tamb 25 C R9 20 Q unless otherwise specified SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNIT
22. ie Besant Road Worli MUMBAI 400 025 Tel 91 22 493 8541 Fax 91 22 493 0966 Indonesia PT Philips Development Corporation Semiconductors Division Gedung Philips Jl Buncit Raya Kav 99 100 JAKARTA 12510 Tel 62 21 794 0040 ext 2501 Fax 62 21 794 0080 Ireland Newstead Clonskeagh DUBLIN 14 Tel 353 1 7640 000 Fax 353 1 7640 200 Israel RAPAC Electronics 7 Kehilat Saloniki St PO Box 18053 TEL AVIV 61180 Tel 972 3 645 0444 Fax 972 3 649 1007 Italy PHILIPS SEMICONDUCTORS Piazza IV Novembre 3 20124 MILANO Tel 39 2 6752 2531 Fax 39 2 6752 2557 Japan Philips Bldg 13 37 Kohnan 2 chome Minato ku TOKYO 108 8507 Tel 81 3 3740 5130 Fax 81 3 3740 5077 Korea Philips House 260 199 Itaewon dong Yongsan ku SEOUL Tel 82 2 709 1412 Fax 82 2 709 1415 Malaysia No 76 Jalan Universiti 46200 PETALING JAYA SELANGOR Tel 60 3 750 5214 Fax 60 3 757 4880 Mexico 5900 Gateway East Suite 200 EL PASO TEXAS 79905 Tel 49 5 800 234 7381 For all other countries apply to Philips Semiconductors International Marketing amp Sales Communications Building BE p P O Box 218 5600 MD EINDHOVEN The Netherlands Fax 31 40 27 24825 Philips Electronics N V 1998 a worldwide company Middle East see Italy Netherlands Postbus 90050 5600 PB EINDHOVEN Bldg VB Tel 31 40 27 82785 Fax 31 40 27 88399 New Zealand 2 Wagener Place C P O Box 1041 AUCKLAND Tel 64 9 849 4160 Fax
23. ig 18 Maximum compensation is obtained when the following conditions are fulfilled a R9 x R2 R1 x R3 R8 b k R3 x R8 R9 R2 x R9 C Zpai K X Z ine The scale factor k is chosen to meet the compatibility with a standard capacitor from the E6 or E12 range for Zpay In practice Zuue varies considerably with the line length and line type Therefore the value chosen for Zga should be for an average line length giving satisfactory sidetone suppression with long and short times The suppression Product specification TEA1065 also depends on the accuracy of the match between Zba and the impedance of the average line Example With k 1 R1 619 Q R9 20 Q and an average line impedance represented by 270 Q 120 nF 1100 Q the calculation results in e R22130 kQ e R3 3650 Q e R8 715 Q The anti sidetone network for the TEA1060 family shown in Fig 15 attenuates the signal received from the line by 32 dB before it enters the receiving amplifier The attenuation is almost constant over the whole audio frequency range Note More information on the balancing of the anti sidetone bridges can be obtained in our publication Versatile speech transmission ICs for electronic telephone sets order number 9398 341 10011 line MBA568 e hook off speech mode March 1994 Ihook off 0 0 time pulse dialling mode 13 Fig 14 Example of line current shape in pulse d
24. ing in no current in the TEA1065 The voltage on pin SLPE becomes zero and capacitor C15 discharges cancelling the current regulation when DPI becomes inactive LOW level To provide a constant regulation in speech mode and pulse mode an external transistor is required to keep C15 charged during DPI active see Fig 19 in which the Field Effect Transistor BSJ177 is directly driven by the DPI signal An electrostatic discharge protection diode is connected between pin DPI and pin Vcc Voltage sense input and reference voltage input VSI and REFI The voltage on pin VSI represents the DC voltage of pin SLPE The RC filter R15 x C15 is also intended to disable the DC regulation when C15 is shunted or not yet charged especially directly after hook off The time constant R15 x C15 determines approximately the time when no regulation except CURL pin limitation is March 1994 Product specification TEA1065 activated The voltage applied on pin REFI represents a fraction of the bandgap reference voltage given by pin VBG resistor tap R13 and R14 in order to determine Iknee Drive current output DOC Pin DOC drives the external line current control transistor in order to achieve line interruption during pulse dialling or register recall and also the DC slope when liine gt Iknee The current sunk by pin DOC is determined by the voltage on pin VSI in comparison with the voltage on pin VBG divided by the resistor tap R13 and
25. mission circuit with dialler interface Power down input PD During pulse dialling or register recall timed loop break the telephone line is interrupted consequently it provides no supply for the transmission circuit and the peripherals connected to Vcc These gaps have to be bridged by the charge in the smoothing capacitor C1 The requirement on this capacitor is relaxed by applying a HIGH level to the PD input during the loop break This reduces the internal supply current from typ 1 14 mA to 73 LA AHIGH level at PD also disconnects the capacitor at REG which results in the voltage stabilizer having no switch on delay after line interruptions This results in no contribution of the IC to the current waveform during pulse dialling or register recall When this facility is not required PD may be left open circuit or connected to Veg An electrostatic discharge protection diode is connected between pin PD and Vcc Digital pulse input DPI A HIGH level at DPI creates a current which flows from pin DOC to Vee in order to interrupt the line current by the external line current control transistor see Fig 18 MOSFET BUK554 A LOW level or pin left open circuit disables this current to provide the normal DC regulation voltage or current A simple application without regulation of current in pulse dialling mode is given in Fig 18 When DPI is activated HIGH level the external line current control transistor is switched off result
26. n voltage gain from DTMF input MUTE HIGH to QR or QR R4 100 kQ single ended RT 300 2 Power down input PD pin 18 input voltage HIGH input voltage LOW input current Automatic gain control input AGC pin 23 AGy controlling the gain from IR to R6 118 kQ QR QR and the gain from MIC MIC to LN gain control range with respect to liine 15 mA liine highest line current for maximum gain liine lowest line current for minimum gain AGy change of gain between liine 15 and 35 5 mA Current limiting input CURL pin 15 VBE base emitter voltage drop of see Fig 13 internal transistor lc 50 uA Ipoc Hee current gain of internal see Fig 13 transistor lc 50 uA Ipoc IC max maximum collector current of see Fig 13 internal transistor Bandgap reference voltage output VBG pin 12 reference voltage output drive capability output impedance March 1994 17 Philips Semiconductors Product specification Versatile telephone transmission circuit with dialler interface TEA1065 SYMBOL PARAMETER CONDITIONS Voltage sense input VSI pin 14 lo output current pin VSI connected to Veg Reference input REFI pin 13 output current output current REFI connected to Veg VSI not connected DPI LOW REFI not connected VSI connected to Veg DPI HIGH Digital pulse input DPI pin 10 Vu input voltage HIGH 1 5 Voc V Vu input voltage LOW
27. or 9 mode mode Fig 3 Voltage and current regulator mode March 1994 Philips Semiconductors Versatile telephone transmission circuit with dialler interface The DC current flowing into the set is determined by the exchange supply voltage Vexch the DC resistance of the subscriber line Riine and the DC voltage on the subscriber set see Fig 4 If the line current exceeds Icc 0 3 mA required by the circuit itself Icc 1 14 mA plus the current required by the peripheral circuits connected to Vcc then the voltage regulator will divert the excess current via LN Vin Vref Istpe x R9 Viet liine loc 0 3 x 10 3 lo x R9 where Vier is an internally generated temperature compensated reference voltage of 4 18 V and R9 is an external resistor connected between SLPE and Vee The preferred value of R9 is 20 O Changing R9 will influence the microphone gain gain control characteristics sidetone and the maximum output swing on LN In this instance the voltage on the line excluding the diode rectifier bridge see Fig 4 is Vue Vin Vas R16 x lpoc where Vas is the voltage drop between the gate and source terminal of the external line current control transistor and Ipoc is the current sunk by pin DOC Ipoc 0 in the voltage regulator mode and increases with Product specification TEA1065 liine in the current regulator mode Under normal conditions ls pg gt gt Icc 0 3 mA Ip and
28. ot 10 line 15 mA R7 68 kQ pin 7 and 8 open circuit psophometrically weighted P53 curve control transistor included MOS BUK554 type see Fig 18 Z input impedance 17 21 25 kQ Receiving amplifier outputs QR and QR pin 5 and 4 Zo output impedance 4 Q Gy voltage gain line 15 mA R4 100 kQ single ended RT 2000 30 31 32 dB differential RT 600 Q 36 37 38 dB AG f variation with frequency f 300 to 3400 Hz 0 5 t0 2 40 5 dB referred to 800 Hz AGyT variation with temperature without R6 liine 50 mA 0 2 dB referred to 25 C Tamb 25 to 75 C Vo rms output voltage RMS value line 15 mA THD 2 sinewave drive R4 100 kQ single ended RT 2 150Q 0 3 0 38 V differential RT 450 Q 0 56 0 72 V differential CT 2 60 nF 0 87 1 07 V 1500 Q series resistor f 3400 Hz line 30 mA differential 1 02 1 22 V CT 60 nF 1500 Q series resistor f 3400 Hz Vo rms noise output voltage RMS line 15 mA value R4 100 ko single ended RT 3000 50 uV differential RT 600 Q 100 uV March 1994 16 Philips Semiconductors Product specification Versatile telephone transmission circuit with TEA1065 dialler interface SYMBOL PARAMETER Gain adjustment GAR pin 6 AGy receiving amplifier gain adjustment range Mute input MUTE pin 20 input voltage HIGH input voltage LOW input current change of microphone amplifier MUTE HIGH gai
29. plifier gain adjustment receiving amplifier MIC 7 inverting microphone input STAB 9 current stabilizer VBG 11 bandgap output reference TEA1065 VSI 14 voltage sense input Ver 16 negative line terminal PD 18 power down input MUTE 20 MUTE input a 22 voltage roguata EES SLPE 24 slope DC resistance adjustment MBA551 March 1994 4 Philips Semiconductors Versatile telephone transmission circuit with dialler interface FUNCTIONAL DESCRIPTION Supply Vcc LN SLPE REG and STAB The circuit and its peripherals are usually supplied from the telephone line The circuit develops its own supply voltage at Vcc pin 21 and regulates its voltage drop between LN and SLPE pins 1 and 24 The internal supply requires a decoupling capacitor between Vcc and Vee pin 16 the internal voltage regulator has to be decoupled by a capacitor from REG pin 22 to Vgg The internal current stabilizer is set by a 3 6 kO resistor connected between STAB pin 9 and Vee The TEA1065 can be set either in a DC voltage regulator mode or in a DC current regulator mode The DC mask can be selected by connecting the appropriate external components to the dedicated pins VSI REFI DOC VBG When the DC current regulator mode is not required it can be cancelled by connecting pin VSI to Vgg pins REFI VBG and DCC are left open circuit Voltage regulator mode The voltage reg
30. ulator mode is achieved when the line current is less than the current Iknee as illustrated in Fig 3 With R13 R14 30 kQ the current Iknee 30 mA lp 0 mA line current Product specification TEA1065 This line current value will be reached when the voltage on pin VSI almost equal to the voltage on pin SLPE exceeds the voltage on pin REFI equal to the voltage on pin VBG divided by the resistor tap R13 R14 For other values of R13 and R14 the Iknee current is given by the following formula Iknee Icc Ip VBG R9 x R14 R14 R13 R15 R9 x Io VSI lcc is the current required by the circuit itself typ 1 14 mA Ip is the current required by the peripheral circuits connected between Vcc and Vee lo vsi is the output current from pin VSI typ 2 5 uA The DC slope of the Viine liine curve is in this mode determined by R9 R9 R9a R9b in series with the fas Of the external line current control transistor see Fig 4 lds oVas olp at Vas Vps Current regulator mode The current regulator mode is achieved when the line current is greater than Iknee In this mode the slope of the Viine liine curve is approximately 1300 Q with R9 20 Q R16 1 MO R13 R14 30 kQ For other values of these resistances the slope value can be approximated by the following formula R9 x 1 R16 x 1 R13 1 R14 MBA567 Iknee 0 voltage current ect s regulator La regulat

PHILIPS TEA1065 Versatile telephone transmission circuit with dialler interface handbook

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