philips PCF2113x LCD controllers/drivers handbook
Contents
1. Fig 34 Bonding pad locations 92 gt gt gt a gt gt gt gt 8 gt 8 3 52 MGU205 PCF2113x dummy pad 3 C28 C29 C30 C31 C32 C33 C34 C35 C36 C37 C38 C39 C40 C41 C42 C43 C44 C45 C46 C47 C48 C49 C50 C51 C52 dummy pad 2 2001 Dec 19 62 Philips Semiconductors Product specification LCD controllers drivers PCF2113x 18 TRAY INFORMATION BEP dde 1 000000 E 1 1 EE mimiW For dimensions see Table 19 Fig 35 Tray details Table 19 Tray dimensions DIMENSION DESCRIPTION VALUE pocket pitch x direction pocket pitch y direction pocket width x direction pocket width y direction tray width x direction tray width y direction pockets in x direction PC2113x pockets in y direction Table 20 Bump size PARAMETER VALUE UNIT MGU207 Type galvanic pure Bump width 50 6 length 90 6 height 17 5 5 Th2. pea SY 19 sseJppe 55 Joye 18 SEN N ekq s l q 1527 LL 0099N J luliod Jejuiod eyepdn eyepdn 09 WH 914 158 A A NG Y 01 1 di 1 3149 Viva vw SE She 5 1 ou 1 09 09 MH 0 lt u eMq 0 uz m SsoJppe A A A 4 N Y E eee x d 0 2 031 8 VLVG IOHINOO SH 0 V V1VG 31 lOdINOO SH L IVIO VIL O L L L O S EJ 0 1 2 TD o c O Q O zl 37 2001 Dec 19 Philips Semiconductors Product specification LCD controllers drivers 2113 acknowledgement acknowledgement no acknowledgement from PCF2113x from master from master mm 5 e 5 ADDRESS 1 1 m 4 A v n bytes last byte R W Co update update da
3. Snq O l 31A8 519 981 SSA 4 5 euy 5 jo 91 IALL 55 2001 19 Product specification Philips Semiconductors PCF2113x LCD controllers drivers snq O l 94 pepeo SI Jo epoo eDpejwouxoe 461 s 1912110 epoo 19 x 8 0 0 0 0 0 0 0 0ga iga zga ega rga sga 980 dd eiou 79S 8 Lep pea snq O l eui OJUI 0 SseJppe 10 1 GSW 1no si 21949 Buunp pepeo 106 x 8 pea eg JU8 U09 18 SIM 01195 90 0 SEY OU UMOUYUN SEM 941 Jo sey pedi 195 e snoad 3no eq eoeyejui snq O l PUISJUI y OJUI si eui 21949 y 0 X X X X X X X X 0ga iga 680 rga 880 98d
4. 1 19 8 peal 0 L L 0 0 0 SH 09 pee 10 011U09 0 0 0 OVS IVS ZVS VS vVS SVS 9VS 10 sseJppe 14616 snq zl eui jou seop 141 uonisod Aejdsip peyius os e Jejunoo sseJppe 0 sseJppe 5195 L 0 L 0 0 0 0 0 0 Odd zga ega raa zga 0 L 0 58 09 8 deis se 10 SSeuppe 5 1315 11816 5 02 dois snq 9 1 jeuondo S NOILVH3dO AV 1dSIG L Lb 0 l 0 L 0 eaa saa 980 0 519 981 810161 56 2001 19 Product specification Philips Semiconductors 2113 LCD controllers drivers eBpejwouxoe eui eu ye si 72 aieo UOP X 71 4015 snq O l SI JOSINO pue JOU s Jejunoo sseJppe p lepdn jou SI JejsiDeJ 1 5 eoejiejui pepeo SI ejep Meu si uonoe eujejur OU 1no peius s 1 11 eoepejul
5. 0 5VOp 0 25Vop OV 0 25 0 5VOp I state 2 OV 0 25VOp 0 5VOp Vop a 4 MGE996 Fig 12 MUX 1 18 LCD waveforms character mode 2001 Dec 19 18 Philips Semiconductors Product specification LCD controllers drivers 2113 frame n gt lt frame n 1 state 1 ON 2 OFF VS OFF 2 4 ROW1 Va V4 fe be Ge RS V5 4 0 0 0 3 Vss 0 0 0 0 R4 4 0 0 0 5 0 0 0 0 R6 0 0 0 R7 0 0 0 0 R8 ROW2 V3 V4 Mp 4 9 9 9 9 R9 ROW3 VgN4 V5 Vss VLCD VgNV4 i V5 Vss COL2 V3 V4 Vss VoP 0 5VOp 0 25 state 1 OV 0 25 0 5 state 2 OV 0 25 282 0 5 Vop A 77407 59 965457009 9 MGU217 R10 to R18 to be left open Fig 13 MUX 1 9 LCD waveforms character mode 2001 Dec 19 19 Philips Semiconductors Product specification LCD controllers drivers PCF2113x frame n j 1 only icons VLCD driven MUX 1 2 17 2 3 1 3 m oeeo Vss I db do VLCD ROW18 2 3 221 1 3 Vss
6. 4315 snq 9 40 ejqeordde jou eoepeijur 14 Aq 2 81 59 2001 Dec 19 Philips Semiconductors Product specification LCD controllers drivers 2113 17 BONDING PAD INFORMATION COORDINATES SYMBOL Voot X Y 1345 1550 2 VLCDSENSE Vicpi R9 R10 DES m pad 1 dummy pad 2 C52 1630 1255 51 1630 1155 50 1630 1055 49 1630 955 48 1630 735 47 1630 635 246 1630 535 1630 435 1630 335 1630 235 EE 1630 COORDINATES X 1630 1630 1630 SYMBOL 1630 1630 1630 1630 1630 1630 1630 dummy pad 3 1630 dummy pad 4 1435 C27 1335 C26 C25 1115 1550 24 1005 1550 C23 765 1 550 525 1550 455 1550 295 1550 145 1550 15 1550 175 1550 245 1550 315 1550 385 1550 455 1550 525 1550 595 1550 665 1550 735 1550 805 1550 875 1550 995 1550 1065 1550 1135 1550 1205 1550 1275 1550 C22 665 1550 21 565 1550 20 465 1550 365 1550 265 1550 165 1550 1550 EX 2 4 6 7 11 13 15 18 E 335 1550 435 1550 535 1550 635 1550 735 1550 835 1550 965 1550 1065 1550 1165 1550 1265 1550 ums pad 5 1465 1550 6 84 1
7. eui JO uonduosep eu ye yoo 195 eu Aq 195 oi 5 11q sseuppe sies 195 INVHOO 195 sjuejuoo 1 4 10 1uBu 9 5 9 51145 10 105100 Hys 1 10 9 y diuo sind Aejdsip 0 uonisod 06 19 pue 9 yo uo 10s4no aua 5195 peal pue erep esau Aejdsip jo uius seyioeds pue 10640 5195 sjuejuoo INVHaa uonisod ejdsip peyius 49 unoo SSaJppe ul 0 sseJppe sies 041009 ejdsiq 195 Jejunoo sseJppe ul 0 5195 pue Aejdsip aua 1819 10 0 erep INVHQU 10 WYH99 lt sseJppy pue si 48 Asng eui peal Jejunoo SSoJppe pue peau H 195
8. 1111 16 ts p T gat Fig 7 Character set A in CGROM 2001 Dec 19 13 Philips Semiconductors Product specification LCD controllers drivers 2113 lower 4 bits 0000 0001 0010 0011 0100 0101 0110 0111 1000 1001 1010 1011 1100 1101 1110 1111 4 bits 0000 1 0001 2 z 0010 3 i i E 0011 4 0100 5 n zi zi 0110 7 E 29 0111 8 at sU xxxx 1001 10 2 H 2 xxxx 1010 11 4 x E e 1100 13 n E a xxx 1101 14 E Pu i i xxxx 1110 15 E i aa 1111 16 ri 38 MGD688 Fig 8 Character set D in CGROM 2001 Dec 19 14 Philips Semiconductors Product specification LCD controllers drivers 2113 lower 4 Fits 0000 0001 0010 0011 0100 0101 0110 0111 1000 1001 1010 1011 1100 1101 1110 1111 4 bits 0000 1 0001 2 F s xxxx 0010 3 4 map i 2 PO 22M 0110 7 8 1000 9 d DU 1 xxxx 1001 10 pm 25 S
9. lt IQ 03 JOO IR JOT PLOT OO 0 gt Joo TR co 03 O O OO 0 joo Ico oo 69 IN IN IN IR 1 C3 OSC C4 PD C5 Ti C6 Vss1 C7 2 6 2 69 L8 68 C10 9 C11 R10 66 C12 R11 C13 R12 C14 R13 PCF2113x C15 R14 C16 R15 C17 R16 60 C18 R18 C19 C60 C20 C59 C21 C58 C22 C57 C23 C56 54 C24 55 53 25 54 52 26 53 25 51 27 CO 10 o xr LO JO JOO LOT JOT JOO 0 o NJ N POUT 691 OO OO POOP t t 10 Od 6 6 Oa CO iD Oa MN MN MN 0 gt QN QN MGE989 Fig 2 Pin configuration LQFP100 2001 Dec 19 8 Philips Semiconductors LCD controllers drivers 7 FUNCTIONAL DESCRIPTION 7 1 LCD supply voltage generator The LCD supply voltage may be generated on chip The generator is controlled by two internal 6 bit registers VA and Vg The nominal LCD operating voltage at room temperature is given by the relationship Vop nom integer value of register x 0 08 1 82 7 1 1 PROGRAMMING RANGES Programmed value 1 to 63 V
10. 1010 11 ae 555 B LI LI LI xxx 1011 12 HP LI a m an E n LI ires ce m xxxx 1100 13 m ETT LI ann an m mm 1101 14 ah n m n a m mumj m m sumam ma au LI LI LI m E EM LI 1110 15 aman n m m am m LI EBENEN LI a LE LI an LI LI EM Ws an a mw LI ann XXXX 1111 16 Mi ee u ann LI LI LI LI LI LI LI LI MGD689 Fig 9 Character set E in CGROM 2001 Dec 19 15 Philips Semiconductors Product specification LCD controllers drivers 2113 lower 4 bits 0000 0001 0010 0011 0100 0101 0110 0111 1000 1001 1010 1011 1100 1101 1110 1111 REOS 0000 ecco LTTE ES ES ES T m oon a F Cie ies cl xxxx 0100 5 RE
11. eu Aq S 2424 uo Ajddns 18mod 9 NOILVH3dO AV 1dSIG NOILONHLSNI 4315 V 195 1959 fejdsip 119 8 EL 5 Product specification Philips Semiconductors PCF2113x LCD controllers drivers 0 uonisod eu 0 Josuno pue eldsip 104 0 0 0 0 0 0 14 IN WOOOHOI 0 0 0 0 INvVHad WNvHoo 9z eu 0 108419 eu 55 ODOHOIN 0 0 0 0 0 0 uius GZ eu 0 1051 pue Kejdsip eui SYYS uius 49 eui 0 y U01981109 9 02042 0 0 0 O IvHag WNvHoo 49 0 uonisod 405409 eu SyS OHOHOIN 0 0 0 0 0 0 uius 22 eui 0 uonisod 106402 y 51145 NOILONEHLSNI 0 0 0 0 uius 50 2001 19 Product specification Philips Semiconductors PCF2113x LCD controllers drivers 0 H sies 0 0 0 0 19 uonounj I SUOI 0 0 0 0 0 0 UCD ol H 5196 0 0 0 0 19 uonounj LE 01 eseud ppo uoo 101
12. seiuM 0 0 0 0 0 905 SI JO WWWHDD eui sies L L L 0 0 0 SSeJppe 195 sieodde suooi aseyd uod JO WIWHDOD 0 0 0 0 0 INVHOQ INVHOO 905 S 94 0 JejoeJeuo JO INVH5 0 eui sies 0 0 L 0 0 0 SSeJppe 195 peyiys jou y 0 y JO y 1e eu o 10suno 941 1146 o pue sseJppe au 5195 Jaye xuelg si Aejdsip pue e dsip uo OA dol pue ejdsip sioejes 16 9 01 5195 0 0 0 0 0 0 195 0 0 0 0 0 041009 0 0 0 0 ega vad sga 9 19 uonounj sjeedde Aejdsip ou NOILVH3dO 19591 Aq pezi eniui si xe 2424 Ajddns 18mod NOILONHLSNI 4315 19 19591 pue Aejdsip 16 8 pL 51 2001 Dec 19 Product specification Philips Semiconductors PCF2113x LCD controllers drivers 0 55 uonisod Josuno p
13. 2 CIRCUITS DATA SHEET BUS PCF2113x LCD controllers drivers Product specification 2001 Dec 19 Supersedes data of 1997 Apr 04 File under Integrated Circuits 12 Philips PHILIPS Semiconductors DH LI E Philips Semiconductors sO eS not LCD controllers drivers Product specification PCF2113x CONTENTS 1 FEATURES 1 1 Note 2 APPLICATIONS 3 GENERAL DESCRIPTION 4 ORDERING INFORMATION 5 BLOCK DIAGRAM 6 PINNING 7 FUNCTIONAL DESCRIPTION 7 1 LCD supply voltage generator 7 2 LCD bias voltage generator 7 3 Oscillator 7 4 External clock 7 5 Power on reset 7 6 Power down mode 7 7 Registers 7 8 Busy flag 7 9 Address Counter AC 7 10 Display Data RAM DDRAM 7 11 Character Generator ROM CGROM 7 12 Character Generator RAM CGRAM 7 13 Cursor control circuit 7 14 Timing generator 7 15 LCD row and column drivers 7 16 Reset function 8 INSTRUCTIONS 8 1 Clear display 8 2 Return home 8 3 Entry mode set 8 4 Display control and partial Power down mode 8 5 Cursor or display shift 8 6 Function set 8 7 Set CGRAM address 8 8 Set DDRAM address 8 9 Read busy flag and read address 8 10 Write data to CGRAM or DDRAM 8 11 Read data from CGRAM or DDRAM 9 EXTENDED FUNCTION SET INSTRUCTIONS AND FEATURES 9 1 New instructions 9 2 Icon control 9 3 Bit IM 9 4 Bit IB 2001 Dec 19
14. pue 15 6 XNU soul Aejdsip Jo 1equunu geq 5195 19 4 ou L4007H S319A9 32012 184 cad vad Sad gG WH 58 NOILONHISNI 196 ejqer 24 2001 Dec 19 Product specification Philips Semiconductors PCF2113x LCD controllers drivers A 8A 10 VA 1 OOTA 1015 dol 195 jou 0 pue IS 991 jeuiejui 195 X91 9 195 soDejs ueDAH 195 034002 yug 9 198 uoo pue 4 195 1 ueeaos 195 esn jou S319A29 32012 raa SH 25 2001 Dec 19 Philips Semiconductors LCD controllers drivers Table 6 Explanations of symbols used in Tables 4 and 5 Product specification PCF2113x LOGIC STATE 1 BIT LOGIC STATE 0 Co l
15. ueeq seu 1969 Joye SWU NOILdIH9S3a ejejs 10 9315 19 8 21 91861 58 2001 Dec 19 Product specification Philips Semiconductors PCF2113x LCD controllers drivers spue 195 o 18 9 yo Aeidsip x seul Aejdsip Jo jroeds i Si 198 uonoun Huo 64 8 eu Slo olo ojo ojlo o o o ojlo Q 1 eoepojur 195 195 uonounj ees euim perjoeds eui si pexoeuo SI Jg eui Jaye eq ueo 4g 514 8 Si 198 uonounj uomnonjJlsul SIU eq 1 48 6uo 8 si 198 uonounj 0 uomnonjJlsul SIU JOUUE9 48 18a 8 eoepeiur 19 uonounj 0 0 0 0 uomnonujsul S14 940 90 eq 104469 dg ueeq seu 18581 1 Joye SW 9121 10
16. VLCD ROW 1 to 16 1 3 Vss VLCD 2 3 1 3 Vss COL 1 ON OFF VLCD 2 3 COL2 OFF ON Vss VLCD 2 3 COL3ON ON 7 ES Vss VLCD 2 3 COL40FF OFF Vss MGE997 Fig 14 1 2 LCD waveforms icon mode 2001 Dec 19 20 Philips Semiconductors LCD controllers drivers VPIXEL Vop 2 3 5 1 1 3 frame n frame n 1 gt COL 1 0 ROW 17 1 3 2 3 VOP 2 3 5 2 13 Vop COL 2 0 ROW 17 1 3 Vop 2 3 VoP state 3 1 3 Vop COL 1 0 __ ROW 1 to 16 1 3 2 3 VoP VoN ms 0 745Vop VorF ms 0 333Vop V D ON 2 23 pA Fig 15 MUX 1 2 LCD waveforms icon mode Product specification PCF2113x MGE998 state 1 ON state 2 OFF R17 R18 R1 16 state 3 OFF 2001 Dec 19 21 Philips Semiconductors Product specification LCD controllers drivers PCF2113x 7 16 Reset function The PCF2113x automatically initializes resets when power is turned on The chip executes a reset sequence including a clear display requiring 165 oscillator cycles After the reset the
17. 0101 6 ae 0110 7 ah LIE Mod Ne ws 1000 9 S A 8 Le 1001 10 E Au H See 1010 11 H E 1011 12 3 n 7 x xxxx 1100 13 2 E rot xxxx 1110 15 is m 2s za s 1111 16 E POE DU Fig 10 Character set W in CGROM 2001 Dec 19 16 Philips Semiconductors Product specification LCD controllers drivers PCF2113x character codes CGRAM character patterns character code DDRAM data address CGRAM data CGRAM data 7 6 5 4 3 2 1 0 6 5 4 3 2 4 3 2 1 0 4 3 2 1 0 higher lower higher lower higher lower order order gt order order gt order order bits bits bits bits bits bits 00000000 0000000 1 1 1 1 0 0 0 1 1 000 1 1 0 0 0 1 0 1 1 pattern 1 1 1 1 0 100 example 1 O 1 0 1 1 0 0 1 0 1 1 0 1 0 0 0 1 yfai cursor 0 0 0 0 0 position 0 0 0 0 0 0 0 1 0 0 0 1 0 0 0 1 1 1 0 1 0 1 0 0 1 0 character 4 1 1 1 1 0 1 1 pattern 0 0 1 0 0 1 0 0 example 2 1 1 1 1 1 1 0 1 0 01 0 0 1 1 0 0 01 0 0 1 1 1 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 1 0 0 0 0 MGE995 0 0 1 rc a MN nM c 00001 1 1 4 1 1 1 1 1 0 00001 1 1 1 1 1 1 1 1 0 1 0 0 0 0 1 1 1 1 1 1 1 1 1 1 O 00 0 0 1 1 1 4 1 1 1 1 1 1 1 Character code bits 0 to 3 correspond to CGRAM address bits 3 to 6 CGRAM
18. 2113 1 8 to 5 5 V 2 2 to 4 0 V Vss 0 V 2 2 to 6 5 V Tamb 40 to 85 C unless otherwise specified SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNIT fer LCD frame frequency internal clock Vpp 5 0 V 45 95 147 Hz oscillator frequency not available at any pin 140 fosc ext external clock frequency 140 losc st oscillator start up time after power down note 1 tw PD power down HIGH level pulse width 1 tsw PD tolerable spike width on PD pin note 1 Timing characteristics of parallel interface note 2 WRITE OPERATION WRITING DATA FROM MICROCONTROLLER TO 2113 see Fig 27 Toy en enable cycle time twen enable pulse width address set up time address hold time O1 data set up time D data hold time 25 READ OPERATION READING DATA FROM 2113 MICROCONTROLLER see Fig 28 enable cycle time A address set up time ao 500 tw en enable pulse width 220 50 25 A address hold time gt data delay time Vppi gt 2 2 V Vpp1 gt 1 5V h D data hold time Timing characteristics of interface see Fig 29 note 2 SCL clock frequency SCL clock LOW period SCL clock HIGH period data set up time data hold time SCL and SDA rise time note 1 and 3 t SCL and SDA fall time note
19. PCF2113x INTERNAL CIRCUIT VDD1 Vss1 MGU200 Vssi Vss2 CDSENSE 10 Vi CD1 11 SCL 96 SDA 97 SYMBOL PAD Vpp1 1 109 7 8 MGU201 Vssi MGU202 MGU203 MGU196 2001 Dec 19 44 Philips Semiconductors LCD controll SYMBOL ers drivers INTERNAL CIRCUIT Product specification PCF2113x OSC DBO to DB7 R1 to R8 100 108 to 101 94 to 87 12 to 19 R9 to R16 R17 95 20 R18 C1 to C2 86 to 85 C3 to 27 C28 to C52 C53 to C60 82 to 58 55 to 31 28 to 21 obi O Vss1 MGU199 2001 Dec 19 45 Philips Semiconductors Product specification LCD controllers drivers PCF2113x 16 APPLICATION INFORMATION R17 R1 P10 11 12 R1 to R16 2 x 12 CHARACTER P80CL51 PCF2113x 16 LCD DISPLAY PLUS 120 ICONS C1 to C60 P17 to P14 DB7 to DB4 MGG006 Fig 30 Direct connection to 8 bit microcontroller 4 bit bus 2 P20 RS R17 R18 P21 R W 22 R1 to R16 2 x 12 CHARACTER P80CL51 PCF2113x 16 LCD DISPLAY PLUS 120 ICONS C1 to C60 P17 to P10 DB7 to DBO MGGO005 Fig 31 Direct connection to 8 bit microcontroller 8 bit bus OSC R17 R18 2 VDD R1 to R16 2x12 CHARACTER LCD DISPLAY
20. R9 to R16 R18 C60 to C53 17 18 to 25 21 to 28 12 to 19 LCD row driver outputs 9 to 16 20 LCD row driver output 18 LCD column driver outputs 60 to 53 dummy pad 29 dummy pad 30 C52 to 28 26 to 50 31 to 55 LCD column driver outputs 52 to 28 dummy pad dummy pad C2 LCD column driver output 2 R8 to R1 78 to 85 87 to 94 LCD row driver outputs 8 to 1 R17 86 95 LCD row driver output 17 SCL 87 96 I C bus serial clock input note 4 SDA 88 97 I2C bus serial data input output note 4 RS 90 99 register select input DB7 92 101 8 bit bidirectional data bus bit 7 note 5 8 bit bidirectional data bus bit 6 DB5 94 103 8 bit bidirectional data bus bit 5 8 bit bidirectional data bus bit 4 DBS3 SAO 96 105 8 bit bidirectional data bus bit or I2C bus address pin notes 4 and 5 8 bit bidirectional data bus bit 2 DB1 98 107 8 bit bidirectional data bus bit 1 2001 Dec 19 Philips Semiconductors Product specification LCD controllers drivers PCF2113x PIN PAD SYMBOL PCF2113DH PCF2113XU TYPE DESCRIPTION DBO 8 bit bidirectional data bus bit 0 Vppe supply voltage 2 for Vi cp generator note 6 supply voltage 3 for cp generator notes 3 and 6 Notes 1 Bonding pad location information is given in Chapter 17 2 When the on chip oscillator is used this pad must be connected to Vpp1 3 In the
21. 0 0 L 0 0 L 0 iaa zga ega rga saa 9gd 01 0 0 O 0 0 odd ega raa 9ga zga 01 0 0 0 0 L 0 0 0 0 0 SH 09 10 e pues pepeeu s p 01 19 160 SY 01 10 0 0 IVS ZVS EVS vVS SVS 9VS JO SseJppe 14616 519 02 peylys jou si feldsip NYH99 10 o Jo eu ye eu 01 10S1n9 y 1148 0 pue Aq sseJppe au 1 5498 5195 yll IIOSV ainue osno pue Aejdsip uo suuni L 0 0 0 0 0 ead vad sga gad 195 L L 0 0 0 0 ega vad sga dd 041009 ejdsip JO uonnoexe SLIS 21949 eBpejwouxyoe esind 126 VA 991 pue Aejdsip 8108198 0 0 X 0 0 ega rga sga 980 dq 19 10 SH 5195 eu Aq vqs 21949 eu Buunp 0 0 0 0 0 0 0 0 0 0 SH 09 Jes 10 e pues 0 0 0 0 OVS IVS EVS vVS SVS 9VS 10 SseJppe sjeedde e dsip ou
22. 24 V or less soldering iron applied to the flat part of the lead Contact time must be limited to 10 seconds at up to 300 C When using a dedicated tool all other leads can be soldered in one operation within 2 to 5 seconds between 270 and 320 C Philips Semiconductors Product specification LCD controllers drivers 2113 20 5 Suitability of surface mount packages for wave and reflow soldering methods SOLDERING METHOD PACKAGE WAVE BGA 1 SQFP TFBGA not suitable suitable HSQFP HSOP HTSSOP SMS not suitable suitable SO SOJ suitable suitable LQFP QFP TQFP not recommended suitable SSOP TSSOP VSO not recommended suitable Notes 1 All surface mount SMD packages are moisture sensitive Depending upon the moisture content the maximum temperature with respect to time and body size of the package there is a risk that internal or external package cracks may occur due to vaporization of the moisture in them the so called popcorn effect For details refer to the Drypack information in the Data Handbook 26 Integrated Circuit Packages Section Packing Methods These packages are not suitable for wave soldering as a solder joint between the printed circuit board and heatsink at bottom version can not be achieved and as solder may stick to the heatsink on top version If wave soldering is considered
23. 4 bit application DB3 to DBO should be left open circuit internal pull ups Hence in the first function instruction after power on M SL and H are set to logic 1 A second function set must then be sent 2 nibbles to set M SL and H to their required values Function set from the 2 interface sets the DL bit to logic 1 8 6 2 BIT M Selects either 1 line by 24 display M 0 or 2 line by 12 display M 1 8 6 3 BIT SL Selects MUX 1 9 1 line by 12 display independent of M and L Only rows 1 to 8 and 17 are to be used All other rows must be left open circuit The DDRAM map is the same as in the 2 line by 12 display mode however the second line cannot be displayed Philips Semiconductors LCD controllers drivers 8 6 4 BIT H When 0 chip can be programmed the standard 11 instruction codes used in the PCF2116 and other LCD controllers When H 1 the extended range of instructions will be used These are mainly for controlling the display configuration and the icons 8 7 Set CGRAM address Set CGRAM address sets bits DB5 to 0 of the CGRAM address into the address counter binary A5 to 0 Data can then be written to or read from the CGRAM Attention the CGRAM address uses the same address register as the DDRAM address and consists of 7 bits binary A6 to AO With the set CGRAM address command only bits DB5 to DBO are set Bit DB6 can be set using the set D
24. 48 Product specification Philips Semiconductors PCF2113x LCD controllers drivers OMHOHOIN 0 O L 0 0 L INVHQQ NVHOO 0 02 61016 AN NW L 0 L L 0 0 L 0 0 L INVHOQ INVHOO vi eoeds 0 0 0 0 0 L 0 0 0 L INVHQQ NVHOO I JO eui 16 145 10 sies L L L 0 0 0 0 0 0 0 195 21 5 SOJUM L L 0 0 L 0 L 0 0 L INVHOQ NVHOO LE 010 H 0 0 0 L 0 0 L 0 0 L INVHQQ NVHOO 9 o1 p y ys pue q peiueuJeJoul SI JOSINO y 1e uonezi eniur q pejoejes ueeq seu 24 d 0 0 0 0 0 0 0 INVHQQ NVHOO 01 6 jou 81 0 y JO euim 1e y 01 105110 eui 0 pue Aq JUSWISIOUI 5195 i 0 L L 0 0 0 0 0 0 0 195 r Jaye xuelg si Aejdsip pue e dsip uo 0 0 0 o4uoo Kejdsip 004 0 0 0 0 L L 0 0 0 0 pue eldsip sjoajas 0 14 8 0 sies odd iga zga ega vad Sad 9ga SH 19 19591 sjeedde Aejdsip ou
25. DB4 to DBO of CGRAM data are valid bits DB7 to DB5 are don t care 8 11 Read data from CGRAM or DDRAM Read data reads binary 8 bit data DB7 to from the CGRAM or DDRAM The most recent set address command determines whether the CGRAM or DDRAM is to be read The read data instruction gates the content of the Data Register DR to the bus while pin E is HIGH After pin E goes LOW again internal operation increments or decrements the AC and stores RAM data corresponding to the new AC into the DR There are only three instructions that update the data register Set CGRAM address Set DDRAM address Read data from CGRAM or DDRAM Other instructions e g write data cursor display shift clear display and return home do not modify the data register content 9 EXTENDED FUNCTION SET INSTRUCTIONS AND FEATURES 9 1 New instructions 1 sets the chip into alternate instruction set mode 9 2 The 2113 can drive up to 120 icons See Fig 16 for CGRAM to icon mapping Icon control Philips Semiconductors Product specification LCD controllers drivers 2113 display COL 1 to 5 COL 6 to 10 COL 56 to 60 ROW17 1112131415 6 7 8 9110 56 57 58 59 60 ROW 18 61 62 64 65 66 67 68 69 70 116 117 118 119 120 MGE999 block of 5
26. LQFP100 version this signal is connected internally and can be accessed at any pin 4 When the I C bus is used the parallel interface pin E must be LOW In the IC bus read mode DB7 to DBO should be connected to or left open circuit When the parallel bus is used the pins SCL and SDA must be connected to Vss or Vpp1 they must not be left open circuit When the 4 bit interface is used without reading out from the PCF2113x R W is set permanently to logic 0 the unused ports to DB4 can either be set to Vss or Vpp instead of leaving them open circuit 5 DB7 may be used as the busy flag signalling that internal operations are not yet completed In 4 bit operations the four higher order lines DB7 to 084 are used DB3 to DBO must be left open circuit except for I2C bus operations see note 4 6 and should always be equal 7 When is generated internally pins and Vi must be connected together When external Vicp is supplied pin Vi cpo should be left open circuit to avoid any stray current pins Vi Vicpsense must be connected together 2001 Dec 19 7 Philips Semiconductors Product specification LCD controllers drivers PCF2113x lt Q O lt m m m m m QO rr 0 8
27. When 1 the entire display shifts either to the right I D 0 or to the left I D 1 during DDRAM write Thus it appears as if the cursor stands still and the display moves The display does not shift when reading from the DDRAM or when writing to or reading from the CGRAM When 0 the display does not shift 8 4 Display control and partial Power down mode 8 4 1 BIT D The display is on when D 1 and off when D 0 Display data in the DDRAM is not affected and can be displayed immediately by setting D 1 When the display is off D 0 the chip is in partial Power down mode The LCD outputs are connected to Vss The LCD generator and bias generator are turned off Three oscillator cycles are required after sending the display off instruction to ensure all outputs are at Vss afterwards the oscillator can be stopped If the oscillator is running during partial Power down mode display off the chip can still execute instructions Even lower current consumption is obtained by inhibiting the oscillator OSC Vss To ensure lt 1 uA the parallel bus pins DB7 to DBO should be connected to Vpp pins RS and R W to Vpp left open circuit and pin PD to Vpp Recovery from Power down mode PD back to Vss if necessary OSC back to Vpp and send a display control instruction with D 1 8 4 2 BIT C The cursor is displayed when C 1 and inhibited when C 0 Even if the cursor disap
28. address bits 0 to 2 designate the character pattern line position The 8th line is the cursor position and display is performed by logical OR with the cursor Data in the 8th position will appear in the cursor position Character pattern column positions correspond to CGRAM data bits 0 to 4 as shown in this figure As shown in Figs 7 and 8 CGRAM character patterns are selected when character code bits 4 to 7 are all logic 0 CGRAM data logic 1 corresponds to selection for display Only bits 0 to 5 of the CGRAM address are set by the set CGRAM address command Bit 6 can be set using the set DDRAM address command in the valid address range or by using the auto increment feature during CGRAM write All bits 0 to 6 can be read using the read busy flag and address counter command Fig 11 Relationship between CGRAM addresses data and display patterns 2001 Dec 19 17 Philips Semiconductors Product specification LCD controllers drivers 2113 frame gt lt frame n 1 state 1 ON 2 OFF VS OFF 2 0 0 0 0 8 1 ROW 1 V3 V4 R2 V5 0 0 0 0 Vss 9 0 0 0 0 4 3 0 0 0 0 R5 6 0 0 0 R6 j 0 0 0 R7 4 0 0 0 8 8 ROW9 VgN4 ROW2 V3 V4 Vs Vss CD Vo COL1 V3 V4 V5 Vss Vo COL2 V3 V4 ig V5 Vss
29. chip has the state shown in Table 3 Table 3 State after reset STEP FUNCTION CONTROL BIT STATE CONDITIONS clear display entry mode set 1 increment display control cursor off cursor character blink off function set 8 bit interface MUX 1 18 mode default address pointer to DDRAM the Busy Flag BF indicates the busy state BF 1 until initialization ends the busy state lasts 2 ms the chip may also be initialized by software see Tables 17 and 18 icon control IM 0 0 0 icons icon blink and direct mode disabled display screen gontiguraton L 0 P 0 Q 0 default configurations set Vi cp 0 generator off I C bus interface reset Set HVgen stages 51 1 580 0 generator voltage multiplier set at factor 4 2001 Dec 19 22 Philips Semiconductors LCD controllers drivers 8 INSTRUCTIONS Only two PCF21 13x registers the Instruction Register IR and the Data Register DR can be directly controlled by the microcontroller Before internal operation control information is stored temporarily in these registers to allow interfacing to various types of microcontrollers which operate at different speeds or to allow interface to peripheral control ICs The instruction set for 12C bus commands is given in Table 4 The PCF21 13x operation is controlled by the instructions shown in Table 5 together with their execution time Details are explained
30. data buses 7 15 LCD row and column drivers The PCF21 13x contains 18 row and 60 column drivers which connect the appropriate LCD bias voltages in sequence to the display in accordance with the data to be displayed R17 and R18 drive the icon rows The bias voltages and the timing are selected automatically when the number of lines in the display is selected Figures 12 13 14 and 15 show typical waveforms Unused outputs should be left unconnected cursor 5 x 7 dot character font cursor display example MGA801 alternating display blink display example Fig 6 Cursor and blink display examples 2001 Dec 19 Philips Semiconductors Product specification LCD controllers drivers 2113 lower 4 bits 0000 0001 0010 0011 0100 0101 0110 0111 1000 1001 1010 1011 1100 1101 1110 1111 4 bits 0000 1 D Te mE Pr 0011 4 EE TE VL MIS s Hemd dmg un DEDE E 200 SC cT 1000 9 c 4 p i 2 xxxx 1001 10 i P 5 1011 12 10 dus e Ti pos 3 xx com Eme 53 1110 15 E i
31. first line has been written Thus if there are only 8 characters in the first line the DDRAM address must be set after the 8th character is completed see Table 15 It should be noted that both lines of the display are always shifted together data does not shift from one line to the other 16 5 12C bus operation 1 line display A control byte is required with most commands see Table 16 Table 12 4 bit operation 1 line display example using internal reset INSTRUCTION DISPLAY OPERATION power supply on PCF21 13x is initialized by the internal reset initialized no display appears function set RW DB7 0 0 086 085 0 0 1 sets to 4 bit operation in this instance operation is handled as 8 bits by initialization and only this instruction completes with one write function set display control sets to 4 bit operation selects 1 line display and 4 bit operation starts from this point and resetting is needed 0 0 turns on display and cursor entire display is 0 0 blank after initialization 5 entry mode set 0 0 0 0 0 0 a sets mode to increment the address by 1 and to 0 0 0 1 1 0 shift the cursor to the right at the time of write to the DD CGRAM display is not shifted 6 write data ta CGRAM DDRAM 1 0 0 1 0 1 P writes P the DDRAM has already been selected 1 0 0 0 0 0 by initialization at power on the cursor is incremented by 1 and shifted to the right 2001 Dec 19
32. in subsequent sections Instructions are of 4 types those that 1 Designate PCF2113x functions such as display format data length etcetera 2 Setinternal RAM addresses 3 Perform data transfer with internal RAM 4 Others Instruction set for 12 5 commands CONTROL BYTE Table 4 COMMAND BYTE Product specification PCF2113x In normal use category 3 instructions are used most frequently However automatic incrementing by 1 or decrementing by 1 of internal RAM addresses after each data write lessens the microcontroller program load The display shift in particular can be performed concurrently with display data write enabling the designer to develop systems in minimum time with maximum programming efficiency During internal operation no instructions other than the read busy flag and read address instructions will be executed Because the busy flag is setto alogic 1 while an instruction is being executed check to ensure it is a logic O before sending the next instruction or wait for the maximum instruction execution time as given in Table 5 An instruction sent while the busy flag is logic 1 will not be executed I C BUS COMMANDS Co 5 0 0 0 0 0 0 Note 1 R W is set together with the slave address 2001 Dec 19 DB7 086 DB5 DB4 DB3 DB2 DBO note 1 Product specification Philips Semiconductors PCF2113x LCD controllers drivers 5195
33. then the package must be placed at a 45 angle to the solder wave direction The package footprint must incorporate solder thieves downstream and at the side corners Wave soldering is only suitable for LQFP and packages with a pitch e equal to or larger than 0 8 mm it is definitely not suitable for packages with a pitch e equal to or smaller than 0 65 mm Wave soldering is only suitable for SSOP and TSSOP packages with a pitch e equal to or larger than 0 65 mm it is definitely not suitable for packages with a pitch e equal to or smaller than 0 5 mm 2001 Dec 19 66 Philips Semiconductors LCD controllers drivers 21 DATA SHEET STATUS PRODUCT DATA SHEET STATUS STATUS Product specification PCF2113x DEFINITIONS 0 Objective specification Development This data sheet contains the design target or goal specifications for product development Specification may change in any manner without notice Preliminary specification Qualification This data sheet contains preliminary data and supplementary data will be published at a later date Philips Semiconductors reserves the right to make changes at any time without notice in order to improve design and supply the best possible product Product specification Production This data sheet contains final specifications Philips Semiconductors reserves the right to make changes at any time without notice in order to improve design and supply
34. which the die is used 2001 Dec 19 Philips Semiconductors Product specification LCD controllers drivers PCF2113x 25 PURCHASE OF PHILIPS 12 COMPONENTS Purchase of Philips 2 components conveys a license under the Philips 2 patent to use the components in the 12 system provided the system conforms to the 12 specification defined by Philips This specification can be ordered using the code 9398 393 40011 2001 Dec 19 68 Philips Semiconductors Product specification LCD controllers drivers PCF2113x NOTES 2001 Dec 19 69 Philips Semiconductors Product specification LCD controllers drivers PCF2113x NOTES 2001 Dec 19 70 Philips Semiconductors Product specification LCD controllers drivers PCF2113x NOTES 2001 Dec 19 71 Philips Semiconductors a worldwide company Contact information For additional information please visit http www semiconductors philips com Fax 31 40 27 24825 For sales offices addresses send e mail to sales addresses www semiconductors philips com Koninklijke Philips Electronics N V 2001 SCA73 All rights are reserved Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner The information presented in this document does not form part of any quotation or contract is believed to be accurate and reliable and may be changed without notice No liability will be a
35. 1 Dec 19 4 Philips Semiconductors Product specification LCD controllers drivers PCF2113x 5 BLOCK DIAGRAM C1 to C60 to R18 4 60 BIAS COLUMN DRIVERS VLCD1 VOLTAGE GENERATOR 60 DATA LATCHES V LCDSENSE 760 2 OSCILLATOR OSC CURSOR AND DATA CONTROL VDD1 Vpp2 CHARACTER CHARACTER GENERATOR GENERATOR Vpp3 RAM 128 x 5 ROM CGRAM CGROM 16 CHARACTERS 240 CHARACTERS TIMING GENERATOR Vss1 Vss2 Ti DISPLAY DATA RAM DDRAM PD 80 CHARACTERS BYTES DISPLAY ADDRESS COUNTER INSTRUCTION DECODER PCF2113x DATA REGISTER INSTRUCTION DR REGISTER IR POWER ON RESET Gi DBOtoDB3 SA0 0840087 RS SCL SDA GERR Fig 1 Block diagram 2001 Dec 19 5 Philips Semiconductors LCD controllers drivers 6 PINNING SYMBOL PAD PCF2113XU PIN PCF2113DH Product specification PCF2113x TYPE DESCRIPTION P supply voltage 1 for all except Vicp generator oscillator external clock input note 2 power down select input for normal operation PD is LOW test open circuit and not user accessible Vss2 Vicp2 9 P ground 2 for V cp generator O output if Vi cp is generated internally note 7 VLCDSENSE Vicot 9 to 16 input Vi cp for voltage multiplier regulation notes 3 and 7 input for generation of LCD bias levels note 7
36. 1 and 3 Cb capacitive bus line load _ 300 400 tSU STA set up time for a repeated START condition START condition hold time 2001 Dec 19 41 us Philips Semiconductors Product specification LCD controllers drivers PCF2113x SYMBOL PARAMETER CONDITIONS UNIT STO set up time for STOP condition tolerable spike width on bus bus free time between STOP and START condition Notes 1 Tested on sample base 2 Alltiming values are valid within the operating supply voltage and ambient temperature range and are referenced to Vit and with an input voltage swing of Vss to Vpp 3 total capacitance of one bus line in pF RS RAN tau h D VIH1 valid data 080 to 087 gt MBK474 Fig 27 Parallel bus write operation sequence writing data from microcontroller to 2113 2001 Dec 19 42 Philips Semiconductors Product specification LCD controllers drivers 2113 DBO to DB7 MBK475 Fig 28 Parallel bus read operation sequence writing data from 2113 to microcontroller SDA SCL lt HD STA tHD DAT tHIGH SU DAT SDA tou MGA728 SUSTA tsu sTo Fig 29 12C bus timing diagram 2001 Dec 19 43 Philips Semiconductors LCD controllers drivers 15 DEVICE PROTECTION CIRCUITS Product specification
37. 16 PLUS 120 ICONS PCF2113x 100 nF C1 to C60 Vss 087 to DBO RS RW MGG007 Fig 32 Typical application using parallel interface 2001 Dec 19 46 Philips Semiconductors Product specification LCD controllers drivers 2113 osc DB3 SAO R17 R18 VDD VDD R1 to R16 2 x 12 CHARACTER LCD DISPLAY 16 PLUS 120 ICONS PCF2113x 100 VLCD C1 to C60 Vss VSS scL SDA Vss osc DB3 SAO R17 R18 R1 to R16 1 x 24 CHARACTER LCD DISPLAY 16 PLUS 120 ICONS PCF2113x VLCD C1 to C60 Vss VSS SDA SCL SDA MASTER TRANSMITTER PCF84C81A P80CL410 MGG008 Fig 33 Application using I C bus interface 16 1 General application information Optimized values for these tracks are below 50 Q for the supply and below 100 Q for the I O connections Higher track resistance reduce performance and increase current consumption The required minimum value for the external capacitors in an application with the PCF2113x are Cg for Vi cp Vss 100 nF min for Vpp Vss 470 nF Higher capacitor values are recommended for ripple reduction To avoid accidental triggering of Power on reset especially in COG applications the supplies must be adequately decoupled Depending on power supply quality Vpp4 may have to be risen above the specified minimum For COG applications
38. 5 Power on reset The on chip Power on reset block initializes the chip after power on or power failure This is a synchronous reset and requires 3 oscillator cycles to be executed 7 6 Power down mode The chip can be put into Power down mode by applying an external active HIGH level to the PD pin In Power down mode all static currents are switched off no internal oscillator no bias level generation and all LCD outputs are internally connected to Vss During power down information in the RAMs and the state are preserved Instruction execution during power down is possible when pin OSC is externally clocked 7 7 Registers The PCF21 13x has two 8 bit registers an Instruction Register IR and a Data Register DR The Register Select RS signal determines which register will be accessed The instruction register stores instruction codes such as display clear cursor shift and address information for the Display Data RAM DDRAM and Character Generator RAM CGRAM The instruction register can be written to but not read from by the system controller Table 2 Address space and wrap around operation Product specification PCF2113x The data register temporarily stores data to be read from the DDRAM and CGRAM When reading data from the DDRAM or CGRAM corresponding to the address in the instruction register is written to the data register prior to being read by the read data instruction 7 8 Busy fl
39. 630 1355 C2 85 1630 1255 a ele ele ele Oo cO NIN l o gt 2001 Dec 19 60 Philips Semiconductors LCD controllers drivers SYMBOL COORDINATES X Y Product specification 2113 C1 R8 1630 1185 1115 COORDINATES SYMBOL PAD X Y 101 1630 215 1045 102 1630 103 1630 104 105 106 107 1630 555 108 1630 VDD2 109 1630 VpD3 110 1630 R W 2001 Dec 19 dummy pad 7 111 1630 dummy pad 8 112 1465 1 All x and y coordinates are referenced to centre of chip and dimensions are in um see Fig 34 Philips Semiconductors LCD controllers drivers dummy pad 5 C8 21 22 C23 C24 C25 C26 C27 Product specification dummy pad 4 83 80 81 82 79 77 76 65 64 63 62 61 60 59 58 57 dummy pad 6 Jg tug tuUtt Vpp2 dummy pad 7 PC2113x
40. DRAM address command first or by using the auto increment feature during CGRAM write All bits DB6 to DBO can be read using the read busy flag and read address command When writing to the lower part of the CGRAM ensure that bit DB6 of the address is not set e g by an earlier DDRAM write or read action 8 8 Set DDRAM address Set DDRAM address sets the DDRAM address App into the address counter binary A6 to AO Data can then be written to or read from the DDRAM 8 9 Read busy flag and read address Read busy flag and address counter read the Busy Flag BF and Address Counter AC BF 1 indicates that an internal operation is in progress The next instruction will not be executed until BF 0 It is recommended that the BF status is checked before the next write operation is executed At the same time the value of the address counter expressed in binary to is read out The address counter is used by both CGRAM and DDRAM and its value is determined by the previous instruction 2001 Dec 19 28 Product specification PCF2113x 8 10 Write data to CGRAM or DDRAM Write data writes binary 8 bit data DB7 to to the CGRAM or the DDRAM Whether the CGRAM or DDRAM is to be written into is determined by the previous set CGRAM address or set DDRAM address command After writing the address automatically increments or decrements by 1 in accordance with the entry mode Only bits
41. Direct mode Voltage multiplier control Screen configuration Display configuration Temperature control Set Vi cp Reducing current consumption INTERFACES TO MICROCONTROLLER Parallel interface I2C bus interface LIMITING VALUES HANDLING INSTRUCTIONS DC CHARACTERISTICS AC CHARACTERISTICS DEVICE PROTECTION CIRCUITS APPLICATION INFORMATION General application information 4 bit operation 1 line display using internal reset 8 bit operation 1 line display using internal reset 8 bit operation 2 line display 2 operation 1 line display BONDING PAD INFORMATION TRAY INFORMATION PACKAGE OUTLINE SOLDERING Introduction to soldering surface mount packages Reflow soldering Wave soldering Manual soldering Suitability of surface mount IC packages for wave and reflow soldering methods DATA SHEET STATUS DEFINITIONS DISCLAIMERS BARE DIE DISCLAIMER PURCHASE OF PHILIPS 12C COMPONENTS Philips Semiconductors 1 LCD controllers drivers FEATURES Single chip LCD controller driver 2 line display of up to 12 characters 120 icons or 1 line display of up to 24 characters 120 icons 5 x 7 character format plus cursor 5 x 8 for kana Japanese and user defined symbols Icon mode reduced current consumption while displaying Icon blink function On chip Configurable 4 3 or 2 voltage multiplier generating LCD supply voltage independent of Vpp programmable by instruction external supp
42. LCD bias voltage generator The intermediate bias voltages for the LCD display are also generated on chip This removes the need for an external resistive bias chain and significantly reduces the System current consumption The optimum value of Vi cp depends on the multiplex rate the LCD threshold voltage and the number of bias levels Using a 5 level bias scheme for 1 18 maximum rate allows Vi lt 5 V for most LCD liquids The intermediate bias levels for the different multiplex rates are shown in Table 1 These bias levels are automatically set to the given values when Switching to the corresponding multiplex rate Table 1 Bias levels as a function of multiplex rate note 1 MULTIPLEX NUMBER RATE OF LEVELS V2 Va Vs Ve 1 18 5 3 4 1 2 1 2 1 4 Vss Note 1 The values in the table are given relative to Vi cp Vss e g 3 4 means 3 4 Vicp Vss 2001 Dec 19 Philips Semiconductors LCD controllers drivers 7 3 Oscillator The on chip oscillator provides the clock signal for the display system No external components are required and the OSC pin must be connected to Vpp1 7 4 External clock If an external clock is to be used this input is at the OSC pin The resulting display frame frequency is given by _ fosc frame 3072 Only in the Power down mode is the clock allowed to be stopped OSC connected to Vss otherwise the LCD is frozen in a DC state 7
43. M addresses the character pattern for character code 20H must be a blank pattern sets the DDRAM address counter to logic 0 and returns the display to its original position if it was shifted Thus the display disappears and the cursor or blink position goes to the left edge of the display Sets entry mode 1 increment mode S of entry mode does not change The instruction clear display requires extra execution time This may be allowed by checking the Busy Flag BF or by waiting until the 165 clock cycles have elapsed The latter must be applied where no read back options are foreseen as in some Chip On Glass applications 2001 Dec 19 IM character mode full display icon mode only icons displayed DM set Vp 8 2 Return home Return home sets the DDRAM address counter to logic 0 and returns the display to its original position if it was shifted DDRAM contents do not change The cursor or blink position goes to the left of the first display line and S of entry mode do not change Philips Semiconductors LCD controllers drivers 8 3 Entry mode set 8 3 1 BIT I D When I D 1 0 the DDRAM or CGRAM address increments decrements by 1 when data is written into or read from the DDRAM or CGRAM The cursor or blink position moves to the right when incremented and to the left when decremented The cursor underline and cursor character blink are inhibited when the CGRAM is accessed 8 3 2 BIT S
44. ag The busy flag indicates the internal status of the PCF2113x A logic 1 indicates that the chip is busy and further instructions will not be accepted The busy flag is output to pin DB7 when bit RS 0 and bit R W 1 Instructions should only be written after checking that the busy flag is at logic 0 or waiting for the required number of cycles 7 9 Address Counter The address counter assigns addresses to the DDRAM and CGRAM for reading and writing and is set by the commands set CGRAM address and set DDRAM address After a read write operation the address counter is automatically incremented or decremented by 1 The address counter contents are output to the bus DB6 to DBO when bit RS 0 and bit R W 1 7 10 Display Data RAM DDRAM The DDRAM stores up to 80 characters of display data represented by 8 bit character codes RAM locations which are not used for storing display data can be used as general purpose RAM The basic RAM to display addressing scheme is shown in Fig 3 With no display shift the characters represented by the codes in the first 24 RAM locations starting at address OOH in line 1 are displayed Figures 4 and 5 show the display mapping for right and left shift respectively When data is written to or read from the DDRAM wrap around occurs from the end of one line to the start of the next line When the display is shifted each line wraps around within itself independently of the others T
45. applications do so at their own risk and agree to fully indemnify Philips Semiconductors for any damages resulting from such application Right to make changes Philips Semiconductors reserves the right to make changes without notice in the products including circuits standard cells and or software described or contained herein in order to improve design and or performance Philips Semiconductors assumes no responsibility or liability for the use of any of these products conveys no licence or title under any patent copyright or mask work right to these products and makes no representations or warranties that these products are free from patent copyright or mask work right infringement unless otherwise specified All die are tested and are guaranteed to comply with all data sheet limits up to the point of wafer sawing for a period of ninety 90 days from the date of Philips delivery If there are data sheet limits not guaranteed these will be separately indicated in the data sheet There are no post packing tests performed on individual die or wafer Philips Semiconductors has no control of third party procedures in the sawing handling packing or assembly of the die Accordingly Philips Semiconductors assumes no liability for device functionality or performance of the die or systems after third party sawing handling packing or assembly of the die It is the responsibility of the customer to test and qualify their application in
46. ast control byte see Table 4 another control byte follows after data command DL 4 bits 8 bits if SL 1 1 line by 24 display 2 line by 12 display MUX 1 18 1 24 or 2 x 12 character display MUX 1 9 1 x 12 character display use basic instruction set use extended instruction set decrement increment display freeze display shift position does not blink display off display on cursor off cursor on cursor character blink off character at cursor cursor character blink on character at cursor position blinks cursor move display shift left shift right shift L no impact left right screen standard connection left right screen mirrored connection if M 1 SL 1 from 1 to 60 151 12 characters of 24 columns are from 1 to 60 1st 12 characters of 24 columns are from 1 to 60 2nd 12 characters of 24 column data left to right column data is displayed column data right to left column data is displayed columns are from 1 to 60 2nd 12 characters of 24 columns are from 60 to 1 from 60 to 1 row data top to bottom row data is displayed from 1 to 16 and icon row data is in 17 and 18 row data bottom to top row data is displayed from 16 to 1 and icon row data is in 18 and 17 direct mode disabled direct mode enabled Set VA 8 1 Clear display Clear display writes character code 20H into all DDRA
47. bled Icon data is stored in CGRAM character 0 to 2 3 x 8 x 5 120 bits for 120 icons When IB 1 the icon blink is enabled In this case each icon is controlled by two bits Blink consists of two half phases corresponding to the cursor on and off phases called even and odd phases hereafter Icon states for the even phase are stored in CGRAM characters 0 to 2 3 x 8 x 5 120 bits for 120 icons These bits also define icon state when icon blink is not used see Table 9 Icon states for the odd phase are stored in CGRAM character 4 to 6 another 120 bits for the 120 icons When icon blink is disabled CGRAM characters 4 to 6 may be used as normal CGRAM characters 9 5 Direct mode When DM 0 the chip is not in the direct mode Either the internal Vi cp generator or an external voltage may be used to achieve cp Table 9 Blink effect for icons and cursor character blink PARAMETER EVEN PHASE Product specification PCF2113x When DM 1 the chip is in direct mode The internal Vi cp generator is turned off and the Vi cp2 output is directly connected to the Vi cp generator supply voltage Vppo The direct mode can be used to reduce the current consumption when the required Vi cp output voltage is close to the supply voltage This can be the case in icon mode or in Mux 1 9 depending on LCD liquid properties 9 6 Voltage multiplier control Bits 1 and SO A software configurable voltage multiplier
48. bus pins SDA and SCL LOW level input voltage HIGH level input voltage input leakage current Vi or Vss input capacitance note 6 loL SDA LOW level output current on 0 4 V Vppi gt 2 V pin SDA 0 2 lt 2 V LCD outputs Ro Row row output resistance of pins R1 to R18 Ro coL column output resistance of pins C1 to C60 Vbias tol bias voltage tolerance on pins R1 to R18 and C1 to C60 Vicpeeo voltage tolerance 25 note 5 Vicp lt 3V Vico lt 5V lt 6 V TCO Vicp temperature coefficient 0 0 16 2 Vicp temperature coefficient 2 0 21 K Notes Spikes Vpp or which cause Vpp1 Vssi lt 1 6 V can cause a Power on reset Resets all logic when Vpp4 lt OSC cycles required LCD outputs are open circuit inputs at or bus inactive 25 C fosc 200 kHz LCD outputs are open circuit Vi cp generator is on load current 5 at Vicp Tested on sample basis ROM os 9 or ES Resistance of output pins R1 to R18 and C1 to C60 with a load current of 10 outputs measured one at a time external 3 V Vpp1 2 3 V 8 LCD outputs open circuit external Vi cp 2001 Dec 19 40 Philips Semiconductors LCD controllers drivers 14 AC CHARACTERISTICS Product specification
49. ccepted by the publisher for any consequence of its use Publication thereof does not convey nor imply any license under patent or other industrial or intellectual property rights Printed in The Netherlands 403502 03 pp72 Date of release 2001 Dec 19 Document order number 9397 750 06995 4 make things better iD S amp PHILIPS
50. columns icon no phase ROW COL character codes CGRAM address CGRAM data icon view 7 6 5 43 2 1 0 6 5 43 2 1 0 4 3 2 1 MSB LSB 1 5 een 171 5 00000000 00000000 00000000 1 1 1 1 56 60 17 56 60 0000000 0000000 odd blink 18 56 60 MGGO001 CGRAM data bit logic 1 turns the icon on data bit logic 0 turns the icon off Data in character codes 0 to 3 define the icon state when icon blink is disabled or during the even phase when icon blink is enabled Data in character codes 4 to 7 define the icon state during the odd phase when icon blink is enabled not used for icons when icon blink is disabled Fig 16 CGRAM to icon mapping 2001 Dec 19 29 Philips Semiconductors LCD controllers drivers 9 3 BitIM When 0 the chip is in character mode In the character mode characters and icons are driven MUX 1 18 The Vi cp generator if used produces the Vicp voltage programmed in register Va When IM 1 the chip is in icon mode In the icon mode only the icons are driven MUX 1 2 and the Vi cp generator if used produces the V cp voltage as programmed in register Vg Table 7 Normal icon mode operation MODE Vic character mode generates VA 1 icon mode generates Vp 94 Icon blink control is independent of the cursor character blink function When IB 0 the icon blink is disa
51. e orientation of the IC in a pocket is indicated by the position of the IC type name on the die surface with respect to the chamfer on the upper left corner of the tray Refer to the bonding pad location diagram for the orientating and position of the type name on the die surface Pad size aluminium 62 x 100 Passivation opening CBB 36 x 76 um Wafer thickness 380 25 um m Height difference in one die 2 um Convex deformation 5 um um Fig 36 Tray alignment 2001 Dec 19 63 Philips Semiconductors LCD controllers drivers 19 PACKAGE OUTLINE LQFP100 plastic low profile quad flat package 100 leads body 14 x 14 x 1 4 Product specification PCF2113x SOT407 1 DIMENSIONS mm are the original dimensions detail X UNIT A2 1 45 1 35 Note 1 Plastic or metal protrusions of 0 25 mm maximum per side are not included OUTLINE VERSION REFERENCES IEC JEDEC PROJECTION ISSUE DATE SOT407 1 136E20 MS 026 ege 00 049 00 02 01 2001 Dec 19 64 Philips Semiconductors LCD controllers drivers 20 SOLDERING 20 1 Introduction to solder
52. ejdsip eunue 1051n9 pue uo Jo pue Aejdsip sioejes 110 8 01 5195 0 0 0 195 0 0 0 0 041009 ejdsip 0 L 0 L L 0 0 0 0 ega rga Sad 9 Wd 19 uonounj sjeedde Aejdsip ou NOILVH3dO 19591 Aq S xe 249 Ajddns 18mod NOILONEHLSNI 4315 19591 Aejdsip eui z 16 8 SI 53 2001 Dec 19 Product specification Philips Semiconductors PCF2113x LCD controllers drivers 0 sseuppe uonisod eu 0 40s4no pue Aejdsip JIUS puooes pue 16 y eui 0 s ejdsip JO euin y ye 1145 ejdsip 5195 OOOHOIN 0 0 0 uJnje4 0 0 0 INVHOQ INVHOO 0 0 0 0 0 INVHOQ INVHOO O NOILONEHLSNI 54 2001 Dec 19 Product specification Philips Semiconductors 2113 LCD controllers drivers eu 0 pue pejueulaJoul 1 10S1N9 eu dn Jemod ueeq seu 94 S HM H d L 0
53. en the bus is not busy Each byte of eight bits is followed by an acknowledge bit The acknowledge bit is a HIGH level signal put on the bus by the transmitter during which time the master generates an extra acknowledge related clock pulse A slave receiver which is addressed must generate an acknowledge after the reception of each byte Also a master receiver must generate an acknowledge after the reception of each byte that has been clocked out of the slave transmitter The device that acknowledges must pull down the SDA line during the acknowledge clock pulse so that the SDA line is stable LOW during the HIGH period of the acknowledge related clock pulse set up and hold times must be taken into consideration RS RW D Ww instruction write ZA KE busy flag and address counter read data register read MGA804 Fig 17 4 bit transfer example 2001 Dec 19 32 Philips Semiconductors Product specification LCD controllers drivers 2113 internal operation X 08 XZ instruction flag flag instruction write check check write MGA805 IR7 IR3 instruction 7th 3rd bit AC3 address counter 3rd bit D7 data 7th 3rd bit Fig 18 An example of 4 bit data transfer timing sequence internal instruction busy flag busy flag busy flag instruction write check check c
54. ge note 1 generator supply voltages LCD supply voltage internal Vi cp generation and lt Vi cp Power on reset voltage note 1 and 2 GROUND SUPPLY CURRENT EXTERNAL Vi cp note 3 1551 ground supply current 1 ground supply current 3 Vpp 3 V Vi cp 5 V note 4 ground supply current 4 icon mode Vpp 3 V 2 5 V note 4 ground supply current 5 Power down mode 3 V 2 5 DB7 to RS R W 1 OSC 0 1 GROUND SUPPLY CURRENT INTERNAL Vi cp notes 3 5 ground supply current 6 ground supply current 8 ground supply current 9 190 400 3 V 5 V note 4 160 400 icon mode Vpp 2 5 V Vicp 2 5 V note 4 LOW level input voltage VIH OSC HIGH level input voltage LOW level input voltage pin OSC HIGH level voltage pin OSC V LOW level output current on pins DB7 to DBO HIGH level output current on pins DB7 to DBO VoL 0 4 V Voot 5V 4 Vi 5 V Vpp1 pull up current at pins DB7 to DBO leakage current Vi Vi Vss 1 uA 1 uA 2001 Dec 19 39 Philips Semiconductors Product specification LCD controllers drivers 2113 SYMBOL PARAMETER CONDITIONS I C
55. heck write MGA806 Fig 19 Example of busy flag checking timing sequence 2001 Dec 19 33 Philips Semiconductors LCD controllers drivers master receiver must signal an end of data to the transmitter by not generating an acknowledge bit on the last byte that has been clocked out of the slave In this event the transmitter must leave the data line HIGH to enable the master to generate a STOP condition 10 2 1 2 5 PROTOCOL Before any data is transmitted on the 2 the device which should respond is addressed first The addressing is always carried out with the first byte transmitted after the START procedure The 2 configuration for the different PCF2113x read and write cycles is shown in Figs 24 to 26 The slow down feature of the I2C bus protocol receiver holds SCL LOW during internal operations is not used in the PCF2113x Product specification PCF2113x 10 2 2 DEFINITIONS Transmitter the device which sends the data to the bus Receiver the device which receives the data from the bus Master the device which initiates a transfer generates clock signals and terminates a transfer Slave the device addressed by a master e Multi master more than one master can attempt to control the bus at the same time without corrupting the message Arbitration procedure to ensure that if more than one master simultaneously tries to control the bus only one is allowed to do so a
56. hus all lines are shifted and wrapped around together The address ranges and wrap around operations for the various modes are shown in Table 2 MODE Address space 1 24 00 to 4F 2 12 00 27 40 67 1 x 12 00 to 27 Read write wrap around moves to next line 4F to 00 27 to 40 67 to 00 27 to 00 Display shift wrap around stays within line 4F to 00 27 to 00 67 to 40 27 to 00 2001 Dec 19 Philips Semiconductors Product specification LCD controllers drivers 2113 display non displayed DDRAM addresses position 12345 22 23 24 2 DDRAM 00 01 02 03 04 15 16 17 safe address 1 line display HT displayed DDRAM 12345 10 11 12 00 01 02 03 04 09 0 08 271 line 1 DDRAM address 12345 10 111 40 41 42 43 44 49 4 4 shel 671 2 2 line display Fig 3 DDRAM to display mapping no shift display position 1 23 4 5 22 23 24 address 1 line display 12345 10 11 12 27 00 01 02 03 08 09 0 line 1 DDRAM 23 45 10 11 12 address 2 line display 29 4 DDRAM to display mapping right shift display position 12345 22 23 24 DDRAM 91 92 03 04 05 16 17 18 address 1 line display 12345 10 11 12 01 02 03 04 05 oa
57. ing surface mount packages This text gives a very brief insight to a complex technology A more in depth account of soldering ICs can be found our Data Handbook 1 26 Integrated Circuit Packages document order number 9398 652 90011 There is no soldering method that is ideal for all surface mount IC packages Wave soldering can still be used for certain surface mount ICs but it is not suitable for fine pitch SMDs In these situations reflow soldering is recommended 20 2 Reflow soldering Reflow soldering requires solder paste a suspension of fine solder particles flux and binding agent to be applied to the printed circuit board by screen printing stencilling or pressure syringe dispensing before package placement Several methods exist for reflowing for example convection or convection infrared heating in a conveyor type oven Throughput times preheating soldering and cooling vary between 100 and 200 seconds depending on heating method Typical reflow peak temperatures range from 215 to 250 C The top surface temperature of the packages should preferable be kept below 220 C for thick large packages and below 235 C for small thin packages 20 3 Wave soldering Conventional single wave soldering is not recommended for surface mount devices SMDs or printed circuit boards with a high component density as solder bridging and non wetting can present major problems To overcome these problems the double
58. is incorporated in the Vi cp generator and can be set via the Set HVgen stages command The voltage multiplier control can be used to reduce current consumption by disconnecting internal voltage multiplier stages depending on the required VI cp output voltage see Table 8 Table 8 51 and 50 control of voltage multiplier DESCRIPTION Set Vi cp generator stages to 1 2 x voltage multiplier Set Vi cp generator stages to 2 8 x voltage multiplier Set Vi cp generator stages to 3 4 x voltage multiplier do not use 9 7 Screen configuration Bit L L 0 the two halves of a split screen are connected in a standard way i e column 1 61 2 62 to 60 120 default L 1 the two halves of a split screen are connected in a mirrored way i e column 1 120 2 119 to 60 61 This allows single layer PCB or glass layout ODD PHASE Cursor character blink block all on Icons state 1 CGRAM character 0 to 2 normal display character state 2 CGRAM character 4 to 6 2001 Dec 19 Philips Semiconductors LCD controllers drivers 9 8 Display configuration Bit P 0 default P 1 mirrors the column data Bit Q 0 default Q 1 mirrors the row data 9 9 Temperature control Default is TC1 0 and TC2 0 Selects the default temperature coefficient for the internally generated Vi cp see Table 10 The ranges for TC are given in Chapter 13 Table 10 TC1 and TC2 se
59. lection of Vi cp temperature coefficient TC1 DESCRIPTION 0 Vicp temperature coefficient 0 0 1 0 Vicp temperature coefficient 1 0 1 Vicp temperature coefficient 2 1 Vi temperature coefficient Product specification PCF2113x Vicp programming 1 Send function set instruction with H 1 2 Send set Vicp instruction to write to voltage register DB7 DB6 10 DB5 to DBO are Vi cp of character mode Va b DB7 DB6 11 DB5 to DBO are Vi cp of icon mode Vg c DB5 to DBO 000000 switches VI cp generator off when selected 2 During display off and power down the Vi cp generator is also disabled 3 Send function instruction with 0 to resume normal programming 9 11 Reducing current consumption Reducing current consumption can be achieved by one of the options given in Table 11 When lies outside Vpp range and must be generated it is usually more efficient to use the on chip generator than an external regulator Table 11 Reducing current consumption ORIGINAL MODE ALTERNATIVE MODE 9 10 Set The cp value is programmed by instruction Two on chip registers V4 and Vg hold V cp values for the character mode and the icon mode respectively The generated Vicp value is independent of Vpp allowing battery operation of the chip 2001 Dec 19 31 Character mode Icon mode control bit IM Display on Display off c
60. ly also possible Temperature compensation of on chip generated Vi cp 0 16 to 0 24 K programmable by instruction Generation of intermediate LCD bias voltages Oscillator requires no external components external clock also possible Display data RAM 80 characters Character generator ROM 240 5 x 8 characters Character generator RAM 16 5 x 8 characters 3 characters used to drive 120 icons 6 characters used if icon blink feature is used in application 4 or 8 bit parallel bus and 2 wire I C bus interface CMOS compatible 18 row and 60 column outputs Multiplex rates 1 18 for normal operation 1 9 for single line operation and 1 2 for icon only mode Uses common 11 code instruction set extended Logic supply voltage range Vpp 1 1 8 to 5 5 V chip may be driven with two battery cells Vicp generator supply voltage range Vss 2 2 to 4 0 V Display supply voltage range VI cp 552 2 2 to 6 5 V Direct mode to save current consumption for icon mode and 1 9 depending on value and LCD liquid properties Very low current consumption 20 to 200 uA Icon mode 25 uA Power down mode 2 uA 2001 Dec 19 Product specification PCF2113x BUS i 1 1 Note Icon mode is used to save current When only icons are displayed a much lower operating voltage Vi cp can be used a
61. nd the message is not corrupted Synchronization procedure to synchronize the clock signals of two or more devices MASTER SLAVE MASTER TRANSMITTER HECEIVEB TRANSMITTER TRANSMITTER RECEIVER RECEIVER RECEIVER SDA soL MGA807 Fig 20 System configuration data line stable data valid change of data allowed MBC621 Fig 21 Bit transfer 2001 Dec 19 34 Philips Semiconductors Product specification LCD controllers drivers 2113 Ron rs RES nmm Lm mL START condition STOP condition MBC622 Fig 22 Definition of START and STOP conditions 2001 Dec 19 DATA OUTPUT BY TRANSMITTER DATA OUTPUT BY RECEIVER SCL FROM MASTER not acknowledge acknowledge 4 x clock pulse for acknowledgement MBC602 Fig 23 Acknowledgement on the I C bus 35 2113 Product specification LCD controllers drivers Philips Semiconductors SIM SARIS 0 pz r4 SSoJppe 5 M 0 OVL OF L LO s ZO0DON Jejurod ejepdn 09 09 s q 0 z u eMq 0 uz 4 di Y z 1 36 2001 Dec 19 Product specification Philips Semiconductors
62. nd the switching frequency of the LCD outputs is reduced In most applications it is possible to use Vpp as 2 APPLICATIONS Telecom equipment Portable instruments Point of sale terminals 3 GENERAL DESCRIPTION The PCF21 13x is a low power CMOS LCD controller and driver designed to drive a dot matrix LCD display of 2 line by 12 or 1 line by 24 characters with 5 x 8 dot format All necessary functions for the display are provided in a single chip including on chip generation of LCD bias voltages resulting in a minimum of external components and lower system current consumption The PCF2113x interfaces to most microcontrollers via a 4 or 8 bit bus or via the 2 wire 12 The chip contains a character generator and displays alphanumeric and Japanese characters The letter x in PCF2113x characterizes the built in character set Various character Sets can be manufactured on request Philips Semiconductors Product specification LCD controllers drivers PCF2113x 4 ORDERING INFORMATION PACKAGE DESCRIPTION VERSION PCF2113AU 10 F4 chip on flexible film carrier PCF2113DU 10 F4 chip on flexible film carrier PCF2113DU F4 chip in tray TYPE NUMBER PCF2113DH F4 plastic low profile quad flat package 100 leads SOT407 1 body 14 x 14 x 1 4 PCF2113DU 2 F4 chip with bumps in tray _ PCF2113EU 2 F4 chip with bumps in tray PCF2113WU 2 F4 chip with bumps in tray 200
63. oB oc line 1 DDRAM address 345 10 11 12 41 42 43 44 45 4 4 4 line 2 2 line display MGE993 Fig 5 DDRAM to display mapping left shift 2001 Dec 19 11 Philips Semiconductors LCD controllers drivers 7 11 Character Generator ROM CGROM The CGROM generates 240 character patterns in a 5 x 8 dot format from 8 bit character codes Figures 7 8 9 and 10 show the character sets that are currently implemented 7 12 Character Generator RAM CGRAM Up to 16 user defined characters may be stored in the CGRAM Some CGRAM characters see Fig 16 are also used to drive icons 6 if icons blink and both icon rows are used in the application 3 if no blink but both icon rows are used in the application O if no icons are driven by the icon rows The CGROM and CGRAM use a common address space of which the first column is reserved for the CGRAM see Fig 7 Figure 11 shows the addressing principle for the CGRAM 7 13 Cursor control circuit The cursor control circuit generates the cursor underline and or cursor blink as shown in Fig 6 at the DDRAM address contained in the address counter When the address counter contains the CGRAM address the cursor will be inhibited Product specification PCF2113x 7 14 Timing generator The timing generator produces the various signals required to drive the internal circuitry Internal chip operation is not disturbed by operations on the
64. oltage 1 90 to 6 86 V Tref 27 C Values producing more than 6 5 V at operating temperature are not allowed Operation above this voltage may damage the device When programming the operating voltage the cp tolerance and temperature coefficient must be taken into account Values below 2 2 V are below the specified operating range of the chip and are therefore not allowed Value 0 for V4 and Vg switches the generator off i e Va character mode Vg 0 in icon mode Usually register V4 is programmed with the voltage for character mode and register Vg with the voltage for icon mode When is generated on chip the VI cp pins should be decoupled to Vss with a suitable capacitor Product specification PCF2113x The generated V cp is independent of Vpp and is temperature compensated When the Vi cp generator and the direct mode are switched off an external voltage may be supplied at connected pins Vi cp1 and Vi cp2 Vi cp1 and Vicp2 be higher or lower than Vppo During direct mode program DM register bit the internal Vicp generator is turned off and the VI output voltage is directly connected to This reduces the current consumption during icon mode and Mux 1 9 depending on value and LCD liquid properties The Vi generator ensures that as long Vpp is in the valid range 2 2 to 4 V the required peak voltage Vop 6 5 V can be generated at any time 7 2
65. ontrol bit D Vicp generator operating Direct mode Any mode power down PD pin Philips Semiconductors LCD controllers drivers 10 INTERFACES TO MICROCONTROLLER 10 1 Parallel interface The PCF2113x can send data in either two 4 bit operations or one 8 bit operation and can thus interface to 4 bit or 8 bit microcontrollers In 8 bit mode data is transferred as 8 bit bytes using the 8 data lines DB7 to Three further control lines RS and R W are required see Chapter 6 In 4 bit mode data is transferred in two cycles of 4 bits each using pins DB7 to 084 for the transaction The higher order bits corresponding to DB7 to DB4 in 8 bit mode are sent in the first cycle and the lower order bits DB3 to DBO in 8 bit mode in the second cycle Data transfer is complete after two 4 bit data transfers It should noted that two cycles are also required for the busy flag check 4 bit operation is selected by instruction see Figs 17 to 19 for examples of bus protocol In 4 bit mode pins DB3 to must be left open circuit They are pulled up to Vpp internally Product specification PCF2113x 10 2 12C bus interface The 2 is for bidirectional two line communication between different ICs or modules The two lines are the Serial Data line SDA and the Serial Clock Line SCL Both lines must be connected to a positive supply via pull up resistors Data transfer may be initiated only wh
66. pears the display functions etcetera remain in operation during display data write The cursor is displayed using 5 dots in the 8th line see Fig 6 2001 Dec 19 Product specification PCF2113x 8 4 3 BIT B The character indicated by the cursor blinks when B 1 The cursor character blink is displayed by switching between display characters and all dots on with a period of fosc approximately 1 second with fpi 55524 cursor underline and the cursor character blink set to display simultaneously 8 5 Cursor or display shift Cursor display shift moves the cursor position or the display to the right or left without writing or reading display data This function is used to correct a character or move the cursor through the display In 2 line displays the cursor moves to the next line when it passes the last position 40 of the line When the displayed data is shifted repeatedly all lines shift at the same time displayed characters do not shift into the next line The Address Counter AC content does not change if the only action performed is shift display but increments or decrements with the cursor display shift 8 6 Function set 8 6 1 DL PARALLEL MODE ONLY Sets interface data width Data is sent or received in bytes DB7 to DBO when DL 1 or in two nibbles DB7 to DB4 when DL 0 When 4 bit width is selected data is transmitted in two cycles using the parallel bus In a
67. snq O l By jo 1uejuoo Jaye 1 ou NOILVH3dO L L 0 0 L 0 0 zga ega rga sga 0 490 ou 195 8 pea 2 57 2001 19 Product specification Philips Semiconductors PCF2113x LCD controllers drivers 2189 1 U0p X spue 195 ejds p yo seul Aejdsip Jo 1equunu y 64 8 Si 19 g 9061 ees euin peuroeds y si eun JOU SI 44 Buiwojo eui eq Jg 0 0 0 0 0 0 sga 238 54 8 195 5 SIU 1 48 0 0 0 sga 98d sri 514 8 195 5 SIU JOUUE9 48 0 0 0 0 saa 94d 8 S 2 8 196 uononjJlsul SIU eq 1 48 L 0 0 0 0 28 Su
68. ta pointer data pointer MGG004 Fig 26 Master reads slave immediately after first byte read mode RS previously defined 11 LIMITING VALUES In accordance with the Absolute Maximum Rating System IEC 60134 SYMBOL PARAMETER Vpp1 logic supply voltage Vi generator supply voltages V Vicp LCD supply voltage V Vi o n voltage on any Vpp related input or output V any related input or output 0 5 V DC input current mA DC output current IDD Iss and Vss or Vicp supply current Prot total power dissipation Po power dissipation per output Ves electrostatic handling voltage human body model 100 pF 1 5 electrostatic handling voltage machine model 200 pF L 0 75 uH Tstg storage temperature 12 HANDLING INSTRUCTIONS Inputs and outputs are protected against electrostatic discharge in normal handling However to be totally safe it is desirable to take normal precautions appropriate to handling MOS devices see Handling MOS Devices 2001 Dec 19 38 Philips Semiconductors Product specification LCD controllers drivers 2113 13 DC CHARACTERISTICS Vpp1 1 8 to 5 5 V 2 2 to 4 0 V Vss 0 V 2 2 to 6 5 V Tamb 40 to 85 C unless otherwise specified SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNIT Supplies logic supply volta
69. the best possible product Note 1 Please consult the most recently issued data sheet before initiating or completing a design 22 DEFINITIONS Short form specification The data in a short form specification is extracted from a full data sheet with the same type number and title For detailed information see the relevant data sheet or data handbook Limiting values definition Limiting values given are in accordance with the Absolute Maximum Rating System IEC 60134 Stress above one or more of the limiting values may cause permanent damage to the device These are stress ratings only and operation of the device atthese or at any other conditions above those given in the Characteristics sections of the specification is not implied Exposure to limiting values for extended periods may affect device reliability Application information Applications that are described herein for any of these products are for illustrative purposes only Philips Semiconductors make no representation or warranty that such applications will be suitable for the specified use without further testing or modification 24 BARE DIE DISCLAIMER 23 DISCLAIMERS Life support applications These products are not designed for use in life support appliances devices or Systems where malfunction of these products can reasonably be expected to result in personal injury Philips Semiconductors customers using or selling these products for use in such
70. the recommended ITO track resistance is to be minimized for the I O and supply connections 2001 Dec 19 47 Philips Semiconductors LCD controllers drivers 16 2 4 bit operation 1 line display using internal reset The program must set functions prior to a 4 bit operation see Table 12 When power is turned on 8 bit operation is automatically selected and the PCF2113x attempts to perform the first write as an 8 bit operation Since nothing is connected to to DB3 a rewrite is then required However since one operation is completed in two accesses of 4 bit operation a rewrite is required to set the functions see Table 12 step 3 Thus 084 to DB7 of the function set are written twice 16 3 8 bit operation 1 line display using internal reset Tables 13 and 14 show an example of a 1 line display in 8 bit operation The PCF2113x functions must be set by the function set instruction prior to display Since the DDRAM can store data for 80 characters the RAM can be used for advertising displays when combined with display shift operation Since the display shift operation changes display position only and the DDRAM contents remain unchanged display data entered first can be displayed when the return home operation is performed Product specification PCF2113x 16 4 8 bit operation 2 line display For a 2 line display the cursor automatically moves from the first to the second line after the 40th digit of the
71. ue ejdsip uloq suunje4 Sd S HM H SSIUM SI uoinisod 151 eui 0 sseJppe WIWHCC 5195 y o pue Aq SI JOSIND Y d 0 0 0 0 0 0 0 0 0 L 0 0 INVHOQ INVHOO 0 0 0 L INVHOQ NVHOO 0 0 0 5 195 NOILONEHLSNI 12912 52 2001 19 Product specification Philips Semiconductors PCF2113x LCD controllers drivers IN SOLIM eu Jo peeu eu ye 40sJno eui 0 ssejppe 5195 N 0 0 0 0 L INVHOQ INVHOO 0 0 0 0 INVHOG INVHOO 0 0 SseJppe 195 810 1 S L 0 0 0 WVHGO NVH99 01 eui 0 peyius pue SI Josuno y 0 uonezi eniur Aq ueeq seu 94 0 L 0 0 L 0 jou e dsip 0 euin eui 1 eu 0 1osino OU 1146 o pue Aq sseJppe y 5195 Jaye xuelg si A
72. wave soldering method was specifically developed 2001 Dec 19 65 Product specification PCF2113x If wave soldering is used the following conditions must be observed for optimal results Use a double wave soldering method comprising a turbulent wave with high upward pressure followed by a smooth laminar wave For packages with leads on two sides and a pitch e larger than or equal to 1 27 mm the footprint longitudinal axis is preferred to be parallel to the transport direction of the printed circuit board smaller than 1 27 mm the footprint longitudinal axis must be parallel to the transport direction of the printed circuit board The footprint must incorporate solder thieves at the downstream end For packages with leads on four sides the footprint must be placed at a 45 angle to the transport direction of the printed circuit board The footprint must incorporate solder thieves downstream and at the side corners During placement and before soldering the package must be fixed with a droplet of adhesive The adhesive can be applied by screen printing pin transfer or syringe dispensing The package can be soldered after the adhesive is cured Typical dwell time is 4 seconds at 250 A mildly activated flux will eliminate the need for removal of corrosive residues in most applications 20 4 Manual soldering Fix the component by first soldering two diagonally opposite end leads Use a low voltage
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