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TEXAS INSTRUMENTS bq2058 handbook(1)

1. and its subsidiaries TI reserve the right to make changes to their products or to discontinue any product or service without notice and advise customers to obtain the latest version of relevant information to verify before placing orders that information being relied on is current and complete All products are sold subject to the terms and conditions of sale supplied at the time of order acknowledgement including those pertaining to warranty patent infringement and limitation of liability TI warrants performance of its semiconductor products to the specifications applicable at the time of sale in accordance with Tl s standard warranty Testing and other quality control techniques are utilized to the extent TI deems necessary to support this warranty Specific testing of all parameters of each device is not necessarily performed except those mandated by government requirements CERTAIN APPLICATIONS USING SEMICONDUCTOR PRODUCTS MAY INVOLVE POTENTIAL RISKS OF DEATH PERSONAL INJURY OR SEVERE PROPERTY OR ENVIRONMENTAL DAMAGE CRITICAL APPLICATIONS TI SEMICONDUCTOR PRODUCTS ARE NOT DESIGNED AUTHORIZED OR WARRANTED TO BE SUITABLE FOR USE IN LIFE SUPPORT DEVICES OR SYSTEMS OR OTHER CRITICAL APPLICATIONS INCLUSION OF TI PRODUCTS IN SUCH APPLICATIONS IS UNDERSTOOD TO BE FULLY AT THE CUSTOMER S RISK In order to minimize risks associated with the customer s applications adequate design and operating safeguards must be provided by the custom
2. to the negative terminal CSH Overcurrent sense high side input of the cell designated BAT3 in Figure 2 This input is connected between the BATon Battery 2 negative input high side discharge FET or sense resistor D and BATip to enable overcurrent sense in This input is connected to the negative termi the battery pack s positive supply path nal of the cell designated BAT2 in Figure 2 v BATiP Battery 1 positive input BATiN Battery 1 negative input This input is connected to the positive terminal This input is connected to the negative termi of the cell designated BAT1 in Figure 2 nal of the cell designated BAT1 in Figure 2 Table 1 Pin Configuration for 3 and 4 Series Cells Number of Cells Configuration Pins Battery Pins BAT Positive terminal of first cell BAT n tied to BATip BATon Negative terminal of first cell 3 cells NSEL V VSS BATs3n Negative terminal of second cell BATA4w Negative terminal of third cell BAT p Positive terminal of first cell BAT n Negative terminal of first cell 4 cells NSEL Vcc BATon Negative terminal of second cell BATs3n Negative terminal of third cell BAT4n Negative terminal of fourth cell bq2058 Number of Cells Select Pin 15 Sel4 Sel3 Sel2 Cell inputs Se ry Pin 9 BIP Il o Pin 8 BIN e e kd IU TTL LA l Pi
3. 8 G Change 8 Jan 1999 I changes from June 1998 H 11 bq2058 SN 16 Pin SN 0 150 SOIC 16 Pin SN 0 150 SOIC i l 1 E Inches Millimeters P D e 4 3 Dimension Min Max Min Max e A 0 060 0 070 1 52 1 78 E Al 0 004 0 010 0 10 0 25 E B 0 013 0 020 0 33 0 51 C 0 007 0 010 0 18 0 25 D 0 885 0 400 9 78 10 16 E 0 150 0 160 3 81 4 06 C M e 0 045 0 055 1 14 1 40 fF H 0 225 0 245 5 72 6 22 l t A 004 L 0 015 0 035 0 38 0 89 12 Ordering Information bq2058 XXXX Device L Standard Device Blank Standard device XXXX Customer code assigned by Benchmarq Package Option SN 16 pin narrow SOIC Overvoltage Threshold Blank 4 25V Standard device Contact Factory for availability of other thresholds bq2058 Lithium Ion Pack Supervisor Package Devices T Voy Threshold 16 pin Narrow SOIC SN 3 4V bq2058WSN 4 15V bq2058MSN 4 20V bq2058FSN 4 225V bq2058KSN n 4 25V bq2058SN 70 C 4 325V bq2058CSN 4 30V bq2058DSN 4 35V bq2058RSN 4 36V bq2058JSN 4 375V bq2058GSN Notes bq2058SN is Standard Device Contact factory for availability of other thresholds and tolerances 13 bq2058 IMPORTANT NOTICE Texas Instruments
4. OVD and UVD pins respectively See Table 3 below The fault condition must persist through the entire de lay period or the bq2058 may not deactivate either FET Number of Series Cells NSEL control output 3 cell Tied to Vss Figure 3 shows a step by step event cycle for the 4 cell Tied to Vcc bq2058 Table 3 Protection Delay Timers Protection Delay Capacitor from Typical Tolerance Feature Period Vcc to Capacitor Time Overcurrent tocp OCD 0 010uF 12ms 40 Overvoltage tovp OVD 0 100uF 950ms 40 Undervoltage tuvp UVD 0 100uF 950ms 40 Notes For tocp For tovp tuvD tis 1 2 Cup tis 9 5 Cap 1 The delay time versus capacitance can be approximated by the following equations where C gt 0 001uF where C 2 0 01uF 2 Overvoltage and undervoltage conditions are sampled by the bq2058 The delay in Table 2 is in addition to the time required for the bq2058 to detect the violation which may vary from 0 to 160 ms depending on where in the sampling period the violation occurs Overcurrent is continuously monitored and is subject to a delay of approximately 1 5ms bq2058 Cell Voltage CSH BAT4p 70mV Vcp S EE BAT4p 160mV VOCH DSG S m gt I tocp 9 I IVD SE o J L T or o f L1 s TD205801 eps Figure 3 Protector Event Diagram Event Definition 0 The bq2058 is in the low power sleep mode because one or more of the ce
5. Shown with these conditions are the respective thresholds used to determine if that condition exists Overvoltage Vov Undervoltage Vuv Overcurrent Vocu Voc Charge Enable Vcr Charge Detect Vcp The bq2058 samples a cell every 40ms typical Every sample is a fully differential measurement of each cell During this sample period the bq2058 compares the measurements with these thresholds to determine if any of the these conditions exist Vov Vuv and Vcr Overcurrent and charge detect are conditions that are not sampled but are continuously monitored Initialization On initial power up such as connecting the battery pack for the first time to the bq2058 the bq2058 enters the low power sleep mode disabling the DSG output It is recommended that a top to bottom cell connection be made at pack assembly for proper initializa tion A charging supply must be applied to the bq2058 circuit to enable the pack See Low Power Sleep Mode and Charge Detect sections Q4 ZVP3306F R2 6 98K oe o Si4435DY Si U i4435DY R6 100K ootw R9 1M Q3 2N7002 POS im vec ovD R4 Se EI 9 pe Su BATIP uvD BIN t 8 BATIN OCD 7 e ELA BAT2N DSG 10K 0 001uF BAT9N CSH B2N 5 BATAN CHG R7 63 3 10K 0 001uF T MSS e B3N CSL RB C4 10K 0 001uF Not
6. U O BAIM CU mum UNITRODE Features gt Protects and individually moni tors three or four Li Ion series cells for overvoltage undervolt age gt Monitors pack for overcurrent gt Designed for battery pack inte gration gt Minimal external components gt Drives external FET switches gt Selectable overvoltage Vov thresholds Mask programmable by Unitrode Standard version 4 25V gt Supply current 254A typical Sleep current 0 74A typical gt 16 pin 150 mil narrow SOIC bq2058 Lithium lon Pack Supervisor for 3 and 4 Cell Packs General Description The bq2058 Lithium Ion Pack Super visor is designed to control the charge and discharge cell voltages for three or four lithium ion Li Ion series cells accommodating battery packs contain ing series parallel configurations The low operating current does not over discharge the cells during periods of storage and does not significantly in crease the system discharge load The bq2058 can be part of a low cost Li Ion charge control system within the bat tery pack The bq2058 controls two external FETs to limit the charge and discharge poten tials The bq2058 allows charging when each individual cell voltage is below Voy overvoltage limit If the voltage on any cell exceeds Voy for a user configurable delay period tovp the CHG pin is driven high shutting off charge to the battery pack This safety feature pre vents ove
7. are exceeded Functional operation should be limited to the Recommended DC Operating Conditions detailed in this data sheet Exposure to conditions beyond the operational limits for extended periods of time may affect device reliability 2 Internal protection diodes are in place on every pin relative to Voc and Vgs See Figure 4 Any pin e Vcc A O Vss FG2058x eps Figure 4 Internal Protection Diodes bq2058 DC Electrical Characteristics rA TOPR Symbol Parameter Minimum Typical Maximum Unit Conditions Notes Von Output high voltage Vcc 0 5 V Iog 10uA CHG DSG VoL Output low voltage Vss 0 5 V Ior 10uA CHG DSG Vop Operating voltage 4 18 0 NY Vcc relative to Vss VIL Input low voltage Vss 0 5 V Pin CTL Vin Input high voltage Vss 2 0 V Pin CTL Vir Input low voltage Vss 0 5 V Pin NSEL Vint Input high voltage Voc 0 5 Pin NSEL IccA Active current 25 40 uA Iccs Sleep current 0 7 1 5 uA DC Thresholds ta Topr Symbol Parameter Value Unit Tolerance Conditons 4 25 V 50mV See note 1 Vov anaes 4375 V ap Bike Table 2 Customer option VOR Charge enable threshold ioe Se Vov 200mV V 50mV For bq2058W only Vuv Undervoltage threshold Ss i SEM 2 10 V 100mV For bq2058W only VOCH Overcurrent detect h
8. er to minimize inherent or procedural hazards Tl assumes no liability for applications assistance or customer product design TI does not warrant or represent that any license either express or implied is granted under any patent right copyright mask work right or other intellectual property right of TI covering or relating to any combination machine or process in which such semiconductor products or services might be or are used Te publication of information regarding any third party s products or services does not constitute Tl s approval warranty or endorsement thereof Copyright 1999 Texas Instruments Incorporated
9. ery positive input bq2058 Pin Descriptions CHG This input is connected to BAT in a three cell configuration Charge control output DSG Discharge control output This push pull output controls the charge This push pull output controls the discharge path to the battery pack Charging is al path to the battery pack Discharge is al lowed when low lowed when low CTL Pack disable input NSEL Number of cells input When high this input allows an external This input selects the number of series cells source to disable the pack by making both in the pack NSEL should connect to Vcc for DSG and CHG inactive For normal opera four cells and to Vss for three cells tion the CTL pin is low m UVD Undervoltage delay input Vss Low potential input SSC This input uses an external capacitor to Vcc CSL Overcurrent sense low side input to set the undervoltage delay timing This input is connected between the low side OVD Overvoltage delay input discharge FET or sense resistor and BAT4n to enable overcurrent sensing in the battery This input uses an external capacitor to Vcc pack s ground path to set the overvoltage delay timing BATaN Battery 4 negative input OCD Overcurrent delay input This input is connected to the negative termi This input uses an external capacitor to Vcc nal ofthe cell designated BATA in Figure 2 to set the overcurrent delay timing BATsN Battery 3 negative input Vcc High potential input This input is connected
10. es 1 For automatic short circuit recovery 2 Remove R11 for 4 cell Remove R10 and connect B1P to BIN for 3 cells Figure 2 3 or 4 Cell Li lon Battery Pack Supervisor Low Power Sleep Mode The bq2058 enters the low power sleep mode in two dif ferent ways 1 On initial power up 2 After the detection of an undervoltage condi tion Vuv When the bq2058 enters the low power sleep mode DSG is driven high and the device consumes 0 7uA typical The bq2058 only comes out of low power sleep mode when a valid charge detect condition exists Charge Detect The bq2058 continuously monitors for a charge detect con dition A valid charge detect condition exists when either of the conditions are true CSL lt BAT4w 70mV Vcp CSH gt BATip 70mV Vcp A valid charge detect enables the DSG output allowing charging of the lithium ion cells This is accomplished by applying the charging supply to the pack Undervoltage Undervoltage or overdischarge protection is asserted when any cell voltage drops below the Vuv threshold and remains below the Vyy threshold for a time exceeding a user configurable delay tuvp The DSG output is driven high disabling the discharge of the pack The bq2058 then enters the low power sleep mode Overvoltage Overvoltage or overcharge protection is asserted when any cell voltage exceeds the Voy threshold and remains above the Voy threshold for a time exceeding a user c
11. guration description Correction to description Was Vocu 150mV 25mV K Voct 85mV 25mV 1 2 5 Overcurrent limits Is Voc 160m 25mV Vocr 100mV 25mV 1 d Figure 3 Update Event diagram Was Vocu 150mV 25mV Vocu 100mV 80mV Ven 70mV 60 50mV 1 2 S DC threshold Is Vocu 160mV 25mV Vocr 100mV 25mV Vep 70mV 60 80mV Was Between Vcc and CSH 3 1 3 5 High side overcurrent monitored Ts Between BAT p and CSH 4 Overvoltage threshold options Added bq2058R 3 5 Overcurrent limit Was Vocu 100mV Is Vocu 150mV 4 4 Figure 2 Corrected schematic Was tocp 10ms 30 tovp 800ms 30 2 tuvp 800ms 40 4 6 8 Protection Delay Times Is tocp 12ms 40 tovp 950ms 40 tuvp 950ms 40 Was Voca 160mV 25mV VocL 150mV 25mV 4 10 Overcurrent limits la VocH 160mV 35mV Vocr 160mV 35mV Overvoltage threshold 5 5 9 Charge enable threshold Added bq2058W Undervoltage threshold 9 DC electrical characteristics Was Minimum Vop OV Is Minimum Vop AN 5 9 Overvoltage threshold Added bq2058C and bq2058G 4 Reference circuit amended Moved D1 to new location Notes Change 1 Feb 1997 B changes from Jan 1997 A Change 2 April 1997 C changes from Feb 1997 B Change 3 June 1997 D changes from April 1997 C Change 4 July 1997 E changes from June 1997 D Change 5 Feb 1998 F changes from July 1997 E Change 6 May 1998 G changes from Feb 1998 F Change 7 June 1998 H changes from May 199
12. igh side 160 mV 35mV VocL Overcurrent detect low side 160 mV 385mV Vep Charge detect threshold 70 mV 60mV 80mV tovp Overvoltage delay threshold 950 ms 40 ee Ta 80 C tuvp Undervoltage delay threshold 950 ms 40 Seta F Ta 30 C tocp Overcurrent delay threshold 12 ms 40 Cocp 0 01uF TA 30 C Notes 1 Standard device Contact Unitrode for different thresholds and tolerance options 2 Does not include cell sampling delay which may add up to 160ms of additional delay until the condition is detected 3 bq2058G is designed only for 3 cell applications bq2058 Impedance Symbol Parameter Minimum Typical Maximum Unit Notes RcELL Input impedance 10 MQ Pins BATip BATin 4n CSH CSL 4 280 4 270 4 260 4 250 4 240 Voy Overvoltage V 4 230 Measurement accuracy x 2mV 4 220 4 210 30 20 10 O 10 20 30 40 50 60 70 TA Free Air Temperature C Gr2058 eps Figure 5 bq2058 4 25V Overvoltage Threshold vs Free Air Temperature 10 Data Sheet Revision History bq2058 Change No Page No Description Nature of Change 1 1 2 5 PACK PACK Pins renamed to CSH and CSL respectively 1 1 Pin description Added CSH CSL description 1 3 Block diagram Update Block diagram 1 4 Figure 2 Update typical application circuit 1 4 Confi
13. itions occurs and remain for a time exceeding a user configurable de lay tocp CSL gt BAT4n Vocr CSH lt BATip VocH where Vocr 160mV low side detect Vocu 160mV high side detect When either of these conditions occurs DSG is driven high disconnecting the load from the pack DSG re mains high until both of the voltage conditions are false indicating removal of the short circuit condition The user can facilitate clearing these conditions by inserting the battery pack into a charger The low side overcurrent sense can be disabled by con necting CSL to BAT4n This ensures that CSL is never greater than BAT4n If low side detection is disabled high side detection must be used with CSH bq2058 The FETs in the charge discharge path controlled by the CHG and DSG pins affect the overcurrent level The on resistance of these FETs need to be taken into ac count when determining overcurrent levels Condition CHG pin DSG pin Normal operation Low Low Overvoltage High Low Undervoltage Low High Overcurrent Low High Floating battery input High Indeterminate CTL high High High CHG and DSG States The CHG and DSG output truth table is shown below The polarities of CHG and DSG are mask programmable at Unitrode Push pull vs open drain configuration is also mask configurable at Unitrode Please contact Unitrode for availability of these variations Number of Cells The
14. ll voltages are below Vuv ie A charger is applied to the pack causing the difference between CSH and BAT Pp to become greater than 70mV This awakens the bq2058 and the discharge pin DSG goes low One or more cells charge to a voltage equal to Vov initiating the overvoltage delay timer The overvoltage delay time expires causing CHG to be driven high All cell voltages fall below Vcg causing CHG to be driven low Stop charging apply a load An overcurrent condition is detected initiating the overcurrent delay timer The overcurrent delay time expires causing DSG to be driven high The overcurrent condition is no longer present DSG is driven low Pin CTL is driven high both DSG and CHG are driven high Pin CTL is driven low both DSG and CHG resume their normal function Ka oua hs One or more cells fall below Vuv initiating the overdischarge delay timer hp Once the overdischarge delay timer expires if any of the cells is below Vuy the bq2058 drives DSG high and enters the low power sleep mode bq2058 Absolute Maximum Ratings Symbol Parameter Value Unit Conditions Voc Supply voltage 18 V Relative to Vss TOPR Operating temperature 30 to 70 us Taro Storage temperature 55 to 125 C TSOLDER Soldering temperature 260 C For 10 seconds lin Maximum input current 100 uA All pins except Vcc Vss Notes 1 Permanent device damage may occur if Absolute Maximum Ratings
15. n 7 B2N r1 A Pin 6 B3N es Pin 5 BAN Pina VOV i E DQ Chip Negative S A7 CK Supply S asp DQ Sel3 H CK asp DQ Sel2 CK aBp DQ Gel cK asp Am Above Voy Discharge Off Delay Capacitor Input Sel4 Sel3 Sel2 Sel Edge out Overcharge n Pin 1 CHG Non Retrigger Reset Oneshot Capacitor All Below VcE Any Below VUV Sleep Edg Res Pin 14 Pin 10 Pin9 B1P Sense Low LGS Zvl BAN LOST EPO le Pin 4 Pin 5 Charge Off Delay Capacitor Input Sense High side Input Charge Control Output Pin 16 ef Tout Non Retrigger et Oneshot Capacitor side Input Overcurrent Delay Capacitor Input Pin 12 DSG e Discharge Control Output Overcurrent Edge Tout Non Retrigger Reset Oneshot Capacitor OCD External Output Control Figure 1 Block Diagram bq2058 Functional Description Figure 1 is a block diagram outlining the major compo nents of the bq2058 Figure 2 shows a 3 or 4 cell pack supervisor circuit The following sections detail the vari ous functional aspects of the bq2058 Thresholds The bq2058 monitors the lithium ion pack for the condi tions listed below
16. onfigurable delay tovp The CHG pin is driven high disabling charge into the battery pack Charging is dis abled until a valid charge enable exists See Charge En able section Important note If any battery pin floats BATip BATiN 4N the bq2058 assumes an overvoltage has occurred Because of different manufacturers specifications for overvoltage thresholds the bq2058 can be available with different Vov options Table 2 summarizes these differ ent voltage thresholds bq2058 Table 2 Overvoltage Threshold Options Part No Vov Limit bq2058 4 25V bq2058C 4 325 bq2058D 4 30V bq2058G 4 375V bq2058R 4 35V bq2058W 3 4V The overvoltage threshold limits are programmed at Unitrode The bq2058 is the standard option that is more readily available for sampling and prototyping purposes Please contact Unitrode for other voltage threshold and tolerance options Charge Enable A valid charge enable indicates that an overvoltage overcharge condition no longer exists and that the pack is ready to accept further charge Once overvoltage protection is asserted charging will not be enabled un til all cell voltages fall below Vcg The Vcg threshold is a function of Voy and changes with different Voy lim its Vcg Voy 150mV Overcurrent The bq2058 detects an overcurrent or short circuit con dition only in the discharge direction Overcurrent pro tection is asserted when either of the cond
17. rcharge of any cell within the battery pack After an overvolt age condition occurs each cell must fall below Vcg charge enable voltage for the bq2058 to re enable charging The bq2058 protects batteries from overdischarge If the voltage on any cell falls below Vuv undervoltage limit for a user configurable delay pe riod tuvp the DSG output is driven high shutting off the battery dis charge This safety feature prevents overdischarge of any cell within the battery pack The bq2058 also stops discharge on detection of an overcurrent condition such as a short circuit If an overcur rent condition occurs for a user configurable delay period tocp the DSG output is driven high disconnect ing the load from the pack DSG re mains high until removal of the short circuit or overcurrent condition Pin Connections CHG DSG CTL NSEL Vss UVD CSL OVD BAT4N OCD BAT3N Voc BATon CSH BAT4N BAT4P 16 Pin Narrow SOIC nesan 1 99 Pin Names CHG Charge control output CTL Pack disable input Vss Low potential input CSL Current sense low side input BAT4n Battery 4 negative input BAT3n Battery 3 negative input BAToN Battery 2 negative input BAT N Battery 1 negative input DSG Discharge control output NSEL 3 or 4 cell selection UVD Undervoltage delay input OVD Overvoltage delay input OCD Overcurrent delay input Vcc High potential input CSH Current sense high side input BAT p Batt
18. user must configure the bq2058 for three or four series cell operation For a three cell pack NSEL should be tied directly to Vss For a four cell pack Nari should be connected directly to Vcc Pack Disable Input CTL The CTL pin is used to electrically disconnect the bat tery from the pack terminals through an externally sup plied signal When CTL is taken high CHG and DSG are driven high Any load on the pack terminals will be interpreted as an overcurrent condition by the bq2058 with the overcurrent delay timer held in reset When the CTL pin is driven low the overcurrent delay timer is allowed to start If the programmed delay tocp is too short the overcurrent recovery circuit if implemented will be unable to correct the overcurrent situation prior to the delay time out It is recommended that a delay time of greater than 10ms Cocp 2 0 01uF be used if the CTL pin function is used Important note If CTL floats it is internally pulled high making both DSG and CHG inactive thus disabling the pack If CTL is not used it should be tied to Vss The polarity of CTL is mask programmable at Unitrode Please contact Unitrode for other polarity options Protection Delay Timers The delay time between the detection of an overcurrent overvoltage or undervoltage condition and the deactivation of the CHG and or DSG outputs is user configurable by the selection of capacitor values between Vcc and OCD

TEXAS INSTRUMENTS bq2058 handbook(1)

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